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?semiconductor msm6789a/6789l general description the msm6789a/6789l, an improved version of msm6788, is a solid-state recorder developed using the sub band coding (sbc) method. just like msm6788, the msm6789a/6789l has a stand-alone mode and a microcontroller interface mode. in the stand-alone mode, record/playback conditions can be selected from pins and the msm6789a/6789l can be controlled by a simple drive timing. in the microcontroller interface mode, record/playback can be controlled by commands from the microcontroller, and more functions are available than in the stand-alone mode. the msm6789a/6789l can directly drive serial voice rom as external memory as well as serial register or general-purpose dram* (1-bit or 4-bit type selectable) as external memories, which allows a recording and playback circuit with fixed messages to be built easily. the method from microcontroller is the same as the msm6788. * only for msm6789a difference between msm6788 and msm6789a msm6788 msm6789a general dram unavailable available unvoiced-part elimination function no yes pcm playback no yes sbc method: the sbc method divides voice frequencies into five bands and codes the component for each of the bands separately, as shown below. semiconductor msm6789a/6789l sbc solid-state recorder ic note: this data sheet explains a stand-alone mode and a microcontroller interface mode, separately. ch 1 ch 2 ch 3 ch 4 ch 5 1 2 3 0 khz gain f (hz) @f s =8.0 hz
msm6789a/6789l ?semiconductor difference between msm6789a and msm6789l * use aram which has no failed bits in its first 64 kbits. parameter operating voltage external memory 3.0 to 3.6 v 16 mbits (max.) 4 mbits (msm66v84b) msm6789l msm6789a 4.5 to 5.5 v general-purpose dram, 32 mbits (max.) 4 mbits (msm6684b) 8 mbits (msm6685) serial register, 32 mbits (max.) 1-mbit dram (msm514256b, msm511000b) 4-mbit dram (msm514400c, msm514100c) 16-mbit dram (msm511740ca, msm5116100a) aram*, 32 mbits (max.)
?semiconductor msm6789a/6789l stand-alone mode features sbc method built-in 12-bit ad converter built-in 12-bit da converter built-in microphone amplifier built-in low-pass filter attenuation characteristics ?0 db/oct external memories msm6789a (5 v version) general-purpose dram, 32 mbits maximum (for variable messages) 1-mbit dram : can be directly driven (msm514256b, msm511000b) 4-mbit dram : can be directly driven (msm514400c, msm514100c) 16-mbit dram : can be directly driven (msm5117400a, msm5116100a) aram, 32 mbits maximum (for variable messages) note :use the first 64 kbits with no failed bits for the aram. serial register, 32 mbits maximum (for variable messages) 4-mbit serial register : can be directly driven (msm6684b) 8-mbit serial register : can be directly driven (msm6685) msm6789l (3.3 v version) serial register, 16 mbits maximum (for variable messages) 4-mbit serial resister: can be directly driven (msm66v84b) msm6789a (5 v version) and msm6789l (3.3 v version) serial voice rom, 4 mbits maximum (for fixed messages) 1-mbit serial voice rom : can be directly driven (msm6595a) 2-mbit serial voice rom : can be directly driven (msm6596a) 3-mbit serial voice rom : can be directly driven (msm6597a) bit rate 10.0, 12.6, 16.0 kbps (at 8 khz sampling freq.) 7.5, 9.5, 12.0 kbps (at 6 khz sampling freq.) maximum recording time (when one 8-mbit serial register is connected) 13.8 minutes (for 10.0 kbps sbc) 18.4 minutes (for 7.5 kbps sbc) 11.0 minutes (for 12.6 kbps sbc) 14.6 minutes (for 9.5 kbps sbc) 8.6 minutes (for 16.0 kbps sbc) 11.5 minutes (for 12.0 kbps sbc) number of phrases 63 phrases for variable messages 63 phrases for fixed messages standard linear pcm playback or oki nonlinear pcm playback can be selected. voice triggered starting function (voice detect level can be set) unvoiced-part elimination function (voice detect level can be set) pausing function master clock frequency: 6.0 mhz to 8.192 mhz power supply voltage: msm6789a : single 5 v power supply msm6789l : single 3.3 v power supply package options: msm6789a : 100-pin plastic qfp (qfp100-p-1420-bk) (product name: MSM6789AGS-BK) msm6789l : 100-pin plastic qfp (qfp100-p-1420-bk) (product name: msm6789lgs-bk)
msm6789a/6789l ?semiconductor block diagram (for msm6789a (5 v version)) mcum reset pdwn pdmd vds rom mon nar del st sp pause ca0 ca1 ca2 ca3 ca4 ca5 xt xt rec/ play br0 min mout lin osc latch ? + ? + lout amon fin aout fout adin sg sgc a0(sady) a1(sadx) a3( sas ) a4( rwck ) we cs1 cs2 cs3 cs4 rsel1 rsel2 di/o drom data i/o memory controller sbc analyzer/synthesizer lpf 12-bit adc 12-bit dac sg circuit dv dd av dd dgnd agnd phrase register address controller timing controller test test test circuit tdt0 to tdt3 [dq1 to dq4] tmd4 tst tck sync tdt4 to tdt7 tmd3 tmd0 to br1 a2( tas ) pcm synthesizer osc (rc) lowpwr compare circuit vd0 vd1 vd2 vd3 cas0 to cas7 ras a5 to a10 msel1 msel2 dram/ sr 4b/ 1b
?semiconductor msm6789a/6789l pin configuration (top view) (for msm6789a (5 v version)) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 lout sgc sg av dd amon fin aout fout adin dgnd rom vds test br1 br0 mcum pause del pdmd a10 a9 a8 a7 a6 a5 tmd4 tmd3 tmd2 tmd1 tmd0 tdt7 tdt6 tdt5 tdt4 tdt3 tdt2 tdt1 tdt0 sync tst tck ca0 ca1 ca2 ca3 nc ca5 a0 (sady) a1 (sadx) a2 ( tas ) a3 ( sas ) a4 ( rwck ) we di/o mon nar vd3 vd2 vd1 dram/ sr rec/ play st sp test pdwn reset vd0 msel2 msel1 rsel2 rsel1 dgnd agnd min mout lin [dq4] [dq3] [dq2] [dq1] 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 cs1 cs2 cs3 cs4 drom ras dv dd xt xt cas0 cas1 cas2 cas3 cas4 cas5 cas6 cas7 4b/ 1b 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 lowpwr nc ca4 nc nc nc 100-pin plastic qfp ( ) : pins for connecting serial voice rom [ ] : pins for connecting 4-bit type dram nc : no-connection pin
msm6789a/6789l ?semiconductor pin descriptions (for msm6789a (5 v version)) symbol type description dv dd digital power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the dgnd pin. av dd analog power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the agnd pin. dgnd digital ground. agnd analog ground. sg, sgc output for analog circuit reference voltage (signal ground). min inverting input of the built-in op amplifier. the non-inverting input pin is internally connected to sg (signal ground). lin i mout output of the built-in op amplifier for min and lin. lout o amon o connected to the lout pin in the recording mode and to the da converter output in the playback mode. this pin connects the built-in lpf input (fin pin). fin i fout o output of the built-in lpf. this pin connects the ad converter input (adin pin). adin i input of the built-in 12-bit ad converter. aout o output of the built-in lpf. this pin outputs playback waveforms and connects an external speaker drive amplifier. this pin selects whether memory to be connected externally is dram or serial register. dram/ sr i low level high level this pin selects either 1-bit type dram or 4-bit type dram. 4b/ 1b i a0 (sady) these pins connect to a0 and a1 of dram at the time of dram selection. they also connect to sad pin of serial register and serial voice rom at the time of serial register selection. these pins output leading addresses of read/write. a1 (sadx) o this pin connects to a2 of dram at the time of dram selection. it also connects to tas pin of serial register and serial voice rom at the time of serial register selection. this pin is used to set serial addresses from the sadx and sady pins into the internal address counter of the serial register and serial voice rom. a2 ( tas )o this pin connects to a3 of dram at the time of dram selection. it also connects to the sas pin of the serial register and the sasx and sasy pins of the serial voice rom at the time of serial register selection. clock pin to write serial addresses. a3 ( sas )o this pin connects to a4 of dram at the time of dram selection. it also connects to the rwck pin of the serial register and the rdck pin of the serial voice rom at the time of serial register selection. clock pin to read data from and write data into the serial register. a4 ( rwck )o input of the built-in lpf. : serial register : dram low level high level : 1-bit type : 4-bit type a10-a5 o this pin connects to pins a5-a10 of dram at the time of dram selection. this pin outputs addresses of read/write. pin 90 47 40, 55 54 48, 49 53 51 52 50 46 45 43 42 44 66 88 79 78 77 76 75 1-6
?semiconductor msm6789a/6789l pin descriptions (for msm6789a (5 v version)) (continued) symbol type description we o write enable. this pin connects to the we pin of the serial register and dram. this pin selects either read or write mode. di/o i/o data i/o. this pin connects to the din and dout pins of the serial register and dram. this pin outputs write data and inputs read data. drom i data rom. this pin connects to the dout pin of the serial voice rom. ras o this is a row address strobe pin of dram at the time of dram selection. cas0 - cas7 o these are the column address strobe pins of dram at the time of dram selection. cas7 , an addresss output pin, is connected to pin a11 of dram at the time 16-mbit dram selection. cs1 chip select. these pins connect to cs pin of the serial register and the cs ( cs1 , cs2 , cs3 ) pins of the serial voice rom. cs3 o cs4 msel1 i these pins select the capacity of the memory to be connected externally. these pins select the number of drams and serial registers to be connected externallly. rsel1 i cs2 msel2 i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity llll 1m 4 lllh 4m 1 llhl 1m 8 l l h h 1m 4 + 4m 1 lhll 4m 2 lhlh 4m 2 lhhl 4m 3 lhhh 4m 3 hlll 4m 4 h l l h 16m 1 hlhl 4m 6 hlhh 4m 6 h h l l 4m 8 hhlh 4m 8 h h h l 16m 2 hhhh 16m 2 ?when dram is selected (dram/ sr = high level) pin 74 73 85 89 93-100 81 83 84 58 82 59 56 57
msm6789a/6789l ?semiconductor pin descriptions (for msm6789a (5 v version)) (continued) symbol type description mode selection. low level : stand-alone mode high level : microcontroller interface mode pdwn i power down. when a low level is input, the msm6789a goes to the power down state. unlike the reset pin, this pin does not force the msm6789a to be reset. when a low level is applied to this pin during recording operation, the msm6789a is halted, and will be maintained in the power down state while pdwn is low level. after this pin is restored to a high level, postprocessing for recording will be performed. oscillator connection. when an external clock is used, input the clock through this pin. during the power down state, this pin must be set to the ground level. xt i test msm6789a test. input a low level to the test pin and a high level to the test pin. rsel1 i test i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity llll 4m 1 lllh 4m 2 llhl 4m 3 l l h h 4m 4 lhll 8m 1 lhlh 8m 2 lhhl 8m 3 lhhh 8m 4 ?when serial register is selected (dram/ sr = low level) mcum i oscillator connection. when an external clock is used, this pin must be left open. xt o msm6789a test. this pin must be left open. tmd3-tmd0 tdt7-tdt0 sync i/o connect these pins to dq1-dq4 of dram at the time of 4-bit type dram selection. otherwise these pins must be left open as they are msm6789a test pins. tdt3-tdt0 [dq4]-[dq1] i/o msm6789a test. input a low level signal. tst tck tmd4 i this pin selects cas -before- ras refresh period of dram at the time of power down when dram is selected. low level : 15 ? max. high level : 125 ? max. lowpwr i a high input level causes the msm6789a to be initialized and to go into the power down state. reset i pin 60 91 56 37 57 34 92 9-12 17-20 22 87 62 13-20 23 21 8 61
?semiconductor msm6789a/6789l pin descriptions (for msm6789a (5 v version)) (continued) symbol type description rom i playback operation. when set to low, this pin selects the record/playback operation (only for the sbc method). when set to high, it selects the rom playback operation (for the sbc and pcm methods). rec/ play i recording mode or playback mode selection. this pin is invalid during the rom playback operation. when set to low, it selects the playback mode. when set to high, it selects the recording mode. st i start playback. when a low-level pulse is applied to this pin, the record/playback or rom playback is started. playback pause. when a low-level pulse is applied to this pin, the record/playback or rom operation is stopped temporarily. pause i del i phrase delection. when a low level pulse is applied to this pin, all phrase deletion or specified phrase deletion can be performed according to the setting of pins ca0 through ca5, ch00: all phrase deletion ch01 to ch3f: specified phrase deletion after power up, be sure to input a reset signal and then delete all phrases. after completing this procedure, start the record/playback operation. desired phrase specification. a total of 63 phrases can be specified indepedently for the record/playback operation and the rom playback operation. ca0-ca5 i sp i stop playback. when a low-level pulse is applied to this pin, the record/playback or rom playback is stopped. ca5 ca4 ca3 ca2 ca1 ca0 phrase no. remarks llllll ch00 all phrase deletion lllllh ch01 . . . . . . . . . . . . . . . ch02 llllh l . . . hhhhh l ch3e hhhhhh ch3f a total of 63 phrases can be used for both record /playback and rom playback operation. . . . pin 39 65 64 32 31 24-30 63
msm6789a/6789l ?semiconductor pin descriptions (for msm6789a (5 v version)) (continued) symbol type description bro br1 i bit rate selection. this pin selects one of the following three types of bit rate (master clock frequency f osc = 8.192 mhz). this pin is invalid during the rom playback operation. pdmd *1 i transition to the power-down state. vd0-vd3 i these pins set the voice detect level for the voice triggered starting and unvoiced-part elimination. this pin selects the voice triggered starting or the unvoiced-part elimination. vds i br1 br0 bit rate l l 16.0 kbps l h h h l h 12.6 kbps 10.0 kbps unused low level: the msm6789a automatically goes to the power-down state, except when the record/playback operation is performed. high level: the msm6789a automatically goes to the standby state, instead of the power-down state, except when the record/playback operation is performed. in this case, the msm6789a can be placed in the power-down state by setting the reset or pdwn pin to a high level. if an external circuit is used for the built-in lpf, this standby mode must be selected by applying a high level to the pdmd pin. this pin outputs a high level while the record/playback operation is being performed. output to indicate the enable or disable state of the operation for specifying a phrase. when continuous rom playback is performed, the next phrase can be specified after the nar pin goes to high positively. mon o nar o pin 35 36 33 67-70 38 72 71 voice triggered starting: note: when neither the voice triggered starting nor the unvoiced-part elimination is used, input a low level to vd0 to vd3. input a high level to the vds pin. then set the voice detect level with vd0 to vd3 pins. unvoiced-part elimination: input a low level to the vds pin. then set the voice detect level with vd0 to vd3 pins. *1 when dram is selected, be sure to set the pdmd pin to a high level.
?semiconductor msm6789a/6789l absolute maximum ratings (for msm6789a (5 v version)) parameter symbol rating condition unit power supply voltage v dd ?.3 to +7.0 ta=25? v input voltage v in ?.3 to v dd +0.3 ta=25? v storage temperature t stg ?5 to +150 ? ? recommended operating conditions (for msm6789a (5 v version)) electrical characteristics (for msm6789a (5 v version)) dc characteristics *1 applies to all inputs excluding the xt pin. *2 applies to the xt pin. *3 applies to the input pins with pull-up resistor ( st , sp , pause , del ) excluding the xt pin. *4 the record/playback operation must be performed at the power supply voltage of 4.5 to 5.5 v. the msm6789a operates at 3.5 to 5.5 v when the serial register is backed up. parameter symbol condition high input voltage v ih ? low input voltage v il ? min. 0.8 v dd ? typ. ? ? unit v v max. ? 0.2 v dd high output voltage v oh i oh =?0 m a v dd ?.3 ? v ? low output voltage v ol i ol =2 ma ? ? v 0.45 high input current *1 i ih1 v ih =v dd ? ? m a 10 high input current *2 i ih2 v ih =v dd ? ? m a 20 low input currcent *1 i il1 v il =gnd ?0 ? m a ? low input current *2 i il2 v il =gnd ?0 ? m a ? low input current *3 i il3 v il =gnd ?00 ? m a ?0 power down current no load serial register connected i dds1 ? ? m a 10 ? 200 m a ? i dds2 no load dram connected operating current consumption i dd f osc =8 mhz, no load ? 20 ma 35 dv dd =av dd =4.5 to 5.5 v *4 dgnd=agnd=0 v, ta=0 to 70? parameter symbol range condition unit power supply voltage v dd +3.5 to +5.5 *4 dgnd=agnd=0 v v operating temperature t op 0 to +70 ?c master clock frequencuy f osc 6.0 to 8.192 mhz
msm6789a/6789l ?semiconductor parameter symbol condition da output relative error ? v dae ? no load fin admissible input voltage range v fin ? min. ? 1 typ. ? ? unit mv v max. 10 v dd ? fin input impedance r fin 1 ? m w ? op-map open loop gain g op 40 ? db ? op-amp input impedance r ina 1 ? m w ? op-amp load resistance r outa 200 ? k w ? aout load resistance r aout 50 ? k w ? fout load resistance r fout 50 ? k w ? ? f in =0 to 4khz ? ? ? ? dv dd =av dd =4.5 to 5.5 v dgnd=agnd=0 v ta=0 to 70? analog characteristics
?semiconductor msm6789a/6789l block diagram (for msm6789l (3.3 v version)) mcum reset pdwn pdmd vds rom mon nar del st sp pause ca0 ca1 ca2 ca3 ca4 ca5 xt xt rec/ play br0 min mout lin osc latch + + lout amon fin aout fout adin sg sgc sady sadx sas rwck we cs1 cs2 cs3 cs4 rsel1 rsel2 di/o drom data i/o memory controller sbc analyzer/synthesizer lpf 12-bit adc 12-bit dac sg circuit dv dd av dd dgnd agnd phrase register address controller timing controller test test test circuit tdt0 to tdt3 tmd4 tst tck sync tdt4 to tdt7 tmd3 tmd0 to br1 tas pcm synthesizer compare circuit vd0 vd1 vd2 vd3 msel1 msel2
msm6789a/6789l ?semiconductor pin configuration (top view) (for msm6789l (3.3 v version)) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 lout sgc sg av dd amon fin aout fout adin dgnd rom vds test br1 br0 mcum pause del pdmd nc nc nc nc nc nc tmd4 tmd3 tmd2 tmd1 tmd0 tdt7 tdt6 tdt5 tdt4 tdt3 tdt2 tdt1 tdt0 sync tst tck ca0 ca1 ca2 ca3 nc ca5 sady sadx tas sas rwck we di/o mon nar vd3 vd2 vd1 test rec/ play st sp test pdwn reset vd0 msel2 msel1 rsel2 rsel1 dgnd agnd min mout lin 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 cs1 cs2 cs3 cs4 drom dv dd xt xt nc nc nc nc nc nc nc nc test 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 test nc ca4 nc nc nc 100-pin plastic qfp nc : no-connection pin
?semiconductor msm6789a/6789l pin descriptions (for msm6789l (3.3 v version)) symbol type description dv dd ? digital power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the dgnd pin. av dd ? analog power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the agnd pin. dgnd ? digital ground. agnd ? analog ground. sg, sgc ? output for analog circuit reference voltage (signal ground). min inverting input of the built-in op amplifier. the non-inverting input pin is internally connected to sg (signal ground). lin i mout output of the built-in op amplifier for min and lin. lout o amon o connected to the lout pin in the recording mode and to the da converter output in the playback mode. this pin connects the built-in lpf input (fin pin). fin i fout o output of the built-in lpf. this pin connects the ad converter input (adin pin). adin i input of the built-in 12-bit ad converter. aout o output of the built-in lpf. this pin outputs playback waveforms and connects an external speaker drive amplifier. sady they also connect to sad pin of serial register and serial voice rom. these pins output leading addresses of read/write. sadx o this pin connects to tas pin of serial register and serial voice rom. this pin is used to set serial addresses from the sadx and sady pins into the internal address counter of the serial register and serial voice rom. tas o this pin connects to the sas pin of the serial register and the sasx and sasy pins of the serial voice rom. clock pin to write serial addresses. sas o this pin connects to the rwck pin of the serial register and the rdck pin of the serial voice rom. clock pin to read data from and write data into the serial register. rwck o input of the built-in lpf. pin 90 47 40, 55 54 48, 49 53 51 52 50 46 45 43 42 44 79 78 77 76 75 we o write enable. this pin connects to the we pin of the serial register and dram. this pin selects either read or write mode. di/o i/o data i/o. this pin connects to the din and dout pins of the serial register and dram. this pin outputs write data and inputs read data. drom i data rom. this pin connects to the dout pin of the serial voice rom. cs1 chip select. these pins connect to cs pin of the serial register and the cs ( cs1 , cs2 , cs3 ) pins of the serial voice rom. cs3 o cs4 cs2 74 73 85 81 83 84 82
msm6789a/6789l ?semiconductor pin descriptions (for msm6789l (3.3 v version)) (continued) symbol type description msel1 i these pins select the capacity of the memory to be connected externally. these pins select the number of and serial registers to be connected externallly. msel2 i pin 58 59 mode selection. low level : stand-alone mode high level : microcontroller interface mode pdwn i power down. when a low level is input, the msm6789l goes to the power down state. unlike the reset pin, this pin does not force the msm6789l to be reset. when a low level is applied to this pin during recording operation, the msm6789l is halted, and will be maintained in the power down state while pdwn is low level. after this pin is restored to a high level, postprocessing for recording will be performed. oscillator connection. when an external clock is used, input the clock through this pin. during the power down state, this pin must be set to the ground level. xt i test msm6789l test. input a low level to the test pin and a high level to the test pin. rsel1 i test i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity llll 4m 1 lllh 4m 2 llhl 4m 3 l l h h 4m 4 mcum i oscillator connection. when an external clock is used, this pin must be left open. xt o msm6789l test. this pin must be left open. tmd3-tmd0 tdt7-tdt0 sync i/o these pins must be left open as they are msm6789l test pins. tdt3-tdt0 i/o msm6789l test. input a low level signal. tst tck tmd4 i a high input level causes the msm6789l to be initialized and to go into the power down state. reset i 60 91 56 37 57 34 92 9-12 17-20 22 62 13-20 23 21 8 61
?semiconductor msm6789a/6789l pin descriptions (for msm6789l (3.3 v version)) (continued) symbol type description rom i playback operation. when set to low, this pin selects the record/playback operation (only for the sbc method). when set to high, it selects the rom playback operation (for the sbc and pcm methods). rec/ play i recording mode or playback mode selection. this pin is invalid during the rom playback operation. when set to low, it selects the playback mode. when set to high, it selects the recording mode. st i start playback. when a low-level pulse is applied to this pin, the record/playback or rom playback is started. playback pause. when a low-level pulse is applied to this pin, the record/playback or rom operation is stopped temporarily. pause i del i phrase delection. when a low level pulse is applied to this pin, all phrase deletion or specified phrase deletion can be performed according to the setting of pins ca0 through ca5, ch00: all phrase deletion ch01 to ch3f: specified phrase deletion after power up, be sure to input a reset signal and then delete all phrases. after completing this procedure, start the record/playback operation. desired phrase specification. a total of 63 phrases can be specified indepedently for the record/playback operation and the rom playback operation. ca0-ca5 i sp i stop playback. when a low-level pulse is applied to this pin, the record/playback or rom playback is stopped. ca5 ca4 ca3 ca2 ca1 ca0 phrase no. remarks llllll ch00 all phrase deletion lllllh ch01 . . . . . . . . . . . . . . . ch02 llllh l . . . hhhhh l ch3e hhhhhh ch3f a total of 63 phrases can be used for both record /playback and rom playback operation. . . . pin 39 65 64 32 31 24-30 63
msm6789a/6789l ?semiconductor pin descriptions (for msm6789l (3.3 v version)) (continued) symbol type description bro br1 i bit rate selection. this pin selects one of the following three types of bit rate (master clock frequency f osc = 8.192 mhz). this pin is invalid during the rom playback operation. pdmd *1 i transition to the power-down state. vd0-vd3 i these pins set the voice detect level for the voice triggered starting and unvoiced-part elimination. this pin selects the voice triggered starting or the unvoiced-part elimination. vds i br1 br0 bit rate l l 16.0 kbps l h h h l h 12.6 kbps 10.0 kbps unused low level: the msm6789l automatically goes to the power-down state, except when the record/playback operation is performed. high level: the msm6789l automatically goes to the standby state, instead of the power-down state, except when the record/playback operation is performed. in this case, the msm6789l can be placed in the power-down state by setting the reset or pdwn pin to a high level. if an external circuit is used for the built-in lpf, this standby mode must be selected by applying a high level to the pdmd pin. this pin outputs a high level while the record/playback operation is being performed. output to indicate the enable or disable state of the operation for specifying a phrase. when continuous rom playback is performed, the next phrase can be specified after the nar pin goes to high positively. mon o nar o pin 35 36 33 67-70 38 72 71 voice triggered starting: note: when neither the voice triggered starting nor the unvoiced-part elimination is used, input a low level to vd0 to vd3. input a high level to the vds pin. then set the voice detect level with vd0 to vd3 pins. unvoiced-part elimination: input a low level to the vds pin. then set the voice detect level with vd0 to vd3 pins. *1 when dram is selected, be sure to set the pdmd pin to a high level.
?semiconductor msm6789a/6789l absolute maximum ratings (for msm6789l (3.3 v version)) recommended operating conditions (for msm6789l (3.3 v version)) parameter symbol range condition unit power supply voltage v dd +3.0 to +3.6 dgnd=agnd=0 v v operating temperature t op 0 to +70 ?c master clock frequencuy f osc 6.0 to 8.192 mhz electrical characteristics (for msm6789l (3.3 v version)) dc characteristics parameter symbol condition high input voltage v ih ? low input voltage v il ? min. 0.85 v dd ? typ. ? ? unit v v max. ? 0.15 v dd high output voltage v oh i oh =?0 m a v dd ?.3 ? v ? low output voltage v ol i ol =2 ma ? ? v 0.45 high input current *1 i ih1 v ih =v dd ? ? m a 10 high input current *2 i ih2 v ih =v dd ? ? m a 20 low input currcent *1 i il1 v il =gnd ?0 ? m a ? low input current *2 i il2 v il =gnd ?0 ? m a ? low input current *3 i il3 v il =gnd ?00 ? m a ?0 power down current no load serial register connected i dds1 ? ? m a 10 ? 200 m a ? i dds2 no load dram connected operating current consumption i dd f osc =8 mhz, no load ? 20 ma 35 dv dd =av dd =3.0 to 3.6 v dgnd=agnd=0 v, ta=0 to 70? *1 applies to all inputs excluding the xt pin. *2 applies to the xt pin. *3 applies to the input pins with pull-up resistor ( st , sp , pause , del ) excluding the xt pin. parameter symbol rating condition unit power supply voltage v dd ?.3 to +7.0 ta=25? v input voltage v in ?.3 to v dd +0.3 ta=25? v storage temperature t stg ?5 to +150 ?c
msm6789a/6789l ?semiconductor parameter symbol condition da output relative error ? v dae ? no load fin admissible input voltage range v fin min. 1 typ. unit mv v max. 20 v dd ? fin input impedance r fin 1 m w op-map open loop gain g op 40 db op-amp input impedance r ina 1 m w op-amp load resistance r outa 400 k w aout load resistance r aout 100 k w fout load resistance r fout 100 k w f in =0 to 4khz dv dd =av dd =3.0 to 3.6 v dgnd=agnd=0 v ta=0 to 70? analog characteristics
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) this is an application circuit example when the msm6789a is used in stand-alone mode with four 8-mbit serial registers and two 2-mbit serial voice roms. + + sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 drom di/o we rwck tas sady sas sadx sadx sad sas sas tas tas rwck rwck we we di/o din dout test rs/a cs v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss speaker drive amplifier ca5 ca4 ca3 ca2 ca1 ca0 sw phrase selection recorder ic msm6789a 8m serial register msm6685 msm6685 msm6685 msm6685 2m serial voice rom msm6596a-xxx msm6596a-xxx av dd dv dd rec/ play pause sp st del rom tst tck tmd4 xt xt 8.192 mhz agnd dgnd rfsh nc reset msel1 vds dv dd vd0 vd3 vd2 vd1 mon nar tdt0-7 tmd0-3 sync test mcum lowpwr test br1 pdmd 4b/ 1b dram/ sr br0 hex sw pdwn ras a5-a10 cas0 - cas7 msel2 rsel1 rsel2 circuit 1 : application circuit in stand-alone mode with 8-mbit serial registers and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor rec/ play del st sp pause pdwn rsel1 test mcum vds lowpwr vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we a4( rwck ) a2( tas ) a0(sady) a3( sas ) a1(sadx) av dd dv dd cas v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss recorder ic msm6789a 4-mbit dram msm514100c 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd reset mon nar tdt0-7 tmd0-3 + + speaker drive amplifier dgnd agnd tst tck tmd4 xt xt 8.192 mhz rom hex sw msel2 msel1 rsel2 cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 a5 a6 a7 ras a8 a9 a10 din we a4 a2 a0 a1 dout a5 a6 a7 ras a8 a9 a10 a3 di/o we a4 a2 a0 a1 a5 a6 a7 a8 a9 a10 a3 msm514100c msm514100c msm514100c v cc v cc v cc cas v ss cas v ss cas v ss sync ca0 ca1 ca2 ca3 sw phrase selection test dram/ sr 4b/ 1b ca4 ca5 circuit 2 : application circuit in stand-alone mode with 4-mbit drams and 2-mbit serial voice roms. application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with four 4-mbit drams (1-bit type) and two 2-mbit serial voice roms.
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with one 4-mbit dram, four 1-mbit drams (1-bit type) and two 2-mbit serial voice roms. pdwn test mcum test vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 1-mbit dram msm511000b 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd rec/ play del st sp pause reset tst tck tmd4 mon nar tdt0-7 tmd0-3 xt xt 8.192 mhz + + speaker drive amplifier dgnd agnd rom hex sw msel2 rsel1 rsel2 vds ca0 ca1 ca2 ca3 sw phrase selection cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras a0~a9 a0~a msm511000b msm511000b msm511000b msel1 a0-a10 v cc cas v ss we din dout ras a0-a4 a0-a10 11 10 10 10 10 5 4-mbit dram msm514100c cas v ss cas v ss cas v ss v cc v cc v cc sync dram/ sr lowpwr 4b/ 1b ca4 ca5 circuit 3 : application circuit in stand-alone mode with 4-mbit drams, 1-mbit drams and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with two 16-mbit drams (1-bit type) and two 2-mbit serial voice roms. mcum vds test vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 16-mbit dram msm5116100a 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd rec/ play del st sp pause reset tst tck tmd4 mon nar tdt0-7 tmd0-3 xt xt 8.192 mhz + + speaker drive amplifier dgnd agnd rom hex sw pdwn test msel2 msel1 rsel1 rsel2 ca0 ca1 ca2 ca3 sw phrase slection cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras din we dout a0-a10 a11 ras a0-a10 msm5116100a v cc cas v ss 11 a0-a10 11 a0-a10 5 a0-a4 sync ca4 ca5 dram/ sr 4b/ 1b lowpwr circuit 4 : application circuit in stand-alone mode with 16- mbit drams, and 2-mbit serial voice roms.
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with four 4-mbit drams (4-bit type) and two 2-mbit serial voice roms. pdwn rsel1 test mcum vds lowpwr vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy v ss recorder ic msm6789a 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd rec/ play del st sp pause reset mon nar tdt4-7 tmd0-3 + + speaker drive amplifier dgnd agnd tst tck tmd4 xt xt 8.192 mhz rom hex sw msel2 msel1 rsel2 cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 ras [tdt3]dq4 a0-a9 a10 msm514400c msm514400c v cc v cc cas v ss cas v ss ca0 ca1 ca2 ca3 sw phrace slection test dram/ sr 4b/ 1b cas v ss v cc 4-mbit dram msm514400c we ras a0~a9 msm514400c v cc cas v ss dq1 dq2 dq3 dq4 10 10 10 10 5 a0-a4 v cc sync ca4 ca5 oe circuit 5 : application circuit in stand-alone mode with 4-mbit drams and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with one 4-mbit dram, four 1-mbit drams (4-bit type), and two 2-mbit serial voice roms. mcum test vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 1-mbit dram msm514256b 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd rec/ play del st sp pause reset tst tck tmd4 mon nar tdt4-7 tmd0-3 xt xt 8.192 mhz + + speaker drive amplifier dgnd agnd rom hex sw msel2 rsel1 rsel2 vds ca0 ca1 ca2 ca3 sw phrase selection cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras a0-a8 msm514256b msm514256b msm514256b msel1 a0-a9 v cc cas v ss we ras a0-a4 a0-a9 10 9 99 9 5 4-mbit dram msm514400c cas v ss cas v ss cas v ss v cc v cc v cc pdwn test dram/ sr lowpwr a10 [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 [tdt3]dq4 dq1 dq2 dq3 dq4 4b/ 1b cas v ss ca4 ca5 oe sync circuit 6 : application circuit in stand-alone mode with 4-mbit drams, 1-mbit dram, and 2m-bit serial voice roms.
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in stand-alone mode with two 16-mbit drams (4-bit type) and two 2-mbit serial voice roms. mcum vds test vd3 vd2 vd1 vd0 sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 16-mbit dram msm5117400a 2m serial voice rom msm6596a-xxx msm6596a-xxx br0 br1 pdmd rec/ play del st sp pause reset tst tck tmd4 mon nar tdt4-7 tmd0-3 xt xt 8.192 mhz + + speaker drive amplifier dgnd agnd rom hex sw pdwn test msel2 msel1 rsel1 rsel2 ca0 ca1 ca2 ca3 sw phrase selection cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras we ras msm5117400a v cc cas v ss a0-a10 a0-a10 11 a0-a10 11 a0-a10 5 a0-a4 dram/ sr 4b/ 1b [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 [tdt3]dq4 dq1 dq2 dq3 dq4 lowpwr sync ca4 ca5 oe circuit 7 : application circuit in stand-alone mode with 16-mbit drams and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789l (3.3 v version)) this is an application circuit example when the msm6789l is used in stand-alone mode with four 4-mbit serial registers and two 2-mbit serial voice roms. + + sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 drom di/o we rwck tas sady sas sadx sadx sad sas sas tas tas rwck rwck we we di/o din dout test rs/a cs v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss speaker drive amplifier ca5 ca4 ca3 ca2 ca1 ca0 sw phrase selection recorder ic msm6789l 4m serial register msm66v84b msm66v84b msm66v84b msm66v84b 2m serial voice rom msm6596a-xxx msm6596a-xxx av dd dv dd rec/ play pause sp st del rom tst tck tmd4 xt xt 8.192 mhz agnd dgnd rfsh nc reset msel1 vds dv dd vd0 vd3 vd2 vd1 mon nar tdt0-7 tmd0-3 sync test mcum test br1 pdmd br0 hex sw pdwn msel2 rsel1 rsel2 circuit 8 : application circuit in stand-alone mode with 4-mbit serial registers and 2-mbit serial voice roms.
?semiconductor msm6789a/6789l microcontroller interface mode features sbc method built-in 12-bit ad converter built-in 12-bit da converter built-in microphone amplifier built-in low-pass filter attenuation characteristics ?0 db/oct external memories msm6789a (5 v version) general-purpose dram, 32 mbits maximum (for variable messages) 1-mbit dram : can be directly driven (msm514256b, msm511000b) 4-mbit dram : can be directly driven (msm514400c, msm514100c) 16-mbit dram : can be directly driven (msm5117400a, msm5116100a) aram, 32 mbits maximum (for variable messages) note: use the first 64 kbits with no failed bits for the aram. serial register, 32 mbits maximum (for variable messages) 4-mbit serial register : can be directly driven (msm6684b) 8-mbit serial register : can be directly driven (msm6685) msm6789l (3.3 v version) serial register, 16 mbits maximum (for variable messages) 4-mbit serial register: can be directly driven (msm66v84b) msm6789a (5 v version) and msm6789l (3.3 v version) serial voice rom, 4 mbits maximum (for fixed messages) 1-mbit serial voice rom : can be directly driven (msm6595a) 2-mbit serial voice rom : can be directly driven (msm6596a) 3-mbit serial voice rom : can be directly driven (msm6597a) bit rate 10.0, 12.6, 16.0 kbps (at 8 khz sampling freq.) 7.5, 9.5, 12.0 kbps (at 6 khz sampling freq.) maximum recording time (when one 8-mbit serial register is connected) 13.8 minutes (for 10.0 kbps sbc) 18.4 minutes (for 7.5 kbps sbc) 11.0 minutes (for 12.6 kbps sbc) 14.6 minutes (for 9.5 kbps sbc) 8.6 minutes (for 16.0 kbps sbc) 11.5 minutes (for 12.0 kbps sbc) number of phrases 63 phrases for variable messages 255 phrases for fixed messages standard linear pcm playback or oki nonlinear pcm playback can be selected. voice triggered starting function (voice detect level can be set) uuvoiced-part elimination function (voice detect level can be set) pausing function master clock frequency: 6.0 mhz to 8.192 mhz power supply voltage: msm6789a: single 5 v power supply msm6789l: single 3.3 v power supply package options: msm6789a: 100-pin plastic qfp (qfp100-p-1420-bk) (product name: MSM6789AGS-BK) msm6789l: 100-pin plastic qfp (qfp100-p-1420-bk) (product name: msm6789lgs-bk)
msm6789a/6789l ?semiconductor block diagram (for msm6789a (5 v version)) test test nar vpm rpm busy ce xt xt min mout lin osc ? + ? + lout amon fin aout fout adin sg sgc drom di/o data i/o memory controller sbc analyzer/synthesizer lpf 12-bit adc 12-bit dac sg circuit dv dd av dd dgnd agnd test circuit microcontroller i/f status register ce rd wr d0 d1 d2 d3 address controller rsel1 rsel2 timing controller tst tck mcum reset pdwn mon acon extd tmd4 tdt4 to tdt7 tmd0 to tmd3 sync msel2 msel1 we cs1 cs2 cs3 cs4 a0(sady) a1(sadx) a3( sas ) a4( rwck ) a2( tas ) ras a5 to a10 cas0 to cas7 pcm synthesizer lowpwr osc (rc) tdt0 to tdt3 [dq1] to [dq4] dram/ sr 4b/ 1b
?semiconductor msm6789a/6789l pin configuration (top view) (for msm6789a (5 v version)) 100-pin plastic qfp ( ) : pins for connecting serial voice rom. [ ] : pins for connecting 4-bit type dram. nc : no-connection pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 lout sgc sg av dd amon fin aout fout adin dgnd test test extd test ce mcum acon vpm test a10 a9 a8 a7 a6 a5 tmd4 tmd3 tmd2 tmd1 tmd0 tdt7 tdt6 tdt5 tdt4 tdt3 tdt2 tdt1 tdt0 sync tst tck d0 d1 d2 d3 busy rpm a0 (sady) a1 (sadx) a2 ( tas ) a3 ( sas ) a4 ( rwck ) we di/o mon nar test test test dram/ sr ce rd wr test pdwn reset test msel2 msel1 rsel2 rsel1 dgnd agnd min mout lin [dq4] [dq3] [dq2] [dq1] 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 cs1 cs2 cs3 cs4 drom ras dv dd xt xt cas0 cas1 cas2 cas3 cas4 cas5 cas6 cas7 4b/ 1b 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 lowpwr nc nc nc nc
msm6789a/6789l ?semiconductor pin descriptions (for msm6789a (5 v version)) symbol type description dv dd ? digital power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the dgnd pin. av dd ? analog power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the agnd pin. dgnd ? digital ground. agnd ? analog ground. sg, sgc o output for analog circuit reference voltage (signal ground). min inverting input of the built-in op amplifier. the non-inverting input pin is internally connected to sg (signal ground). lin i mout output of the built-in op amplifier for min and lin. lout o amon o connected to the lout pin in the recording mode and to the da converter output in the playback mode. this pin connects the built-in lpf input (fin pin). fin i fout o output of the built-in lpf. this pin connects the ad converter input (adin pin). adin i input of the built-in 12-bit ad converter. aout o output of the built-in lpf. this pin outputs playback waveforms and connects an external speaker drive amplifier. this pin selects whether memory to be connected externally is dram or serial register. dram/ sr i low level high level this pin selects either 1-bit type dram or 4-bit type dram. 4b/ 1b i a0 (sady) these pins connect to a0 and a1 of dram at the time of dram selection. they also connect to sad pin of serial register and serial voice rom at the time of serial register selection. these pins output leading addresses of read/write. a1 (sadx) o this pin connects to a2 of dram at the time of dram selection. it also connects to tas pin of serial register and serial voice rom at the time of serial register selection. this pin is used to set serial addresses from the sadx and sady pins into the internal address counter of the serial register and serial voice rom. a2 ( tas ) o this pin connects to a3 of dram at the time of dram selection. it also connects to the sas pin of the serial register and the sasx and sasy pins of the serial voice rom at the time of serial register selection. clock pin to write serial addresses. a3 ( sas ) o this pin connects to a4 of dram at the time of dram selection. it also connects to the rwck pin of the serial register and the rdck pin of the serial voice rom at the time of serial register selection. clock pin to read data from and write data into the serial register. a4 ( rwck ) o input of the built-in lpf. : serial register : dram low level high level : 1-bit type : 4-bit type a10-a5 o these pins connect to pins a5-a10 of dram at the time of dram selection. these pins output addresses of read/write. pin 90 47 40, 55 54 48, 49 53 52 50 46 45 43 42 44 66 88 79 78 77 76 75 1-6 51
?semiconductor msm6789a/6789l symbol type description we o write enable. this pin connects to the we pin of the serial register and dram. this pin selects either read or write mode. di/o i/o data i/o. this pin connects to the din and dout pins of the serial register and dram. this pin is used to output write data and inputs read data. drom i data rom. this pin connects to the dout pin of the serial voice rom. ras o this is a row address strobe pin of dram at the time of dram selection. cas0 - cas7 o these are the column address strobe pins of dram at the time of dram selection. cas7, an addresss output pin, is connected to pin a11 of dram at the time of 16- mbit dram selection. cs1 chip slect. these pins connect cs pin of the serial register and the cs ( cs1 , cs2 , cs3 ) pins of the serial voice rom. cs3 o cs4 msel1 i these pins select the capacity of the memory to be connected externally. these pins select the number of drams and serial registers to be connected externallly. rsel1 i cs2 msel2 i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity llll 1m 4 lllh 4m 1 llhl 1m 8 l l h h 1m 4 + 4m 1 lhll 4m 2 lhlh 4m 2 lhhl 4m 3 lhhh 4m 3 hlll 4m 4 h l l h 16m 1 hlhl 4m 6 hlhh 4m 6 h h l l 4m 8 hhlh 4m 8 h h h l 16m 2 hhhh 16m 2 when dram is selected (dram/ sr = high level) pin 74 73 85 89 93-100 81 58 56 59 57 82 83 84 pin descriptions (for msm6789a (5 v version)) (continued)
msm6789a/6789l ?semiconductor pin descriptions (for msm6789a (5 v version)) (continued) symbol type description mode selection. low level : stand-alone mode high level : microcontroller interface mode pdwn i power down. when a low level is input the msm6789a goes to the power down state. unlike the reset pin, this pin does not force the msm6789a to be reset. when an low level is applied to this pin during recording operation, the msm6789a is halted, and will be maintained in the power down state while pdwn is low level. after this pin is restored to a high level, postprocessing for recording will be performed. rsel1 i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity llll 4m 1 lllh 4m 2 llhl 4m 3 l l h h 4m 4 lhll 8m 1 lhlh 8m 2 lhhl 8m 3 lhhh 8m 4 when serial register is selected (dram/ sr = low level) mcum i this pin selects cas -before- ras refresh period of dram at the time of power down when dram is selected. low level : 15 ? max. high level : 125 ? max. lowpwr i a high input level causes the msm6789a to be initialized and to go into the power down state. reset i bidirectional data bus to transfer commands and data to and from an external microcontroller. d0 i/o d1 d2 d3 write pulse input. inputting a low pulse to wr pin causes a command or data to be input via d0 to d3 pins. wr i read pulse input. inputting a low pulse to rd pin causes status bits or data to be output via d0 to d3 pins. rd i chip enable input. when the ce pin is set to low level and the ce pin is set to a high level, the write pulse ( wr ) or read pulse ( rd ) can be accepted. when the ce pin is set to a high level or ce pin is set to a low level, the write pulse ( wr ) and read pulse ( rd ) cannot be accepted so that data cannot be communicated via d0 to d3 pins. ce ce i pin 60 56 57 34 87 62 24 25 26 27 63 64 65 35
?semiconductor msm6789a/6789l pin descriptions (for msm6789a (5 v version)) (continued) symbol type description oscillator connect. when an external clock is used, input the clock through this pin. at the power-down state, this pin must be set to the ground level. xt i test msm6789a test. input a low level to the test pin and a high level to the test pin. test i oscillator connect. when an external clock is uesd, this pin must be left open. xt o msm6789a test. this pin must be left open. tmd3-tmd0 tdt7-tdt0 sync i/o connect these pins to dq1 to dq4 of dram at the time of 4-bit type dram selection. otherwise these pins must be left open as they are msm6789a test pins. tdt3-tdt0 [dq4]-[dq1] i/o msm6789a test. input a low level. tst tck tmd4 i rpm. this pin outputs a high level during recording or playback operation. the state of this pin is the same as the contents of the rpm bit of the status register. rpm o vpm. this pin outputs a high level during standby for voice incoming after the start of recording by voice triggered starting or unvoiced-part elimination. also outputs a high level when the record/playback is stopped temporarily by inputting the pause command. the state of this pin is the same as the contents of the vpm bit of the status register. vpm o nar. this nar pin indicates whether the phrase designation by the chan command is enabled or disabled. in the rom play back operation, specify the next phrase after verifying that the nar pin is at high level and input the start command. nar o p op noise suppression select. this pin selects whether the pop noise suppression circuit is used. low level : the pop noise suppression circuit is not used. high level : the pop noise suppression circuit is used. the dc level is shifted by the lev command. acon i extd. in the record/playback operation by the ext command, input a high level for read/write of sbc data. input a low level for usual command input and status output. extd i mon. this pin outputs a high level while the record/playback operation is being performed. outputs a synchronizing clock while record/playback activated by the ext command is being performed. mon o busy. this pin outputs a high level while a command is being executed. when this pin is held high, do not apply any data to d0 to d3 pins. the state of this pin is the same as the contents of the busy bit of the status register. busy o pin 91 36, 37-39, 61, 67-70 33 92 9-12 13-20 21 17-20 22 23 8 30 31 71 32 37 72 29
msm6789a/6789l ?semiconductor absolute maximum ratings (for msm6789a (5 v version)) parameter symbol rating condition unit power supply voltage v dd ?.3 to +7.0 ta=25? v input voltage v in ?.3 ~ v dd +0.3 ta=25? v storage temperature t stg ?5 to +150 ? ? recommended operating conditions (for msm6789a (5 v version)) electrial characteristics (for msm6789a (5 v version)) dc characteristics *1 applies to all inputs excluding the xt pin. *2 applies to the xt pin. *3 the record/playback operation must be performed at the power supply voltage of 4.5 to 5.5 v. the msm6789a operates at 3.5 to 5.5 v when the serial register is backed up. parameter symbol condition high input voltage v ih ? low input voltage v il ? min. 0.8 v dd ? typ. ? ? unit v v max. ? 0.2 v dd high output voltage v oh i oh =e40 m a v dd e0.3 ? v ? low output voltage v ol i ol =2 ma ? ? v 0.45 high input current *1 i ih1 v ih =v dd ? ? m a 10 high input current *2 i ih2 v ih =v dd ? ? m a 20 low input current *1 i il1 v il =gnd e10 ? m a ? low input current *2 i il2 v il =gnd e20 ? m a ? operating current consumption i dd f osc =8 mhz, no load ? 20 ma 35 power down current no load serial register connected i dds1 ? ? m a 10 ? 200 m a ? i dds2 no load dram connected dv dd =av dd =4.5 to 5.5 v *3 dgnd=agnd=0 v ta=0 to 70?c parameter symbol range condition unit power supply voltage v dd +3.5 to +5.5 *3 dgnd=agnd=0 v v operating temperature t op 0 to +70 ?c master clock frequencuy f osc 6.0 to 8.192 mhz
?semiconductor msm6789a/6789l parameter symbol condition da output relative error ? v dae ? no load fin admissible input voltage range v fin ? min. 1 typ. unit mv v max. 10 v dd ? fin input impedance r fin 1 m w ? op-amp open loop gain g op 40 ? db ?- op-amp input impedance r ina 1? m w ? op-amp load resistance r outa 200 ? k w ? aout load resistance r aout 50 ? k w ? fout load resistance r fout 50 ? k w ? ? f in =0 to 4 khz ? ? ? ? dv dd =av dd =4.5 to 5.5 v dgnd=agnd=0 v ta=0 to 70?c analog characteristics
msm6789a/6789l ?semiconductor block diagram (for msm6789l (3.3 v version)) test test nar vpm rpm busy ce xt xt min mout lin osc + + lout amon fin aout fout adin sg sgc drom di/o data i/o memory controller sbc analyzer/synthesizer lpf 12-bit adc 12-bit dac sg circuit dv dd av dd dgnd agnd test circuit microcontroller i/f status register ce rd wr d0 d1 d2 d3 address controller rsel1 rsel2 timing controller tst tck mcum reset pdwn mon acon extd tmd4 tdt4 to tdt7 tmd0 to tmd3 sync msel2 msel1 we cs1 cs2 cs3 cs4 sady sadx sas rwck tas pcm synthesizer tdt0 to tdt3
?semiconductor msm6789a/6789l pin configuration (top view) (for msm6789l (3.3v version)) 100-pin plastic qfp nc : no-connection pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 lout sgc sg av dd amon fin aout fout adin dgnd test test extd test ce mcum acon vpm test tmd4 tmd3 tmd2 tmd1 tmd0 tdt7 tdt6 tdt5 tdt4 tdt3 tdt2 tdt1 tdt0 sync tst tck d0 d1 d2 d3 busy rpm sady sadx tas sas rwck we di/o mon nar test test test test ce rd wr test pdwn reset test msel2 msel1 rsel2 rsel1 dgnd agnd min mout lin 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 cs1 cs2 cs3 cs4 drom dv dd xt xt test 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 test nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc
msm6789a/6789l ?semiconductor pin descriptions (for msm6789l (3.3 v version)) symbol type description dv dd digital power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the dgnd pin. av dd ? analog power supply. insert a bypass capacitor of 0.1 m f or more between this pin and the agnd pin. dgnd ? digital ground. agnd analog ground. sg, sgc o output for analog circuit reference voltage (signal ground). min inverting input of the built-in op amplifier. the non-inverting input pin is internally connected to sg (signal ground). lin i mout output of the built-in op amplifier for min and lin. lout o amon o connected to the lout pin in the recording mode and to the da converter output in the playback mode. this pin connects the built-in lpf input (fin pin). fin i fout o output of the built-in lpf. this pin connects the ad converter input (adin pin). adin i input of the built-in 12-bit ad converter. aout o output of the built-in lpf. this pin outputs playback waveforms and connects an external speaker drive amplifier. sady these pins connect to sad pin of serial register and serial voice rom. these pins output leading addresses of read/write. sadx o this pin connects to tas pin of serial register and serial voice rom. this pin is used to set serial addresses from the sadx and sady pins into the internal address counter of the serial register and serial voice rom. tas o this pin connects to the sas pin of the serial register and the sasx and sasy pins of the serial voice rom. clock pin to write serial addresses. sas o this pin connects to the rwck pin of the serial register and the rdck pin of the serial voice rom. clock pin to read data from and write data into the serial register. rwck o input of the built-in lpf. pin 90 47 40, 55 54 48, 49 53 52 50 46 45 43 42 44 79 78 77 76 75 51 we o write enable. this pin connects to the we pin of the serial register and dram. this pin selects either read or write mode. di/o i/o data i/o. this pin connects to the din and dout pins of the serial register and dram. this pin is used to output write data and inputs read data. drom i data rom. this pin connects to the dout pin of the serial voice rom. cs1 chip slect. these pins connect cs pin of the serial register and the cs ( cs1 , cs2 , cs3 ) pins of the serial voice rom. cs3 o cs4 msel1 i these pins select the capacity of the memory to be connected externally. cs2 msel2 i 74 73 85 81 58 59 82 83 84
?semiconductor msm6789a/6789l pin descriptions (for msm6789l (3.3 v version)) (continued) symbol type description mode selection. low level : stand-alone mode high level : microcontroller interface mode pdwn i power down. when a low level is input the msm6789l goes to the power down state. unlike the reset pin, this pin does not force the msm6789l to be reset. when an low level is applied to this pin during recording operation, the msm6789l is halted, and will be maintained in the power down state while pdwn is low level. after this pin is restored to a high level, postprocessing for recording will be performed. rsel1 i rsel2 i msel2 msel1 rsel2 rsel1 memory capacity l l l l 4m 1 l l l h 4m 2 l l h l 4m 3 l l h h 4m 4 these pins select the number of serial registers to be connected externallly. mcum i a high input level causes the msm6789l to be initialized and to go into the power down state. reset i bidirectional data bus to transfer commands and data to and from an external microcontroller. d0 i/o d1 d2 d3 write pulse input. inputting a low pulse to wr pin causes a command or data to be input via d0 to d3 pins. wr i read pulse input. inputting a low pulse to rd pin causes status bits or data to be output via d0 to d3 pins. rd i chip enable input. when the ce pin is set to low level and the ce pin is set to a high level, the write pulse ( wr ) or read pulse ( rd ) can be accepted. when the ce pin is set to a high level or ce pin is set to a low level, the write pulse ( wr ) and read pulse ( rd ) cannot be accepted so that data cannot be communicated via d0 to d3 pins. ce ce i pin 60 56 57 34 62 24 25 26 27 63 64 65 35 rpm. this pin outputs a high level during recording or playback operation. the state of this pin is the same as the contents of the rpm bit of the status register. rpm o busy. this pin outputs a high level while a command is being executed. when this pin is held high, do not apply any data to d0 to d3 pins. the state of this pin is the same as the contents of the busy bit of the status register. busy o 30 29
msm6789a/6789l ?semiconductor pin descriptions (for msm6789l (3.3 v version)) (continued) symbol type description oscillator connect. when an external clock is used, input the clock through this pin. at the power-down state, this pin must be set to the ground level. xt i test msm6789l test. input a low level to the test pin and a high level to the test pin. test i oscillator connect. when an external clock is uesd, this pin must be left open. xt o msm6789l test. this pin must be left open. tmd3-tmd0 tdt7-tdt0 sync i/o these pins must be left open as they are msm6789l test pins. tdt3-tdt0 i/o msm6789l test. input a low level. tst tck tmd4 i vpm. this pin outputs a high level during standby for voice incoming after the start of recording by voice triggered starting or unvoiced-part elimination. also outputs a high level when the record/playback is stopped temporarily by inputting the pause command. the state of this pin is the same as the contents of the vpm bit of the status register. vpm o nar. this nar pin indicates whether the phrase designation by the chan command is enabled or disabled. in the rom play back operation, specify the next phrase after verifying that the nar pin is at high level and input the start command. nar o p op noise suppression select. this pin selects whether the pop noise suppression circuit is used. low level : the pop noise suppression circuit is not used. high level : the pop noise suppression circuit is used. the dc level is shifted by the lev command. acon i extd. in the record/playback operation by the ext command, input a high level for read/write of sbc data. input a low level for usual command input and status output. extd i mon. this pin outputs a high level while the record/playback operation is being performed. outputs a synchronizing clock while record/playback activated by the ext command is being performed. mon o pin 91 36, 37-39, 61, 67-70 33 92 9-12 13-20 21 17-20 22 23 8 31 71 32 37 72
?semiconductor msm6789a/6789l absolute maximum ratings (for msm6789l (3.3 v version)) recommended operating conditions (for msm6789l (3.3 v version)) electrial characteristics (for msm6789l (3.3 v version)) dc characteristics *1 applies to all inputs excluding the xt pin. *2 applies to the xt pin. parameter symbol rating condition unit power supply voltage v dd ?.3 to +7.0 ta=25? v input voltage v in ?.3 ~ v dd +0.3 ta=25? v storage temperature t stg ?5 to +150 ?c parameter symbol range condition unit power supply voltage v dd +3.0 to +3.6 dgnd=agnd=0 v v operating temperature t op 0 to +70 ?c master clock frequencuy f osc 6.0 to 8.192 mhz parameter symbol condition high input voltage v ih low input voltage v il min. 0.85 v dd ? typ. unit v v max. 0.15 v dd high output voltage v oh i oh =e40 m av dd e0.3 ? v ? low output voltage v ol i ol =2 ma ? ? v 0.45 high input current *1 i ih1 v ih =v dd ?? m a 10 high input current *2 i ih2 v ih =v dd ?? m a 20 low input current *1 i il1 v il =gnd e10 ? m a ? low input current *2 i il2 v il =gnd e20 ? m a ? operating current consumption i dd f osc =8 mhz, no load ? 20 ma 35 power down current no load serial register connected i dds1 ?? m a 10 ? 200 m a ? i dds2 no load dram connected dv dd =av dd =3.0 to 3.6 v dgnd=agnd=0 v ta=0 to 70?c
msm6789a/6789l ?semiconductor parameter symbol condition da output relative error ? v dae ? no load fin admissible input voltage range v fin ? min. 1 typ. unit mv v max. 20 v dd ? fin input impedance r fin 1 m w ? op-amp open loop gain g op 40 ? db ?- op-amp input impedance r ina 1? m w ? op-amp load resistance r outa 400 ? k w ? aout load resistance r aout 100 ? k w ? fout load resistance r fout 100 ? k w ? ? f in =0 to 4 khz ? ? ? ? dv dd =av dd =3.0 to 3.6 v dgnd=agnd=0 v ta=0 to 70?c analog characteristics
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) this is an application circuit example when the msm6789a is used in microcontroller interface mode with four 8-mbit serial registers and two 2-mbit serial voice roms. + dgnd + d3 mcum rsel1 rsel2 ce test busy rpm vpm xt xt mon nar agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 drom di/o we rwck tas sady sas sadx av dd dv dd speaker drive amplifier recorder ic msm6789a d2 d1 d0 rd wr ce reset pdwn microcontroller sync tdt0-7 tmd0-3 tmd4 sadx sad sas sas tas tas rwck rwck we we di/o din dout test rs/a cs v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss 8.192 mhz 8m serial register msm6685 msm6685 msm6685 msm6685 2m serial voice rom msm6596a-xxx msm6596a-xxx rfsh nc lowpwr dram/ sr msel2 msel1 tst tck test extd acon 4b/ 1b cas0 - cas7 ras a5-a10 circuit 1 : application circuit in microcontroller interface mode with 8-mbit serial registers and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with four 4-mbit drams (1-bit type) and two 2-mbit serial voice roms. dgnd d3 reset rd wr mcum xt xt mon nar agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we a4( rwck ) a2( tas ) a0(sady) a3( sas ) a1(sadx) av dd dv dd cas v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss recorder ic msm6789a 4-mbit dram msm514100a 2m serial voice rom msm6596a-xxx msm6596a-xxx tdt0-7 tmd0-3 tmd4 ce 8.192 mhz + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 a5 a6 a7 ras a8 a9 a10 din we a4 a2 a0 a1 dout a5 a6 a7 ras a8 a9 a10 a3 di/o we a4 a2 a0 a1 a5 a6 a7 a8 a9 a10 a3 msm514100a msm514100a msm514100a v cc v cc v cc cas v ss cas v ss cas v ss d2 d1 d0 ce pdwn test sync vpm rpm busy microcontroller msel1 test extd tck tst acon rsel2 rsel1 lowpwr msel2 dram/ sr 4b/ 1b circuit 2 : application circuit in microcontroller interface mode with 4-mbit drams and 2-mbit serial voice roms.
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with one 4-mbit dram, four 1-mbit drams (1-bit type), and two 2-mbit serial voice roms. dgnd agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 1-mbit dram msm511000a 2m serial voice rom msm6596a-xxx msm6596a-xxx + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras a0-a9 msm511000a msm511000a msm511000a a0-a10 v cc cas v ss we din dout ras a0-a4 a0-a10 11 10 10 10 10 5 4-mbit dram msm514100a cas v ss cas v ss cas v ss v cc v cc v cc d3 reset rd rsel2 rsel1 wr mcum xt xt mon nar tdt0-7 tmd0-3 test tmd4 ce extd tck tst acon d2 d1 d0 ce pdwn test sync vpm rpm busy msel2 msel1 8.192 mhz microcontroller lowpwr dram/ sr 4b/ 1b cas v ss circuit 3 : application circuit in microcontroller interface mode with 4-mbit drams, 1-mbit drams, and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with two 16-mbit drams (1-bit type) and two 2-mbit serial voice roms. dgnd agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 16-mbit dram msm5116100a 2m serial voice rom msm6596a-xxx msm6596a-xxx + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras din we dout a0-a10 a11 ras a0-a10 msm5116100a v cc cas v ss 11 a0-a10 11 a0-a10 5 a0-a4 8.192 mhz microcontroller d3 reset rd rsel2 rsel1 wr mcum xt xt mon nar tdt0-7 tmd0-3 tmd4 ce test extd tck tst acon d2 d1 d0 ce pdwn test sync vpm rpm busy msel2 msel1 lowpwr dram/ sr 4b/ 1b circuit 4 : application circuit in microcontroller interface mode with 16-mbit drams and 2-mbit serial voice roms.
?semiconductor msm6789a/6789l dgnd d3 reset rd wr mcum xt xt mon nar agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we a10 a0-a9 av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 4-mbit dram msm514400c 2m serial voice rom msm6596a-xxx msm6596a-xxx tdt4-7 tmd0-3 tmd4 ce 8.192 mhz + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 ras [tdt3]dq4 we dq1 dq2 dq3 ras dq4 msm514400c msm514400c msm514400c v cc v cc v cc cas v ss cas v ss cas v ss d2 d1 d0 ce pdwn test sync vpm rpm busy microcontroller msel1 test extd tck tst acon rsel2 rsel1 lowpwr msel2 dram/ sr 4b/ 1b 10 10 10 10 5 oe application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with four 4-mbit drams (4-bit type) and two 2-mbit serial voice roms. circuit 5 : application circuit in microcontroller interface mode with 4-mbit drams and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with one 4-mbit dram, four 1-mbit drams (4-bit type), and two 2-mbit serial voice roms. dgnd agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorcder ic msm6789a 1-mbit dram msm514256b 2m serial voice rom msm6596a-xxx msm6596a-xxx + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras a0-a8 msm514256b msm514256b msm514256b a0-a9 v cc cas v ss we ras a0-a4 a0-a9 10 9 99 9 5 4-mbit dram msm514400c cas v ss cas v ss cas v ss v cc v cc v cc d3 reset rd rsel2 rsel1 wr mcum xt xt mon nar tdt4-7 tmd0-3 test tmd4 ce extd tck tst acon d2 d1 d0 ce pdwn test sync vpm rpm busy msel2 msel1 8.192 mhz microctontroller lowpwr dram/ sr 4b/ 1b a10 [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 [tdt3]dq4 dq1 dq2 dq3 dq4 cas v ss oe circuit 6 : application circuit in microcontroller interface mode with 4-mbit dram, 1-mbit drams, and 2-mbit serial voice roms.
?semiconductor msm6789a/6789l application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the msm6789a is used in microcontroller interface mode with two 16-mbit drams (4-bit type) and two 2-mbit serial voice roms. dgnd agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 cas4 di/o we av dd dv dd cas v ss v cc a1(sadx) sadx a3( sas ) sasx a2( tas ) tas a4( rwck ) rdck dout test cs1 cs2 v cc a0(sady) sady sasy drom v ss recorder ic msm6789a 16-mbit dram msm5117400a 2m serial voice rom msm6596a-xxx msm6596a-xxx + + speaker drive amplifier cas5 cas6 cas7 drom cas0 cas1 cas2 cas3 ras we a0~a10 ras a0-a10 msm5117400a v cc cas v ss 11 a0-a10 11 a0-a10 5 a0-a4 8.192 mhz microcontroller d3 reset rd rsel2 rsel1 wr mcum xt xt mon nar tdt4-7 tmd0-3 tmd4 ce test extd tck tst acon d2 d1 d0 ce pdwn test sync vpm rpm busy msel2 msel1 lowpwr dram/ sr 4b/ 1b [tdt0]dq1 [tdt1]dq2 [tdt2]dq3 [tdt3]dq4 dq1 dq2 dq3 dq4 oe circuit 7 : application circuit in microcontroller interface mode with 16-mbit drams and 2-mbit serial voice roms.
msm6789a/6789l ?semiconductor application circuits (for msm6789a (5 v version)) (continued) this is an application circuit example when the ext command is used for recording/playback. mcum + dgnd + d3 rsel1 rsel2 ce test acon xt xt mon nar agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 drom di/o we a4( rwck ) a2( tas ) a0(sady) a3( sas ) a1(sadx) av dd dv dd speaker drive amplifier recorder ic msm6789a d2 d1 d0 rd wr ce reset extd microcontroller tst tck test pdwn 8.192 mhz busy rpm vpm sync tdt0-7 tmd0-3 tmd4 msel1 msel2 lowpwr dram/ sr 4b/ 1b ras cas0 - cas7 a5-a10 circuit 8 : application circuit when ext command is used.
?semiconductor msm6789a/6789l application circuits (for msm6789l (3.3 v version)) this is an application circuit example when the msm6789l is used in microcontroller interface mode with four 4-mbit serial registers and two 2-mbit serial voice roms. circuit 9 : application circuit in microcontroller interface mode with 4-mbit serial registers and 2-mbit serial voice roms. + dgnd + d3 mcum rsel1 rsel2 ce test busy rpm vpm xt xt mon nar agnd sg sgc aout adin fout fin amon lout lin mout min cs4 cs3 cs2 cs1 drom di/o we rwck tas sady sas sadx av dd dv dd speaker drive amplifier recorder ic msm6789l d2 d1 d0 rd wr ce reset pdwn microcontroller sync tdt0-7 tmd0-3 tmd4 sadx sad sas sas tas tas rwck rwck we we di/o din dout test rs/a cs v ss v cc sadx sadx sas sasx tas tas rwck rdck dout test cs1 cs2 v cc sady sady sasy drom v ss 8.192 mhz 4m serial register msm66v84b msm66v84b msm66v84b msm66v84b 2m serial voice rom msm6596a-xxx msm6596a-xxx rfsh nc lowpwr dram/ sr msel2 msel1 tst tck test extd acon 4b/ 1b cas0 - cas7 ras a5-a10

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