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digital signal processor for color ccd camera 1 ver1.0 a i 3152 a1 pros 1 a1 pros the AI3152 is the digital signal-processing chip for color video camera. it includes timing generator and digital/analog output. supports 250k / 380k nt sc system ccd sensors and 290k / 440k pal system ccd sensors with complementary color filter. it also provided line lock function. general description ? support ye, cyan, magenta, green complementary color filter ccd sensors for ntsc : a i 325ca(250k), a i 338ca(380k) pal : a i 329ca(290k), a i 344ca(440k) ? flexible color adjustment. ? digital noise reduction. ? high performance awb (5 set linear matrix). ? iris coexists with aes and agc. ? day or night notice output. ? timing adjustment by 1 ns delay ? white clip / setup level / sync level adjustment independent. ? build-in blemish compensation circuit to store the data in eeprom, the blemish pixel can up to 176 pixels. ? programmable pull-up / pull-down gpio and dvio pin. ? horizontal resolution up to 500 tvl ? video drive for iris lens is possible by simple drive circuit even no ccd signal pin (ccdlevel or mon_out) from afe. ? hi-speed ae. ? support external eeprom to store parameter. ? build-in auto white balance control. ? build-in auto exposure control. ? build-in backlight compensation. ? build-in 10bit digital to analog converter. ? build-in mirror function. ? support ntsc/pal analog composite video output. ? build-in timing generator for vertical driver and cds/agc/adc peripheral chips. ? single 3.3v power supply. (horizontal drive pins can be 3.3v/5v) ? support gpio pin define function. ? programmable ccd timing and driving current. ? support digital line lock function. ? lqfp-80 (10x10mm ; 0.4mm pin pitch) features
2 a i 3152 functional block diagram ccd image sensor v-driver timing generator defect comp. sensor interface c process y process dac mcu video output vri input i 2 c interface line-lock sync circuit usb adjust tool eeprom sn9c7111 security camera drive circuit auto iris lens cds/agc /adc ac 60/50 hz tv monitor p c a i 3152 3 a i 3152 pin description pin no symbol dir description 1 vssa_dac g ground 2 vdda_dac p analog power 3 vdac_reg o regulator output for video dac (vb) 4 vref o ref for video dac (iref) 5 i_outb o ioutb for video dac ~ analog ground (gndda) 6 i_out o iout for video dac ~ analog signal (video) 7 gpio_3 b general purpose i/o 8 gpio_4 b general purpose i/o 9 gpio_5 b general purpose i/o 10 gpio_6 b general purpose i/o 11 gpio_7 b general purpose i/o 12 dv_dclk o clock for digital output 13 vri b line lock signal input (50/60hz) 14 dvio_0 b dv i/o for digital output 15 dvio_1 b dv i/o for digital output 16 vdd18 p 1.8v digital power 17 vss g ground 18 vdd33 p 3.3v digital power 19 dvio_2 b dv i/o for digital output 20 dvio_3 b dv i/o for digital output 21 dvio_4 b dv i/o for digital output 22 dvio_5 b dv i/o for digital output 23 dvio_6 b dv i/o for digital output 24 dvio_7 b dv i/o for digital output 25 dv_hsync o hsync for digital output 26 dv_vsync o vsync for digital output 27 ccd_v1x o vertical shift register clock1 4 a i 3152 pin no symbol dir description 28 ccd_v2x o vertical shift register clock3 29 ccd_v3x o vertical shift register clock3 30 vdd33 p 3.3v digital power 31 vdda_ldo p 3.3v analog power 32 vddal_ldo o 1.8v core power out 33 vss g ground 34 vdd18 p 1.8v digital power 35 ccd_v4x o vertical shift register clock4 36 afe_csn o afe 3-wire csn 37 sda b eeprom sda for i2c interface 38 scl b eeprom scl for i2c interface 39 ccd_vh1x o readout pulse h1 40 ccd_vh3x o readout pulse h3 41 ccd_ofdx o ofd pulse output 42 test i chip test pin 43 vssa g ground 44 vdda_18 p 1.8v analog power 45 vdda_pll_io p 3.3v analog power 46 xin i osc input (ntsc:28.636, pal:28.375mhz) 47 xout o osc output 48 n_rst b system reset (porm) 49 i2c_rdy b i2c bus ready 50 afe_scl o afe 3-wire scl 51 afe_sda o afe 3-wire sda 52 vdd33 p 3.3v digital power 53 vss g ground 54 afe_img_9 i ccd image data (msb) 55 afe_img_8 i ccd image data 56 afe_img_7 i ccd image data 57 afe_img_6 i ccd image data 58 afe_img_5 i ccd image data 5 a i 3152 pin no symbol dir description 59 afe_img_4 i ccd image data 60 afe_img_3 i ccd image data 61 afe_img_2 i ccd image data 62 afe_img_1 i ccd image data 63 afe_img_0 i ccd image data (lsb) 64 vdd33 p 3.3v digital power 65 vss g ground 66 vdd18 p 1.8v digital power 67 afe_obcp o clamp pulse output for optical black 68 afe_adclp o clamp pulse output for adc 69 afe_blkx o blanking pulse output 70 afe_adck o clock output for afe a/d converter 71 afe_fcds o sample hold pulse output (reference) 72 afe_fs o sample hold pulse output (data) 73 gpio_0 b general purpose i/o / pwm 74 gpio_1 b general purpose i/o 75 gpio_2 b general purpose i/o 76 ccd_fr o reset pulse output 77 vdd5 p 3.3v/5v digital power (for fr fh1 fh2 pulse) 78 vss5 g ground (for fr fh1 fh2 pulse) 79 ccd_fh1 o horizontal shift register clock1 80 ccd_fh2 o horizontal shift register clock2 item description item description i input p power o output g ground b bi-direction 6 a i 3152 dsp register table eep adr. start bit bit num data l (hex) data h (hex) bit symbol description 0f 0 2 1:0 tv_mono[1:0] tv color/mono display mode selection. 00: color display mode with color burst. 01: mono display mode with color burst. 10: color display mode without color burst. 11: mono display mode without color burst. 42 0 5 4:0 ap_firga[4:0] initial value of apt_firga (gain of fir horizontal edge signal) 1 1 1 ap_ctrl_en 1: enable horizontal and vertical aperture control. 2 1 2 apknee_en 1: enable aperture knee. 3 1 3 ap_coring_en 1: enable aperture coring. 5 1 5 ygamma_en 1: enable y gamma. 6 1 6 y_lcrawl_en 1: enable line crawl. 5 1 5 denoise denoise enable 0: disable 1: enable 6 1 6 nonlinear nonlinear enable 0: disable 1: enable 7 1 7 rgb_gamma_en rgb gamma enable 0: disable 1: enable 4e 0 8 7:0 apknee_y128 y for apknee curve when x=128. y= apknee_y128 *2, note: y0=0. 4f 0 8 7:0 apknee_y256 y for apknee curve when x=256. y= apknee_y256 *2 50 0 8 7:0 apknee_y384 y for apknee curve when x=384. y= apknee_y384 *2 51 0 8 7:0 apknee_y512 y for apknee curve when x=512. y= apknee_y512 *2 52 0 8 7:0 apknee_y640 y for apknee curve when x=640. y= apknee_y640 *2 53 0 8 7:0 apknee_y768 y for apknee curve when x=768. y= apknee_y768 *2 54 0 8 7:0 apknee_y896 y for apknee curve when x=896. y= apknee_y896 *2 55 0 8 7:0 apknee_y1024 y for apknee curve when x=1024. y= apknee_y1024 *2 56 0 8 5:0 ap_corn[5:0] aperture corn control -> corn = ap_corn * 2 4d 49 7 a i 3152 eep adr. start bit bit num data l (hex) data h (hex) bit symbol description 73 5 1 5 ll_enable line lock enable 0: disable 1: enable line lock b2 0 1 0 pwm_en 0: pwm disable. 1: pwm enable. dvio_3 output pwm. 0 2 1:0 wb_mode[1:0] white balance mode 00: auto 01: awb1 (3100 o k) 10: awb2 (5100 o k) 11: awb3 (6500 o k) 2 1 2 mirror mirror 0: disable 1: enable 31 3 back light compensation back light compensation 0: disable 1: enable 44 7:4 shutter_mode [4:0] shutter speed select 0000: 1/60 (1/50) 0001: 1/120 (1/100) 0010: 1/250 0011: 1/500 0100: 1/1000 0101: 1/2000 0110: 1/5000 0111: 1/10000 1000: 1/20000 1001: 1/50000 1010: 1/100000 1011 ~ 1111: auto 01 0 mcrdip (high light invert) 0: disable 1: enable microcontroller dip switch scan 1 1 1 flickless 0: disable 1: enable flickless 21 2agc_off agc control 0: on 1: off 7 1 7 ae_stop stop ae_control 0: ae control on 1: stop c2 4 1 4 awb_stop awb_stop 0: awb on 1: awb stop fb 2 3 4:2 awb_range [2:0] 000: awb range 1 001: awb range 2 010: awb range 3 011: awb range 4 100: awb range 5 1c7 0 1 0 day_night _mode_en 0 : disable 1 : enable bc bb 8 a i 3152 absolute maximum ratings parameter symbol min. max. unit v cc -0.3 4.3 v v cc55 -0.3 5.5 v input voltage v in -0.3 v cc + 0.3 v output voltage v out -0.3 v cc + 0.3 v storage temperature t stg -55 150 power supply recommend operating conditions +70 +25 -20 t op operation temperature v v cc 0 v in input voltage v 5.25 3 v cc55 v 3.6 3.3 3.0 v cc power supply unit max. typ. min. symbol parameter dc electrical characteristics (under recommended operating conditions and vcc=3.0 ~ 3.6v) ma 4 i output output current ma 32 4 i cc-ccd power supply current of fh1, fh2, fr output ma 72 65 i ccd power supply current of dvdd ma 37 i cca power supply current of avdd k 70 v il = 0 v or v ih = v cc r i input pull-up/down resistance v 2.4 i oh = 4, 8 ma v oh output high voltage v 0.4 i ol = 4, 8 ma v ol output low voltage v 2 lv-ttl v ih input high voltage v 0.8 lv-ttl v il input low voltage unit max. typ. min. conditions symbol parameter 9 a i 3152 package dimension lqfp80 (10mm x 10mm) unit: mm |
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