lvds hf vcxo su-a3dcxxx series description the su-a3dcxxx series of voltage controlled crystal oscillato rs (vcxo) provides high frequency with lvds complementary outputs. the outputs can be disabled for test automation or combining multiple clocks. the device does not use any frequency mu ltiplication, providing exceptiona lly low phase noise and jitter. it is packaged in a miniature, fr-4 based 9x14mm smd package. applications and features ? wide frequency range ? 12.0mhz to 280.000mhz ? fiber channel; 10 gbe; infiniband; network processors; sonet/sdh ? high reliability - nel halt/hass qualified for crystal oscillator start-up conditions ? extremely low phase noise and jitter ? high shock resistance, to 1000g ? no multiplication ? absolute pull range (apr) to 100 ppm ? sonet 20 ppm overall free-run stability available ? rohs compliant, lead free construction 357 beloit street, p.o. box 457, burlington, wi 53105-0457 u.s.a. phone 262/763-3591 fax 262/763-2881 email: nelsales@nelfc.com www.nelfc.com crystal clock oscillators data sheet 0629h rev. b su - a 3dc x x x - freq package code absolute pull range, ppm su 6 pad 9x14 mm smd e 20 f 32 input voltage g 50 a 3.3v5% h 100 9 customer specific enable option temperature range, c h positive cmos level a 0 to 50 n n/a b 0 to 70 c -20 to 70 d -40 to 85 9 customer specific creating a part number
su-a3dcxxx series continued lvds hf vcxo absolute maximum ratings parameter symbol value unit operating temperature range to -40 to +85 oc storage temperature range tst -50 to +90 oc supply voltage vcc -0.5 to 4.5 v enable/disable voltage ven/dis 0 to vcc v electrical parameters parameter symb conditions, note min typ max unit nominal frequency fo 12 280 mhz supply voltage vcc code a 3.135 3.3 3.465 v supply current icc 80 100 ma output logic type lvds load at receiving end between the outputs 90 100 110 ohm output levels vod differential amplitude 247 330 454 mv amplitude error 50 mv vof offset voltage 1.125 1.25 1.375 v offset voltage error 50 mv duty cycle (symmetry) at outputs crossing, room temperature 45/55 50/50 55/45 % rise/fall time tr/tf 20 to 80, 80 to 20 % 0.5 0.7 ns jitter integrated j integrated from phase noise, 12 khz to 20 mhz , rms 0.1 0.2 ps 100 hz to 80 khz, rms 1.0 ps 50 khz to 80 mhz 0.3 ps wavecrest characterized random period, 2.5 ps accumul., pk-to-pk 17 ps deterministic 0 ps sub-harmonics none dbc phase noise ( f) 155.52 mhz, apr 50ppm or less @ 10 hz @100 hz @1 khz @10khz @100khz @>1mhz -75 -105 -128 -142 -147 -147 -70 -100 -125 -140 -145 -145 dbc/hz frequency stability f/f overall, including initial calibration, temperature, aging 10 years, shock and vibration @ vc=vcc/2; apr 50ppm, or less 20 30 ppm control voltage range vc 0v vcc v setability vcs vc to set f at fo; t, vcc, load - nominal, as shipped 0.4 vcc 0.5 vcc 0.6 vcc v absolute pull range apr over all conditions, see part # creation 20,32, 50,100 ppm input impedance zin @ fmod < 100 khz 50 kohm modulation bandwidth at vc = vcc/2, -3db 20 khz enable/disable option pin 2 enabled pin 2 disabled cmos logic 1 or n/c cmos logic 0 0.7 vcc 0 vcc 0.3 vcc v 357 beloit street, p.o. box 457, burlington, wi 53105-0457 u.s.a. phone 262/763-3591 fax 262/763-2881 email: nelsales@nelfc.com www.nelfc.com rev. b crystal clock oscillators data sheet 0629h
rev. b crystal clock oscillators su-a3dcxxx series continued lvds hf vcxo electrical connection pin connection 1 vco 2 enable/disable 3 gnd 4 output 5 output complement 6 v cc environmental and mechanical characteristics operating temp. range see part # table mechanical shock per mil-std-202, method 213, cond. e thermal shock per mil-std-883, method 1011, cond. a vibration per mil-std-883, method 2007, cond. a hermetic seal leak rate less than 1x10 -8 atm.cc/s of helium soldering conditions see max reflow profile below maximum reflow profile 357 beloit street, p.o. box 457, burlington, wi 53105-0457 u.s.a. phone 262/763-3591 fax 262/763-2881 email: nelsales@nelfc.com www.nelfc.com
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