? 1/8 KBMF emi filter and line termination for ps/2 mouse or keyboard ports rev. 2 sot23-6l (plastic) october 2004 main applications emi filter and line termination for mouse and key- board ports on: desktop computers notebooks workstations servers features integrated low pass filters for data and clock lines integrated esd protection integrated pull-up resistors small package size breakdown voltage: v br = 6v min. description on the implementation of computer systems, the radiated and conducted emi should be kept within the required levels as stated by the fcc regulations. in addition to the requirements of emc compatibility, the computing devices are required to tolerate esd events and remain operational without user intervention. the KBMF implements a low pass filter to limit emi levels and provide esd protection which exceeds iec 61000-4-2 level 4 standard. the device also implements the pull up resistors needed to bias the data and clock lines. the package is the sot23-6l which is ideal for situations where board space is at a premium. benefits emi / rfi noise suppression esd protection exceeding iec61000-4-2 level 4 high flexibility in the design of high density boards ipad? dat in clk in gnd dat out clk out +vcc rs c rp c +vcc rs c rp c +vcc rs rp c code 01 39 ? 4.7k ? 120pf tolerance 10% 10% 20% figure 1: functional diagram table 1: order code part number marking KBMF01sc6 km1 tm: ipad is a trademark of stmicroelectronics. complies with the following esd standards: iec 61000-4-2 (r = 330 ? c = 150pf) level 4 15 kv (air discharge) 8 kv (contact discharge) mil std 883c, method 3015-6 class 3 c = 100pf r = 1500 ? 3 positive strikes and 3 negative strikes (f = 1 hz)
KBMF 2/8 table 2: absolute maximum ratings (t amb = 25c) table 3: electrical characteristics (t amb = 25c) technical information 1. emi filtering the KBMFxxsc6 ensure a filtering protection against electromagnetic and radiofrequency interferences thanks to its low-pass filter structure. this filter is characterized by the following parameters : - cut-off frequency - insertion loss - high frequency rejection symbol parameter value unit v pp esd discharge r = 330w c = 150pf contact discharge esd discharge - mil std 883 - method 3015-6 12 25 kv t j junction temperature 150 c t stg storage temperature range - 55 to +150 c t l lead solder temperature (10 second duration) 260 c t op operating temperature range 0 to 70 c p r power rating per resistor 100 mw symbol parameters test conditions min typ max unit i r diode leakage current v rm = 5.0v 10 a v br diode breakdown voltage i r = 1ma 6v v f diode forward voltage drop i f = 50ma 0.9 v figure 2: measurements configuration figure 3: KBMF attenuation curve 50 ? rf in vg 50 ? tg out test board km1 1 10 100 1000 -40 -30 -20 -10 0 f (mhz) insertion loss (db)
KBMF 3/8 2. esd protection the KBMFxxsc6 is particularly optimized to perform esd protection. esd protection is based on the use of device which clamps at: v output = v br + r d .i pp this protection function is splitted in 2 stages. as shown in figure 4, the esd strikes are clamped by the first stage s1 and then its remaining overvoltage is applied to the second stage through the resistor r. such a configuration makes the output voltage very low at the v output level. to have a good approximation of the remaining voltages at both v input and v output stages, we give the typical dynamical resistance value rd. by taking into account these following hypothesis : r t >r d , r g >r d and r load >r d , it gives these formulas: the results of the calculation done for v pp =8kv, r g =330 ? (iec 61000-4-2 standard), v br =7v (typ.) and r d = 1 ? (typ.) give: v input = 31.2 v v output = 7.8 v this confirms the very low remaining voltage across the device to be protected. it is also important to note that in this approximation the parasitic inductance effect was not taken into account. this could be few tenths of volts during few ns at the input side. this parasitic effect is not present at the output side due the low current involved after the resistance r s . the measurements done here after show very clearly (figure 6) the high efficiency of the esd protection : - no influence of the parasitic inductances on output stage - v output clamping voltage very close to v br (positive strike) and -v f (negative strike) figure 4: esd clamping behavior esd surge vinput voutput rload rg rs s1 rd v br v br v pp device to be protected KBMFxxsc6 rd s2 v input = r g v br r d v g ? + ? r g ----------------------------------------------------- - v output = r s v br r d v input ? + ? r t ---------------------------------------------------------------- -
KBMF 4/8 please note that the KBMF01sc6 is not only acting for positive esd surges but also for negative ones. for these kind of disturbances it clamps close to ground voltage as shown in the negative surge figure. 3. latch-up phenomena the early ageing and destruction of ic?s is often due to latch-up phenomena which is mainly induced by dv/dt. thanks to its structure, the KBMF01sc6 provides a high immunity to latch-up phenomena by smoothing very fast edges. figure 5: measurement conditions test board esd surge 16kv air discharge vin vout km1 figure 6: remaining voltage at both stages s1 (v input ) and s2 (v output ) during esd surge positive surge negative surge
KBMF 5/8 4. crosstalk behavior the crosstalk phenomena is due to the coupling between 2 lines. the coupling factor ( 12 or 21 ) increases when the gap across lines decreases, this is the reason why we provide crosstalk measurements for monolithic device to guarantee negligeable crosstalk between the lines. in the example above the expected signal on load r l2 is 2 v g2 , in fact the real voltage at this point has got an extra value 21 v g1 . this part of the v g1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. this phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. the perturbed line will be more affected if it works with low voltage signal or high load impedance (few k ? ). figure 8 gives the measurement circuit for the analog crosstalk application. in figure 9, the curve shows the effect of the data line on the clk line. in usual frequency range of analog signals (up to 100mhz) the effect on disturbed line is less than -37db. figure 7: crosstalk phenomena figure 8: analog crosstalk measurements configuration figure 9: typical analog crosstalk meas- urement line 1 line 2 v g1 v g2 r g1 r g2 drivers r l1 r l2 receivers 1g1 12g2 v+ v 2g2 21g1 v+ v 50 ? rf in vg 50 ? tg out test board km1 1 10 100 1,000 -120 -100 -80 -60 -40 -20 0 f (mhz) crosstalk (db)
KBMF 6/8 figure 10 shows the measurement circuit used to quantify the crosstalk effect in a classical digital appli- cation. figure 11 shows that in such a condition signal from 0 to 5v and rise time of few ns, the impact on the other line is less than 50mv peak to peak (below the logic high threshold voltage). the measurements performed with falling edges gives the results within the same range. 5. application example the KBMF01sc6 device could be used on ps/2 mouse or keyboard as indicated by figure 12. figure 10: digital crosstalk measurements configuration figure 11:digital crosstalk measurements figure 12: implementation of KBMFxxsc6 in a typical application line 1 line 2 v g1 b 21 v g1 +5v +5v 74hc04 +5v square pulse generator 5khz 74hc04 KBMF 01sc6 super i/o KBMF 01sc6 KBMF 01sc6 kclk kdat mclk mdat vcc ps/2 connector ps/2 mouse ps/2 keyboard
KBMF 7/8 figure 13: sot23-6l package mechanical data e h l a1 c ee b d a2 a figure 14: sot23-6l foot print dimensions (in millimeters) table 4: mechanical specifications 0.60 1.20 1.10 0.95 2.30 3.50 ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.90 1.45 0.035 0.057 a1 0 0.10 0 0.004 a2 0.90 1.30 0.035 0.051 b 0.35 0.50 0.014 0.02 c 0.09 0.20 0.004 0.008 d 2.80 3.05 0.110 0.120 e 1.50 1.75 0.059 0.069 e 0.95 0.037 h 2.60 3.00 0.102 0.118 l 0.10 0.60 0.004 0.024 10 10 table 5: ordering information ordering code marking package weight base qty delivery mode KBMF01sc6 km1 sot23-6l 16.7 mg 3000 tape & reel table 6: revision history date revision description of changes feb-2003 1d last update. 28-oct-2004 2 sot23-6l package dimensions change for reference ?d? from 3.0 millimeters (0.118 inches) to 3.05 millimeters (0.120 inches). lead plating tin-lead lead plating thickness 5m min. 25m max. lead material sn / pb (70% to 90%sn) lead coplanarity 10m max body material molded epoxy flammability ul94v-0
KBMF 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assu mes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replac es all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered tr ademark of stmicroelectronics. all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com
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