FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 1 march 2013 FDP12N60NZ / fdpf12n60nz n-channel unifet tm ii mosfet ? 600 v, 12 a, 650 m ? features ?r ds(on) = 530 m ? (typ.) @ v gs = 10 v, i d = 6 a ? low gate charge ( typ. 26 nc) ? low c rss ( typ. 12 pf) ? 100% avalanche tested ? improved dv/dt capability ? esd improved capability ? rohs compliant applications ? lcd/led/pdp tv ? lighting ? uninterruptible power supply description unifet tm ii mosfet is fairchild semiconductor ? ?s high volt- age mosfet family based on advanced planar stripe and dmos technology. this advanc ed mosfet family has the smallest on-state resistance among the planar mosfet, and also provides superior switching performance and higher ava- lanche energy strength. in addition, internal gate-source esd diode allows unifet ii mosfet to withstand over 2kv hbm surge stress. this device family is suitable for switching power converter applications such as powe r factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp ballasts. mosfet maximum ratings t c = 25 o c unless otherwise noted* thermal characteristics symbol parameter FDP12N60NZ fdpf12n60nz unit v dss drain to source voltage 600 v v gss gate to source voltage 30 v i d drain current - continuous (t c = 25 o c) 12 12* a - continuous (t c = 100 o c) 7.2 7.2* i dm drain current - pulsed (note 1) 48 48* a e as single pulsed avalanche energy (note 2) 565 mj i ar avalanche current (note 1) 12 a e ar repetitive avalanche energy (note 1) 24 mj dv/dt mosfet dv/dt ruggedness 20 v/ns peak diode recovery dv/dt (note 3) 10 v/ns p d power dissipation (t c = 25 o c) 240 39 w - derate above 25 o c2.00.3w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter FDP12N60NZ fdpf12n60nz unit r ? jc thermal resistance, junction to case, max. 0.52 3.2 o c/w r ? cs thermal resistance, case to sink typ. 0.5 - r ? ja thermal resistance, junction to ambient, max. 62.5 62.5 *drain current limited by maximum junction temperature g s d g s d to-220f s d g s d g to-220
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 2 package marking and ordering information t c = 25 o c unless otherwise noted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity FDP12N60NZ FDP12N60NZ to-220 - - 50 fdpf12n60nz fdpf12n60nz to-220f - - 50 symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 250 ? a, v gs = 0v, t j = 25 o c 600 - - v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 o c-0.6-v/ o c i dss zero gate voltage drain current v ds = 600v, v gs = 0v - - 1 ? a v ds = 480v, t c = 125 o c--10 i gss gate to body leakage current v gs = 30v, v ds = 0v - - 10 ? a v gs(th) gate threshold voltage v gs = v ds , i d = 250 ? a3-5v r ds(on) static drain to source on resistance v gs = 10v, i d = 6a - 0.53 0.65 ? g fs forward transconductance v ds = 20v, i d = 6a - 13.5 - s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 1260 1676 pf c oss output capacitance - 150 200 pf c rss reverse transfer capacitance - 12 18 pf q g(tot) total gate charge at 10v v ds = 480v, i d = 12a v gs = 10v (note 4) -2634nc q gs gate to source gate charge - 6 - nc q gd gate to drain ?miller? charge - 10 - nc t d(on) turn-on delay time v dd = 300v, i d = 12a r g = 25 ? (note 4) -2560ns t r turn-on rise time - 50 110 ns t d(off) turn-off delay time - 80 170 ns t f turn-off fall time - 60 130 ns i s maximum continuous drain to source diode forward current - - 12 a i sm maximum pulsed drain to source diode forward current - - 48 a v sd drain to source diode forward voltage v gs = 0v, i sd = 12a - - 1.4 v t rr reverse recovery time v gs = 0v, i sd = 12a di f /dt = 100a/ ? s - 350 - ns q rr reverse recovery charge - 2.2 - ? c notes: 1: repetitive rating: pulse width limi ted by maximum junction temperature 2: l =7.85mh, i as = 12a, v dd = 50v, r g = 25 ? , starting t j = 25c 3: i sd ?? 12a, di/dt ?? 200a/ ? s, v dd ?? bv dss , starting t j = 25c 4: essentially independent of operating temperature typical characteristics
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.1 1 10 20 0.1 1 10 30 *notes: 1. 250 ? s pulse test 2. t c = 25 o c v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v i d , drain current[a] v ds , drain-source voltage[v] 345678 0.1 1 10 100 -55 o c 150 o c * notes : 1. v ds = 20v 2. 250 ? s pulse test 25 o c i d , drain current[a] v gs , gate-source voltage[v] 0 5 10 15 20 25 30 0.5 0.6 0.7 0.8 0.9 1.0 * note : t j = 25 o c v gs = 20v v gs = 10v r ds ( on ) [ ? ] , drain-source on-resistance i d , drain current [a] 0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 notes: 1. v gs = 0v 2. 250 ? s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0.1 1 10 10 100 1000 5000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd * note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 30 0 6 12 18 24 30 0 2 4 6 8 10 * note : i d = 12a v ds = 120v v ds = 300v v ds = 480v v gs , gate-source voltage [v] q g , total gate charge [nc]
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs temperature figure 9. maximum safe operating area figure 10. maximum safe operating area -fdpf12n60nz -FDP12N60NZ -80 -40 0 40 80 120 160 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0v 2. i d = 250ua bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] ? s 100 ? s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 1 10 100 1000 0.01 0.1 1 10 100 10 ? s 100 ? s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 3 6 9 12 15 i d , drain current [a] t c , case temperature [ o c ]
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 5 10 -5 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 0.001 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 * notes : 1. z ? jc (t) = 0.52 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [ z ? jc ] rectangular pulse duration [sec] 10 -5 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 0.001 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 * notes : 1. z ? jc (t) = 3.2 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [ z ? jc ] rectangular pulse duration [sec] 5 figure 12. transient thermal response curve -fdpf12n60nz t 1 p dm t 2 figure 13. transient thermal response curve -FDP12N60NZ t 1 p dm t 2
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 6 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 7 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 8 mechanical dimensions to-220b03
FDP12N60NZ / fdpf12n6 0nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 9 package dimensions (continued) to-220m03 dimensions in millimeters
FDP12N60NZ / fdpf12n 60nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP12N60NZ / fdpf12n60nz rev. c1 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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