? 2000 fairchild semiconductor corporation ds500258 www.fairchildsemi.com june 1999 revised november 2000 fstu32160a 16-bit to 32-bit multiplexer/demultiplexer bus switch with ? 2v undershoot hardened circuit (uhc ? ) protection fstu32160a 16-bit to 32-bit multiplexer/demultiplexer bus switch with ? 2v undershoot hardened circuit (uhc ? ) protection general description the fairchild switch fstu32160a is a 16-bit to 32-bit high-speed cmos ttl-compatible multiplexer/demulti- plexer bus switch. the low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. the device can be used in applications where two buses need to be addressed simultaneously. the fstu32160a is designed so that the a port demultiplexes into b 1 or b 2 or both. the a and b ports have ?undershoot hardened? cir- cuit protection to support an extended range to 2.0v below ground. fairchild?s integrated undershoot hardened cir- cuit, uhc ? senses undershoot at the i/o?s, and responds by preventing voltage differentials from developing and turning on the switch. two select (s 1 , s 2 ) inputs provide switch enable control. when s 1 , s 2 are high, the device precharges the b port to a selectable bias voltage (bias v) to minimize live inser- tion noise. features undershoot hardened to ? 2v (a and b ports). 4 ? switch connection between two ports. minimal propagation delay through the switch. low l cc . zero bounce in flow-through mode. control inputs compatible with ttl level. see applications note an-5008 for details ordering code: devices also available in tape and reel. specify by appending the suffix letter ? x ? to the ordering code. uhc ? is a trademark of fairchild semiconductor corporation. order number package number package description fstu32160amtd mtd56 56-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide
www.fairchildsemi.com 2 fstu32160a connection diagram pin descriptions truth table logic diagram pin name description s 1 , s 2 select inputs abus a b 1 , b 2 bus b inputs function s 1 s 2 lh x a = x b 1 hl x a = x b 2 llx a = x b 1 and x b 2 h h x b 1 , x b 2 = biasv
3 www.fairchildsemi.com fstu32160a absolute maximum ratings (note 1) recommended operating conditions (note 4) note 1: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rating. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 2: v s is the voltage observed/applied at either the a or b ports across the switch. note 3: the input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. note 4: unused control inputs must be held high or low. they may not float. dc electrical characteristics note 5: typical values are at v cc = 5.0v and t a = + 25 c note 6: measured by the voltage drop between a and b pins at the indicated current through the switch. on resistance is determined by t he lower of the voltages on the two (a or b) pins. supply voltage (v cc ) ? 0.5v to + 7.0v dc switch voltage (v s ) (note 2) ? 2.0v to + 7.0v biasv voltage range ? 0.5v to + 7.0v dc input control pin voltage (v in ) (note 3) ? 0.5v to + 7.0v dc input diode current (l ik ) v in < 0v ? 50 ma dc output current (i out )128 ma dc v cc /gnd current (i cc /i gnd ) + / ? 100 ma storage temperature range (t stg ) ? 65 c to + 150 c power supply operating (v cc ) 4.0v to 5.5v precharge supply (biasv) 1.5 to v cc input voltage (v in ) 0v to 5.5v output voltage (v out ) 0v to 5.5v input rise and fall time (t r , t f ) switch control input 0ns/v to 5ns/v switch i/o 0ns/v to dc free air operating temperature (t a ) ? 40 c to + 85 c symbol parameter t a = ? 40 c to + 85 c units conditions v cc min typ max (v) (note 5) v ik clamp diode voltage 4.5 ? 1.2 v i in = ? 18ma v ih high level input voltage 4.0 ? 5.5 2.0 v v il low level input voltage 4.0 ? 5.5 0.8 v i i input leakage current 5.5 1.0 a0 v in 5.5v 010 av in = 5.5v i o output current 4.5 0.25 ma biasv = 2.4v b x = 0 i ozh , i ozl off-state leakage current 5.5 1.0 a0 a v cc , v biasv 1 = biasv 2 = 5.5v i ozh , i ozl off-state leakage current 5.5 1.0 a0 b v cc , v biasv 1 = biasv 2 = floating r on switch on resistance 4.5 4 7 ? v in = 0v, i in = 64 ma (note 6) 4.5 4 7 ? v in = 0v, i in = 30 ma 4.5 8 14 ? v in = 2.4v, i in = 15 ma 4.0 11 20 ? v in = 2.4v, i in = 15 ma i cc quiescent supply current 5.5 3 av in = v cc or gnd, i out = 0 ? i cc increase in i cc per input 5.5 2.5 ma one input at 3.4v other inputs at v cc or gnd i bias bias pin leakage current 5.5 1.0 asel 1 , sel 2 = 0v b x = 0v, biasv x = 5.5v v iku voltage undershoot 5.5 ? 2.0 v 0.0 ma i in ? 50 ma sel 1 , sel 2 = 5.5v
www.fairchildsemi.com 4 fstu32160a ac electrical characteristics note 7: this parameter is guaranteed by design but is not tested. the bus switch contributes no propagation delay other than the rc del ay of the typical on resistance of the switch and the 50pf load capacitance, when driven by an ideal voltage source (zero output impedance). capacitance (note 8) note 8: t a = + 25 c, f = 1 mhz, capacitance is characterized but not tested. undershoot characteristic (note 9) note 9: this is intended to characterize the device ? s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event. figure 1. device test conditions transient input voltage (v in ) waveform symbol parameter t a = ? 40 c to + 85 c, c l = 50 pf, ru = rd = 500 ? units conditions figure no. v cc = 4.5 ? 5.5v v cc = 4.0v min max min max t phl , t plh a or b, to b or a (note 7) 0.25 0.25 ns v i = open figures 2, 3 t pzh output enable time, 0.5 4.0 4.5 ns v i = open for t pzh figures 2, 3 sel to a, b biasv = gnd t pzl output enable time, 1.0 4.8 5.5 ns v i = 7v for t pzl figures 2, 3 sel to a, b biasv = 3v t phz output disable time, 1.0 5.9 6.9 ns v i = open for t phz figures 2, 3 sel to a, b biasv = gnd t plz output disable time, 1.0 7.4 7.0 ns v i = 7v for t plz figures 2, 3 sel to a, b biasv = 3v symbol parameter typ max units conditions c in control pin input capacitance 4 pf v cc = 5.0v c i/o off input/output capacitance ? off state ? 8pfv cc = 5.0v, switch off symbol parameter min typ max units conditions v outu output voltage during undershoot 2.5 v oh ? 0.3 v figure 1 parameter value units v in see waveform v r 1 - r 2 100k ? v tri 11.0 v v cc 5.5 v
5 www.fairchildsemi.com fstu32160a ac loading and waveforms note: input driven by 50 ? source terminated in 50 ? note: c l includes load and stray capacitance, c l = 50 pf note: input prr = 1.0 mhz, t w = 500 ns figure 2. ac test circuit figure 3. ac waveforms
www.fairchildsemi.com 6 fstu32160a 16-bit to 32-bit multiplexer/demultiplexer bus switch with ? 2v undershoot hardened circuit (uhc ? ) protection physical dimensions inches (millimeters) unless otherwise noted 56-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide package number mtd56 technology description the fairchild switch family derives from and embodies fairchild ? s proven switch technology used for several years in its 74lvx3l384 (fst3384) bus switch product. fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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