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843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 1 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer g eneral d escription the ics843002i is a 2 output lvpecl synthesizer optimized to generate fibre channel reference clock frequencies and is a member of the hiperclocks tm family of high performance clock solutions from ics. using a 26.5625mhz, 18pf parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (f_sel[1:0]): 212.5mhz, 187.5mhz, 159.375mhz, 106.25mhz, and 53.125mhz. the ics843002i uses ics? femtoclock tm low phase noise vco technology and can achieve 1ps or lower typical rms phase jitter, easily meeting fibre channel jitter requirements. the ics843002i is packaged in a small 20-pin tssop package. f eatures ? two 3.3v or 2.5v lvpecl outputs ? selectable crystal oscillator interface or lvcmos/lvttl single-ended input ? supports the following output frequencies: 212.5mhz, 187.5mhz, 159.375mhz, 106.25mhz and 53.125mhz ? vco range: 560mhz - 680mhz ? rms phase jitter @212.5mhz (2.55mhz - 20mhz): 0.50ps (typical) ? full 3.3v or 2.5v supply modes ? -40c to 85c ambient operating temperature ? available in both standard and lead-free rohs compliant packages hiperclocks? ic s p in a ssignment 11 0 1 0 phase detector vco 637.5mhz (w/26.5625mhz reference) osc m = 24 (fixed) f_sel[1:0] 0 0 3 0 1 4 1 0 6 1 1 12 2 ics843002i 20-lead tssop 6.5mm x 4.4mm x 0.92mm package body g package top view b lock d iagram f requency s elect f unction t able f_sel[1:0] npll_sel ref_clk xtal_in xtal_out nxtal_sel mr q0 nq0 q1 nq1 pulldown pulldown 26.5625mhz nc v cco q0 nq0 mr npll_sel nc v cca f_sel0 v cc 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 v cco q1 nq1 v ee v cc nxtal_sel ref_clk xtal_in xtal_out f_sel1 pulldown pulldown pulldown s t u p n i t u p t u o y c n e u q e r f ) z h m ( t u p n i y c n e u q e r f 1 l e s _ f0 l e s _ f r e d i v i d m e u l a v r e d i v i d n e u l a v n / m e u l a v r e d i v i d 5 2 6 5 . 6 2004 23 8 5 . 2 1 2 5 2 6 5 . 6 2014 24 6 5 7 3 . 9 5 1 5 2 6 5 . 6 2104 26 4 5 2 . 6 0 1 5 2 6 5 . 6 2114 22 12 5 2 1 . 3 5 5 7 3 4 . 3 2004 23 8 5 . 7 8 1
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 2 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r e b m u ne m a ne p y tn o i t p i r c s e d 7 , 1c nd e s u n u. t c e n n o c o n 0 2 , 2v o c c r e w o p. s n i p y l p p u s t u p t u o 4 , 30 q n , 0 qt u p u o. s l e v e l e c a f r e t n i l c e p v l . r i a p t u p t u o l a i t n e r e f f i d 5r mt u p n in w o d l l u p e r a s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w . t e s e r r e t s a m h g i h e v i t c a x q n s t u p t u o d e t r e v n i e h t d n a w o l o g o t x q s t u p t u o e u r t e h t g n i s u a c t e s e r e r a s t u p t u o e h t d n a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . h g i h o g o t . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e 6l e s _ l l p nt u p n in w o d l l u p . e d o m s s a p y b r o l l p n i s i r e z i s e h t n y s r e h t e h w s e n i m r e t e d . s l e v e l e c a f r e t n i l t t v l / s o m c v l 8v a c c r e w o p. n i p y l p p u s g o l a n a 1 1 , 9 , 0 l e s _ f 1 l e s _ f t u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . s n i p t c e l e s y c n e u q e r f 6 1 , 0 1v c c r e w o p. n i p y l p p u s e r o c 3 1 , 2 1 , t u o _ l a t x n i _ l a t x t u p n i , t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i l a t s y r c t n a n o s e r l e l l a r a p . t u p n i e h t s i n i _ l a t x 4 1k l c _ f e rt u p n in w o d l l u p. t u p n i k c o l c e c n e r e f e r l t t v l / s o m c v l 5 1l e s _ l a t x nt u p n in w o d l l u p e c n e r e f e r l l p e h t e h t s a s t u p n i k l c _ f e r r o l a t s y r c n e e w t e b s t c e l e s . h g i h n e h w k l c _ f e r s t c e l e s . w o l n e h w s t u p n i l a t x s t c e l e s . e c r u o s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 7 1v e e r e w o p. s n i p y l p p u s e v i t a g e n 9 1 , 8 11 q , 1 q nt u p t u o. s l e v e l e c a f r e t n i l c e p v l . r i a p t u p t u o l a i t n e r e f f i d : e t o n n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 3 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t able 3a. p ower s upply dc c haracteristics , v cc = v cca = v cco = 3.3v10%, t a = -40c to 85c a bsolute m aximum r atings supply voltage, v cc 4.6v inputs, v i -0.5v to v cc + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 73.2c/w (0 lfpm) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 3b. p ower s upply dc c haracteristics , v cc = v cca = v cco = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 7 9 . 23 . 33 6 . 3v v a c c e g a t l o v y l p p u s g o l a n a 7 9 . 23 . 33 6 . 3v v o c c e g a t l o v y l p p u s t u p t u o 7 9 . 23 . 33 6 . 3v i e e t n e r r u c y l p p u s r e w o p 0 3 1a m i a c c t n e r r u c y l p p u s g o l a n a 3 1a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a c c e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v v o c c e g a t l o v y l p p u s t u p t u o 5 7 3 . 25 . 25 2 6 . 2v i e e t n e r r u c y l p p u s r e w o p 5 1 1a m i a c c t n e r r u c y l p p u s g o l a n a 2 1a m t able 3c. lvcmos / lvttl dc c haracteristics , v cc = v cca = v cco = 3.3v10% or 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v c c v 3 . 3 =2v c c 3 . 0 +v v c c v 5 . 2 =7 . 1v c c 3 . 0 +v v l i e g a t l o v w o l t u p n i v c c v 3 . 3 =3 . 0 -8 . 0v v c c v 5 . 2 =3 . 0 -7 . 0v i h i t u p n i t n e r r u c h g i h , r m , k l c _ f e r , 1 l e s _ f , 0 l e s _ f l e s _ l a t x n , l e s _ l l p n v c c v = n i v 5 2 6 . 2 r o v 3 6 . 3 =0 5 1a i l i t u p n i t n e r r u c w o l , r m , k l c _ f e r , 1 l e s _ f , 0 l e s _ f l e s _ l a t x n , l e s _ l l p n v c c , v 5 2 6 . 2 r o v 3 6 . 3 = v n i v 0 = 0 5 1 -a
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 4 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t able 5a. ac c haracteristics , v cc = v cca = v cco = 3.3v10%, t a = -40c to 85c t able 4. c rystal c haracteristics t able 3d. lvpecl dc c haracteristics , v cc = v cca = v cco = 3.3v10% or 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u ov o c c 4 . 1 -v o c c 9 . 0 -v v l o 1 e t o n ; e g a t l o v w o l t u p t u ov o c c 0 . 2 -v o c c 7 . 1 -v v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 6 . 00 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o c c . v 2 - r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 3 3 . 3 25 2 6 5 . 6 23 3 . 8 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 0 = ] 0 : 1 [ l e s _ f7 6 . 6 8 17 6 . 6 2 2z h m 1 0 = ] 0 : 1 [ l e s _ f0 4 10 7 1z h m 0 1 = ] 0 : 1 [ l e s _ f3 3 . 3 93 3 . 3 1 1z h m 1 1 = ] 0 : 1 [ l e s _ f7 6 . 6 47 6 . 6 5z h m t ) o ( k s2 , 1 e t o n ; w e k s t u p t u o 0 3s p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 3 e t o n ) z h m 0 2 - z h m 5 5 . 2 ( , z h m 5 . 2 1 20 5 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 7 3 . 9 5 14 5 . 0s p ) z h m 5 - z h k 7 3 6 ( , z h m 5 2 . 6 0 18 6 . 0s p ) z h m 5 - z h k 7 3 6 ( , z h m 5 2 1 . 3 50 7 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 5 30 5 6s p c d oe l c y c y t u d t u p t u o ] 0 : 1 [ l e s _ f 0 09 41 5% 0 0 = ] 0 : 1 [ l e s _ f3 47 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n . s t n i o p s s o r c l a i t n e r e f f i d t u p t u o e h t t a d e r u s a e m . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 2 e t o n . t u p n i l a t s y r c g n i s u d e r u s a e m : 3 e t o n
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 5 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t able 5b. ac c haracteristics , v cc = v cca = v cco = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 0 = ] 0 : 1 [ l e s _ f7 6 . 6 8 17 6 . 6 2 2z h m 1 0 = ] 0 : 1 [ l e s _ f0 4 10 7 1z h m 0 1 = ] 0 : 1 [ l e s _ f3 3 . 3 93 3 . 3 1 1z h m 1 1 = ] 0 : 1 [ l e s _ f7 6 . 6 47 6 . 6 5z h m t ) o ( k s2 , 1 e t o n ; w e k s t u p t u o 0 3s p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 3 e t o n ) z h m 0 2 - z h m 5 5 . 2 ( , z h m 5 . 2 1 20 5 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 7 3 . 9 5 15 5 . 0s p ) z h m 5 - z h k 7 3 6 ( , z h m 5 2 . 6 0 15 7 . 0s p ) z h m 5 - z h k 7 3 6 ( , z h m 5 2 1 . 3 56 7 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 5 30 5 6s p c d oe l c y c y t u d t u p t u o ] 0 : 1 [ l e s _ f 0 09 41 5% 0 0 = ] 0 : 1 [ l e s _ f3 47 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n . s t n i o p s s o r c l a i t n e r e f f i d t u p t u o e h t t a d e r u s a e m . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 2 e t o n . t u p n i l a t s y r c g n i s u d e r u s a e m : 3 e t o n
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 6 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k 1m 10m 100m 212.5mhz rms phase jitter (random) 2.55mhz to 20mhz = 0.50ps (typical) o ffset f requency (h z ) dbc hz fibre channel jitter filter phase noise result by adding fibre channel filter to raw data raw phase noise data ? n oise p ower t ypical p hase n oise at 212.5mh z @ 3.3v ? ?
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 7 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer p arameter m easurement i nformation q0, q1 t pd ref_clk rms p hase j itter 2.5v c ore /2.5v o utput l oad ac t est c ircuit 3.3v c ore /3.3v o utput l oad ac t est c ircuit scope qx nqx lvpecl 2v -1.3v 0.33v clock outputs 20% 80% 80% 20% t r t f v sw i n g v cc , v cca , v cco v ee nq0, nq1 o utput r ise /f all t ime t sk(o) qy qx nqy nqx phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power o utput d uty c ycle /p ulse w idth /p eriod t pw t period t pw t period odc = x 100% q0, q1 nq0, nq1 p ropagation d elay o utput s kew scope qx nqx lvpecl 2v -0.5v 0.125v v cc , v cca , v cco v ee
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 8 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics843002i provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v cc , v cca , and v cco should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10f and a .01 f bypass capacitor should be connected to each v cca . the 10 resis- tor can also be replaced by a ferrite bead. p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v cca 10 f .01 f 3.3v or 2.5v .01 f v cc i nputs : c rystal i nput : for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. ref_clk i nput : for applications not requiring the use of the reference clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the ref_clk to ground. lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvpecl o utput all unused lvpecl outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated.
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 9 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer c rystal i nput i nterface the ics843002i has been characterized with 18pf parallel resonant crystals. the capacitor values shown in figure 2 figure 2. c rystal i npu t i nterface below were determined using a 26.5625mhz, 18pf parallel resonant crystal and were chosen to minimize the ppm error. ics843002i c1 33p x1 18pf parallel crystal c2 27p xtal_out xtal_in t ermination for 3.3v lvpecl o utput v cc - 2v 50 50 rtt z o = 50 z o = 50 fout fin rtt = z o 1 ((v oh + v ol ) / (v cc ? 2)) ? 2 3.3v 125 125 84 84 z o = 50 z o = 50 fout fin the clock layout topology shown below is a typical ter- mination for lvpecl outputs. the two different layouts mentioned are recommended only as guidelines. fout and nfout are low impedance follower outputs that generate ecl/lvpecl compatible outputs. there- fore, terminating resistors (dc current path to ground) or current sources must be used for functionality. these f igure 3b. lvpecl o utput t ermination f igure 3a. lvpecl o utput t ermination outputs are designed to drive 50 transmission lines. matched impedance techniques should be used to maxi- mize operating frequency and minimize signal distor- tion. figures 3a and 3b show two different layouts which are recommended only as guidelines. other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compat- ibility across all printed circuit and clock component pro- cess variations.
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 10 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t ermination for 2.5v lvpecl o utput figure 4a and figure 4b show examples of termination for 2.5v lvpecl driver. these terminations are equivalent to ter- minating 50 to v cc - 2v. for v cco = 2.5v, the v cco - 2v is very close to ground level. the r3 in figure 4b can be eliminated and the termination is shown in figure 4c. f igure 4c. 2.5v lvpecl t ermination e xample r2 50 zo = 50 ohm vcco=2.5v r1 50 zo = 50 ohm + - 2.5v 2,5v lvpecl driv er f igure 4b. 2.5v lvpecl d river t ermination e xample vcco=2.5v r1 50 r2 50 zo = 50 ohm r3 18 2,5v lvpecl driv er zo = 50 ohm + - 2.5v f igure 4a. 2.5v lvpecl d river t ermination e xample r2 62.5 2.5v 2,5v lvpecl driv er r3 250 zo = 50 ohm zo = 50 ohm r4 62.5 2.5v + - r1 250 vcco=2.5v
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 11 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer l ayout g uideline figure 5a shows a schematic example of the ics843002i. an example of lvepcl termination is shown in this schematic. additional lvpecl termination approaches are shown in the lvpecl termination application note. in this example, an f igure 5a. ics843002i s chematic e xample 18pf parallel resonant 26.5625mhz crystal is used. the c1=27pf and c2=33pf are recommended for frequency ac- curacy. for different board layout, the c1 and c2 may be slightly adjusted for optimizing frequency accuracy. f igure 5b. ics843002i pc b oard l ayout e xample pc b oard l ayout e xample figure 5b shows an example of ics843002i p.c. board layout. the crystal x1 footprint shown in this example allows installa- tion of either surface mount hc49s or through-hole hc49 pack- age. the footprints of other components in this example are listed in the table 6. there should be at least one decoupling capacitor per power pin. the decoupling capacitors should be located as close as possible to the power pins. the layout assumes that the board has clean analog power ground plane. t able 6. f ootprint t able e c n e r e f e re z i s 2 c , 1 c2 0 4 0 3 c5 0 8 0 8 c , 7 c , 6 c , 5 c , 4 c3 0 6 0 2 r3 0 6 0 s e z i s t n e n o p m o c s t s i l , 6 e l b a t : e t o n . e l p m a x e t u o y a l s i h t n i n w o h s ics843002i c7 0.1u c1 27pf zo = 50 ohm c4 0.01u c9 0.1u to logic input pins vcc u1 ics843002i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 vcco q0 nq0 mr npll_sel nc vcca f_sel0 vcc f_sel1 xtal_out xtal_in ref_clk nxtal_sel vcc vee nq1 q1 vcco nc r9 50 logic control input examples vcc set logic input to '0' r3 133 set logic input to '1' r8 50 zo = 50 ohm ru2 not install zo = 50 ohm r2 10 c6 0.1u r4 82.5 r7 50 r5 133 c3 10uf v cco=3.3v + - optional termination rd1 not install vcc vcco vcc=3.3v + - vcc vcca 3.3v rd2 1k to logic input pins vcco c2 33pf c8 0.1u ru1 1k zo = 50 ohm vcc 18pf x1 26.5625mhz r6 82.5
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 12 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics843002i. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics843002i is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v cc = 3.3v + 10% = 3.63v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v cc_max * i ee_max = 3.63v * 130ma = 471.9mw ? power (outputs) max = 30mw/loaded output pair if all outputs are loaded, the total power is 2 * 30mw = 60mw total power _max (3.63v, with all outputs switching) = 471.9mw + 60mw = 531.9mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6c/w per table 7 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.532w * 66.6c/w = 120.4c. this is below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 114.5c/w 98.0c/w 88.0c/w multi-layer pcb, jedec standard test boards 73.2c/w 66.6c/w 63.5c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs. t able 7. t hermal r esistance ja for 20- pin tssop, f orced c onvection
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 13 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. lvpecl output driver circuit and termination are shown in figure 6. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of v cco - 2v. ? for logic high, v out = v oh_max = v cco_max ? 0.9v (v cco_max - v oh_max ) = 0.9v ? for logic low, v out = v ol_max = v cco_max ? 1.7v (v cco_max - v ol_max ) = 1.7v pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = [(v oh_max ? (v cco_max - 2v))/r l ] * (v cco_max - v oh_max ) = [(2v - (v cco_max - v oh_max )) /r l ] * (v cco_max - v oh_max ) = [(2v - 0.9v)/50 ] * 0.9v = 19.8mw pd_l = [(v ol_max ? (v cco_max - 2v))/r l ] * (v cco_max - v ol_max ) = [(2v - (v cco_max - v ol_max )) /r l ] * (v cco_max - v ol_max ) = [(2v - 1.7v)/50 ] * 1.7v = 10.2mw total power dissipation per output pair = pd_h + pd_l = 30mw f igure 6. lvpecl d river c ircuit and t ermination q1 v out v cco rl 50 v cco - 2v
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 14 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer r eliability i nformation t ransistor c ount the transistor count for ics843002i is: 2578 t able 8. ja vs . a ir f low t able for 20 l ead tssop ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 114.5c/w 98.0c/w 88.0c/w multi-layer pcb, jedec standard test boards 73.2c/w 66. 6c/w 63.5c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 15 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer p ackage o utline - g s uffix for 20 l ead tssop t able 9. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m n i mx a m n0 2 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 4 . 60 6 . 6 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
843002agi www.icst.com/products/hiperclocks.html rev. a january 4, 2006 16 integrated circuit systems, inc. ics843002i f emto c locks ? c rystal - to -3.3v, 2.5v lvpecl f requency s ynthesizer t able 10. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademarks, hiperclocks and f emto c locks are trademarks of integrated circuit systems, inc. or its subsidiaries in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t i g a 2 0 0 3 4 8 s c ii g a 2 0 0 3 4 8 s c ip o s s t d a e l 0 2e b u tc 5 8 o t c 0 4 - t i g a 2 0 0 3 4 8 s c ii g a 2 0 0 3 4 8 s c ip o s s t d a e l 0 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - f l i g a 2 0 0 3 4 8 s c if l i g a 2 0 0 3 4 8 s c ip o s s t " e e r f - d a e l " d a e l 0 2e b u tc 5 8 o t c 0 4 - t f l i g a 2 0 0 3 4 8 s c if l i g a 2 0 0 3 4 8 s c ip o s s t " e e r f - d a e l " d a e l 0 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n

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