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description the a6261 is a linear, programmable current regulator providing up to 100 ma from each of four outputs to drive arrays of high brightness leds. the regulated led current from each output, accurate to 5%, is set by a single reference resistor. current matching in each string is better than 10% without the use of ballast resistors. driving leds with constant current ensures safe operation with maximum possible light output. output control is provided by an enable input, giving direct control for pwm applications. outputs can be connected in parallel or left unused as required. short detection is provided to protect the leds and the a6261 during a short-to-ground at any led output pin. an open led in any of the strings disables all outputs, but can be overridden. shorted led output pins or open leds are indicated by a fault flag. a temperature monitor is included to reduce the led drive current if the chip temperature exceeds a thermal threshold. the device packages are a 10-pin msop (ly) and a 16-pin tssop (lp), both with exposed pad for enhanced thermal dissipation. they are lead (pb) free, with 100% matte tin leadframe plating. a6261a-ds, rev. 6 features and benefits ? total led drive current up to 400 ma ? current shared equally up to 100 ma by up to 4 strings ? 6 to 50 v supply ? low dropout voltage ? led output short-to-ground and thermal protection ? disable on open led detection option ? enable input for pwm control ? current slew rate limit during pwm ? current set by reference resistor ? automotive k-temperature range (?40c to 150c) packages typical application diagram a6261 protected led array driver a6261 + ? la1 vin pwm dimming input power input gnd la2 la3 la4 en ff iref thth not to scale 10-pin msop with exposed thermal pad (suffix ly) 16-pin tssop with exposed thermal pad (suffix lp)
protected led array driver a6261 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com absolute maximum ratings 1 characteristic symbol notes rating unit load supply voltage v in ?0.3 to 50 v pin en ?0.3 to 50 v pins la[1:4] ?0.3 to 50 v pin ff ?0.3 to 50 v pins iref, thth ?0.3 to 6.5 v ambient operating temperature range 2 t a e temperature range ?40 to 85 c k temperature range ?40 to 125 c maximum continuous junction temperature t j (max) 150 c transient junction temperature t tj over temperature event not exceeding 10 s, lifetime duration not exceeding 10 h, guaranteed by design characterization 175 c storage temperature range t stg ?55 to 150 c 1 with respect to gnd. 2 limited by power dissipation. selection guide part number ambient operating temperature, t a (c) packing package a6261elptr-t ?40 to 85 4000 pieces per 13-in. reel 16-pin tssop with exposed thermal pad, 4.4 5 mm case a6261klptr-t ?40 to 125 4000 pieces per 13-in. reel A6261KLYTR-T ?40 to 125 4000 pieces per 13-in. reel 10-pin msop with exposed thermal pad, 3 3 mm case thermal characteristics* may require derating at maximum conditions, see application information characteristic symbol test conditions* value unit package thermal resistance (junction to ambient) r ja lp package on 4-layer pcb based on jedec standard 34 oc/w on 2-layer pcb with 3.8 in. 2 of copper area each side 43 oc/w ly package on 4-layer pcb based on jedec standard 48 oc/w on 2-layer pcb with 2.5 in. 2 of copper area each side 48 oc/w package thermal resistance (junction to pad) r jp 2 oc/w *to be verified by characterization. additional thermal information available on the allegro ? website.
protected led array driver a6261 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pin-out diagrams lp package ly package la1 vin +v current regulators gnd pad fault control te m p comp te m p monitor slew limit current reference control logic la2 la3 la4 en ff iref r ref r th thth functional block diagram thth iref gnd la1 la2 ff en vin la4 la3 1 2 3 4 5 10 9 8 7 6 pad nc nc thth iref gnd la1 la2 nc nc nc ff en vin la4 la3 nc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 pad terminal list table name number function lp ly en 13 9 enable ff 14 10 fault output gnd 5 3 ground reference iref 4 2 current reference la1 6 4 led anode (+) connection 1 la2 7 5 led anode (+) connection 2 la3 10 6 led anode (+) connection 3 la4 11 7 led anode (+) connection 4 nc 1,2,8, 9,15,16 ? no connection; connect to gnd pad ? ? exposed thermal pad thth 3 1 thermal threshold vin 12 8 supply
protected led array driver a6261 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com supply and reference v in functional operating range 2 6 ? 50 v v in quiescent current i inq la[1:4] connected to vin ? ? 10 ma v in sleep current i ins en = gnd, v in = 16 v ? ? 10 a startup time t on vin > 7 v to i la1 < ?5 ma, r ref = 125 52030 s current regulation reference voltage v iref 0.7 ma < i ref < 8.8 ma 1.15 1.2 1.25 v reference current ratio g h i lax / i ref ? 12.5 ? ? current accuracy 3 e ilax ?10 ma > i lax > ?100 ma ?5 4 5 % current matching 4 e imlax ?20 ma > i lax > ?100 ma, v lax match to within 1 v ? 5 10 % output current i lax en = high ? g h i ref ?? i ref = 8 ma, en = high ?105 ?100 ?95 ma maximum output current i laxmax i ref = 9.2 ma, en = high ? ? ?110 ma minimum drop-out voltage v do v in ? v lax , i lax = ?100 ma ? ? 800 mv v in ? v lax , i lax = ?40 ma ? ? 660 mv output disable threshold v odis v in ? v lax 65 ? 160 mv current slew time current rising or falling between 10% and 90% 50 80 110 s logic inputs ff and en input low voltage v il ? ? 0.8 v input high voltage v ih 2?? v input hysteresis (en pin) v ihys 150 350 ? mv pull-down resistor (en pin) r pd ?50? k output low voltage (ff pin) v ol i ol = 1 ma ? ? 0.4 v protection short detect voltage v scd measured at lax 1.2 ? 1.8 v short circuit source current i scs short present lax to gnd ?2 ?0.8 ?0.5 ma short release voltage v scr measured at lax ? ? 1.9 v short release voltage hysteresis v schys v scr ? v scd 200 ? 500 mv open load detect voltage v ocd v in ? v lax 170 ? 450 mv open load detect delay t ocd ?2?ms thermal monitor activation temperature t jm t j with i sen = 90% 95 115 130 c thermal monitor slope di sen /dt j i sen = 50% ?3.5 ?2.5 ?1.5 %/c thermal monitor low current temperature t jl t j at i sen = 25% 120 135 150 c overtemperature shutdown t jf temperature increasing ? 170 ? c overtemperature hysteresis t jhys recovery = t jf ? t jhys ?15? c 1 for input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. 2 function is correct but parameters are not guaranteed outside the general limits (7 to 40 v). 3 when en = high, e ilax = 100 [( | i lax | r ref / 15 ) ?1], with i lax in ma and r ref in k . 4 e imla = 100 max ( | i lax ? i la(av) | ) / i la(av) , where i la(av) is the average current of all active outputs. electrical characteristics 1 valid at t j = ?40c to 150c, v in = 7 to 40 v, unless otherwise noted characteristics symbol test conditions min. typ. max. unit
protected led array driver a6261 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com functional description the a6261 is a linear current regulator that is designed to provide drive current and protection for parallel strings of series-con- nected high brightness leds. it provides up to four matched pro- grammable current outputs, at up to 100 ma, with low minimum dropout voltages below the main supply voltage. for 12 v power net applications optimum performance is achieved when driving 4 strings of 1 to 3 leds, at currents up to 100 ma per string. the a6261 is specifically designed for use in applications where the led current is controlled by a single logic input or a high- side switched supply. in addition the a6261 disables all leds on detecting a single open led. current regulation is maintained and the leds protected during a short-to-ground at any point in the led string. a short-to-ground on any regulator output terminal will disable that output and set the fault flag. an open load on any output will set the fault flag and disable all outputs. remaining outputs can be re-enabled by pulling the fault flag output low. individual outputs can be disabled by connecting the output to vin. integrated thermal management reduces the regulated current level at high internal junction temperatures to limit power dis- sipation. pin functions vin supply to the control circuit and current regulators. a small value ceramic bypass capacitor, typically 100 nf, should be con- nected from close to this pin to the gnd pin. gnd ground reference connection. should be connected directly to the negative supply. en logic input to enable led current output. this provides a direct on/off action and can be used for direct pwm control. iref 1.2 v reference to set current reference. connect resistor, r ref , to gnd to set reference current. thth sets the thermal monitor threshold, t jm , where the output current starts to reduce with increasing temperature. connecting thth directly to gnd will disable the thermal monitor function. la[1:4] current source connected to the anode of the first led in each string. connect directly to vin to disable the respective output. in this document ?lax? indicates any one of the four outputs. ff open drain fault flag, used with an external pull-up resistor, to indicate open, short, or overtemperature conditions. ff is inac- tive when a fault is present. during an open load condition, ff can be pulled low to force the remaining outputs on. led current level the led current is controlled by four matching linear current regulators between the vin pin and each of the lax outputs. the basic equation that determines the nominal output current at each lax pin is: given en = high, i lax = r ref 15 (1) where i lax is in ma and r ref is in k . the output current may be reduced from the set level by the ther- mal monitor circuit. conversely the reference resistors may be calculated from: i lax = r ref 15 (2) where i lax is in ma and r ref is in k . for example, where the required current is 90 ma the resistor value will be : 90 == r ref 167 15 these equations completely define the output currents with respect to the setting resistors. however, for further reference, a more detailed description of the internal reference current calcu- lations is included below. it is important to note that because the a6261 is a linear regu- lator, the maximum regulated current is limited by the power dissipation and the thermal management in the application. all current calculations assume adequate heatsinking for the dissi- pated power. thermal management is at least as important as the electrical design in all applications. in high current high ambient temperature applications the thermal management is the most important aspect of the systems design. the application section below provides further detail on thermal management and the associated limitations.
protected led array driver a6261 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com operation with fewer led strings or higher currents the a6261 may be configured to use fewer than four led strings, either by connecting outputs together for higher cur- rents, or by connecting the output directly to vin to disable the regulator for that output. when a regulator is disabled it will not indicate an open load and will not affect the fault flag or the operation of the remaining regulator outputs. sleep mode when en is held low the a6261 will be in shutdown mode and all sections will be in a low power sleep mode. the input current will be typically less than 10 a. this means that the complete circuit, including leds, may remain connected to the power sup- ply under all conditions. safety features the circuit includes several features to ensure safe operation and to protect the leds and the a6261: ? the current regulators between vin and each lax output pro- vide a natural current limit due to the regulation. ? each lax output includes a short-to-ground detector that will disable the output to limit the dissipation. ? an open circuit on any output will disable all outputs. ? the thermal monitor reduces the regulated current as the tem- perature rises. ? thermal shutdown completely disables the outputs under ex- treme overtemperature conditions. short circuit detection a short-to-ground on any led cathode (figure 1a) will not result in a short fault condition. the current through the remaining leds will remain in regulation and the leds will be protected. due to the difference in the voltage drop across the leds, as a result of the short the current match- ing in the a6261 may exceed the specified limits. any lax output that is pulled below the short detect voltage (figure 1b) will disable the regulator on that output and allow the fault flag, ff, to go high. a small current will be sourced from the disabled output to monitor the short and detect when it is removed. when the voltage at lax rises above the short detect voltage the fault flag will be removed and the regulator re-enabled. a shorted led (figure 1c) will not result in a short fault condi- tion. the current through the remaining leds will remain in regulation and the leds will be protected. due to the difference in the voltage drop across the leds, as a result of the short, the current matching in the a6261 may exceed the specified limits. a short between leds in different strings (figure 1d) will not result in a short fault condition. the current through the remain- a6261 la1 vin gnd la2 la3 la4 a6261 la1 vin gnd la2 la3 la4 a6261 la1 vin gnd la2 la3 la4 a6261 la1 vin gnd la2 la3 la4 a. any led cathode short-to-ground. current remains regulated in non-shorted leds. matching may be affected. ff is low. b. any lax output short-to-ground. shorted output is disabled. other outputs remain active. ff is high. c. shorted leds. current remains regulated. matching may be affected. only the shorted led is inactive. ff is low. d. short between leds in different strings. current remains regulated. current is summed and shared by affected strings. intensity match dependent on voltage binning. ff is low. figure 1. short circuit conditions.
protected led array driver a6261 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com ing leds will remain in regulation and the leds will be pro- tected. the current will be summed and shared by the affected strings. current matching in the strings will then depend on the led forward voltage differences. open load detection an open load condition is detected when the voltage across the regulator, v in ? v lax , is less than the open load detect voltage, v ocd , but greater than the output disable threshold voltage, v odis . when this condition is present for more than the open load detect time, t ocd , then all regulators will be disabled and the fault flag allowed to go high. the regulators will remain disabled until either the power is cycled off and on, the en input is taken low then high, or the fault flag, ff, is pulled low. if the power is cycled or en is pulsed low, the regulators will start in the enabled state, unless disabled by tying the output to vin, and the open load detection timer will be reset. if the open load is still present the regulators will again be disabled after the open load detect time. pulling the fault flag low will override the open load fault action and all enabled regulators will be switched on. this state will be maintained while the fault flag is held low. if the fault flag is allowed to go high the a6261 will return to the open load fault condition and will disable all regulators. each of the four regulators includes a limiter to ensure that the output voltage will not rise higher than the output disable threshold voltage below v in when driven by the regulator. this means that the voltage across the regulator will not be less than the output disable voltage, unless it is forced by connecting the lax pin to vin. however if a load becomes disconnected, the regulator will pull the lax pin up to the limit, which will ensure that the voltage across the regulator, v in ? v lax , is less than the open load detect voltage, v ocd . note that an open load may also be detected if the sum of the for- ward voltages of the leds in a string is close to or greater than the supply voltage on vin. temperature monitor a temperature monitor function, included in the a6261, reduces the led current as the silicon junction temperature of the a6261 increases (see figure 2). by mounting the a6261 on the same thermal substrate as the leds, this feature can also be used to limit the dissipation of the leds. as the junction temperature of the a6261 increases, the regulated current level is reduced, reducing the dissipated power in the a6261 and in the leds. the current is reduced from the 100% level at typically 4% per degree celsius until the point at which the current drops to 25% of the full value, defined at t jl . above this temperature the current will continue to reduce at a lower rate until the temperature reaches the overtemperature shutdown threshold temperature, t jf . the temperature at which the current reduction begins can be adjusted by changing the voltage on the thth pin. when thth is left open the temperature at which the current reduction begins is defined as the thermal monitor activation temperature, t jm , and is specified, in the characteristics table, at the 90% current level. t jm will increase as the voltage at the thth pin, v thth , is reduced and is defined as approximately: 0.0039 = t jm (c) 1.46 ? v thth (3) a resistor connected between thth and gnd will reduce v thtii and increase t jm . a resistor connected between thth and a refer- ence supply greater than 1 v will increase v thth and reduce t jm . 100 80 60 40 20 0 t jm t jl t jf 90 25 70 90 110 junction temperature, t j (c) relative sense current (%) 130 150 170 figure 2. temperature monitor current reduction.
protected led array driver a6261 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com figure 3 shows how the nominal value of the thermal monitor activation temperature varies with the voltage at thth and with either a pull-down resistor, r th , to gnd or with a pull-up resis- tor, r th , to 3 v and to 5 v. in extreme cases, if the chip temperature exceeds the overtem- perature limit, t jf , all regulators will be disabled. the tempera- ture will continue to be monitored and the regulators re-activated when the temperature drops below the threshold provided by the specified hysteresis. note that it is possible for the a6261 to transition rapidly between thermal shutdown and normal operation. this can hap- pen if the thermal mass attached to the exposed thermal pad is small and t jm is increased to close to the shutdown temperature. the period of oscillation will depend on t jm , the dissipated power, the thermal mass of any heatsink present, and the ambient temperature. 250 200 150 100 50 0 1.3 1.2 1.1 1.0 0.9 0.8 v thth 70 80 90 110 100 thermal monitor activation temperature, t jm (c) r th (k ) v thth (v) 130 120 150 140 r th pull-up to 5 v r th pull-up to 3 v r th pull-down to gnd figure 3. t jm versus a pull-up or pull-down resistor, r th , and v thth .
protected led array driver a6261 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com application information power dissipation the most critical design considerations when using a linear regu- lator such as the a6261 are the power produced internally as heat and the rate at which that heat can be dissipated. there are three sources of power dissipation in the a6261: ? the quiescent power to run the control circuits ? the power in the reference circuit ? the power due to the regulator voltage drop the elements relating to these dissipation sources are illustrated in figure 4. quiescent power the quiescent power is the product of the quiescent current, i inq , and the supply voltage, v in , and is not related to the regulated current. the quiescent power, p q , is there- fore defined as: p q = v in i inq (4) reference power the reference circuit draws the reference current from the supply and passes it through the reference resis- tor to ground. the reference current is 8% of the output current on any one active output. the reference circuit power is the prod- uct of the reference current and the difference between the supply voltage and the reference voltage, typically 1.2 v. the reference power, p ref , is therefore defined as: p ref = r ref ( v in ? v ref ) v ref (5) regulator power in most application circuits the largest dis- sipation will be produced by the output current regulators. the power dissipated in each current regulator is simply the product of the output current and the voltage drop across the regulator. the total current regulator dissipation is the sum of the dissipa- tion in each output regulator. the regulator power for each output is defined as: p regx = ( v in ? v ledx ) i ledx (6) where x is 1, 2, 3, or 4. note that the voltage drop across the regulator, v reg , is always greater than the specified minimum drop-out voltage, v do . the output current is regulated by making this voltage large enough to provide the voltage drop from the supply voltage to the total forward voltage of all leds in series, v led . the total power dissipated in the a6261 is the sum of the qui- escent power, the reference power, and the power in each of the four regulators: p dis = p q + p ref + p rega + p regb + p regc + p regd (7) the power that is dissipated in each string of leds is: p ledx = v ledx i ledx (8) where x is a, b, c, or d, and v ledx is the voltage across all leds in the string. a6261 lax i lax i inq i ref vin gnd iref r ref v ref v led v reg v in figure 4. internal power dissipation sources.
protected led array driver a6261 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com from these equations (and as illustrated in figure 5) it can be seen that, if the power in the a6261 is not limited, then it will increase as the supply voltage increases but the power in the leds will remain constant. dissipation limits there are two features limiting the power that can be dissipated by the a6261: thermal shutdown and thermal foldback. thermal shutdown if the thermal foldback feature is disabled by connecting the thth pin to gnd, or if the thermal resistance from the a6261 to the ambient environment is high, then the silicon temperature will rise to the thermal shutdown threshold and the current will be disabled. after the current is disabled the power dissipated will drop and the temperature will fall. when the temperature falls by the hysteresis of the thermal shutdown circuit, then the current will be re-enabled and the temperature will start to rise again. this cycle will repeat continuously until the ambient temperature drops or the a6261 is switched off. the period of this thermal shutdown cycle will depend on several electrical, mechanical, and thermal parameters and could be from a few milliseconds to a few seconds. thermal foldback if there is a good thermal connection to the a6261, then the thermal foldback feature will have time to act. this will limit the silicon temperature by reducing the regulated current and therefore the dissipation. the thermal monitor will reduce the led current as the tempera- ture of the a6261 increases above the thermal monitor activation temperature, t jm , as shown in figure 6. the figure shows the operation of the a6261 with 4 strings of 3 red leds, each string running at 50 ma. the forward voltage of each led is 2.3 v and the graph shows the current as the supply voltage increases from 14 to 17 v. as the supply voltage increases, without the thermal foldback feature, the current would remain at 50 ma, as shown by the dashed line. the solid line shows the resulting current decrease as the thermal foldback feature acts. if the thermal foldback feature did not affect led current, the current would increase the power dissipation and therefore the silicon temperature. the thermal foldback feature reduces power in the a6261 in order to limit the temperature increase, as shown in figure 7. the figure shows the operation of the a6261 under the same conditions as figure 6. that is, 4 strings of 3 red leds, each string running at 50 ma with each led forward voltage at figure 5. power dissipation versus supply voltage. 3.0 2.5 2.0 1.5 1.0 0.5 0 a6261 power 89 11 10 supply voltage, v in (v) power dissipation, p d (w) 13 12 16 15 14 led power figure 6. led current versus supply voltage. figure 7. junction temperature versus supply voltage. 54 52 50 48 46 44 42 40 without thermal monitor with thermal monitor 14.0 14.5 15.0 16.0 17.0 15.5 supply voltage, v in (v) i led (ma) 16.5 4 strings v led = 6.9 v i led = 50 ma t a = 50c 130 125 120 115 110 105 100 without thermal monitor with thermal monitor 14.0 14.5 15.0 16.0 17.0 15.5 supply voltage, v in (v) t j (c) 16.5 4 strings v led = 6.9 v i led = 50 ma t a = 50c
protected led array driver a6261 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 2.3 v. the graph shows the temperature as the supply voltage increases from 14 to 17 v. without the thermal foldback feature the temperature would continue to increase up to the thermal shutdown temperature as shown by the dashed line. the solid line shows the effect of the thermal foldback function in limiting the temperature rise. figures 6 and 7 show the thermal effects where the thermal resistance from the silicon to the ambient temperature is 40c/w. thermal performance can be enhanced further by using a signifi- cant amount of thermal vias as described below. thermal dissipation the amount of heat that can pass from the silicon of the a6261 to the surrounding ambient environment depends on the thermal resistance of the structures connected to the a6261. the thermal resistance, r ja , is a measure of the temperature rise created by the power dissipated and is usually measured in degrees celsius per watt (c/w). the temperature rise, t, is calculated from the power dissipated, p d , and the thermal resistance, r ja , as: t = p d r ja (9) a thermal resistance from silicon to ambient, r ja , of approxi- mately 30c/w (lp package) or 34c/w (ly package) can be achieved by mounting the a6261 on a standard fr4 double-sided printed circuit board (pcb) with a copper area of a few square inches on each side of the board under the a6261. multiple thermal vias, as shown in figure 8, help to conduct the heat from the exposed pad of the a6261 to the copper on each side of the board. the thermal resistance can be reduced by using a metal substrate or by adding a heatsink. supply voltage limits in some applications the available supply voltage can vary over a two-to-one range; for example, emergency lighting systems using battery backup. in such systems is it necessary to design the application circuit such that the system meets the required performance targets over a specified voltage range. to determine this range when using the a6261 there are two limiting conditions: ? for maximum supply voltage the limiting factor is the power that can be dissipated from the regulator without exceeding the temperature at which the thermal foldback starts to reduce the output current below an acceptable level. ? for minimum supply voltage the limiting factor is the maximum drop-out voltage of the regulator, where the difference between the load voltage and the supply is insufficient for the regulator to maintain control over the output current. minimum supply limit: regulator saturation voltage the supply voltage, v in , is always the sum of the voltage drop across the high-side regulator, v reg , and the forward voltage of the leds in the string, v led , as shown in figure 4. v led is constant for a given current and does not vary with supply voltage. therefore v reg provides the variable difference between v led and v in . v reg has a minimum value below which the regulator can no longer be guaranteed to maintain the output current within the specified accuracy. this level is defined as the regulator drop-out voltage, v do . the minimum supply voltage, below which the led current does not meet the specified accuracy, is therefore determined by the sum of the minimum drop-out voltage, v do , and the forward voltage of the leds in the string, v led . the supply voltage must figure 8. board via layout for thermal dissipation: (top) lp package (bottom) ly package.
protected led array driver a6261 12 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com always be greater than this value and the minimum specified sup- ply voltage, that is: v in > v do + v led , and v in > v in (min) (10) as an example, consider the configuration used in figures 6 and 7 above, namely 4 strings of 3 red leds, each string running at 50 ma, with each led forward voltage at 2.3 v. the minimum supply voltage will be approximately: v in (min) = 0.55 + (3 2.3) = 7.45 v maximum supply limit: thermal limitation as described above, when the thermal monitor reaches the activation tempera- ture, t jm (due to increased power dissipation as the supply volt- age rises), the thermal foldback feature causes the output current to decrease. the maximum supply voltage is therefore defined as the voltage above which the led current drops below the accept- able minimum. this can be estimated by determining the maximum power that can be dissipated before the internal (junction) temperature of the a6261 reaches t jm . note that, if the thermal monitor circuit is disabled (by connect- ing the thth pin to gnd), then the maximum supply limit will be determined by the specified maximum continuous operating temperature, 150c. the maximum power dissipation is therefore defined as: p d (max) = r ja ? t (11) where t is difference between the thermal monitor activa- tion temperature, t jm , of the a6261 and the maximum ambient temperature, t a (max), and r ja is the thermal resistance from the internal junctions in the silicon to the ambient environment. if minimum led current is not a critical factor, then the maxi- mum voltage is simply the absolute maximum specified in the parameter tables above. application examples in some filament bulb replacement applications the supply may be provided by a pwm-driven, high-side switch. the a6261 can be used in this application by simply connecting en to vin. if neither fault action nor fault reporting is required, then ff should be tied to ground. when power is applied there will be a short startup delay, t on , before the current starts to rise. the current rise time will be lim- ited by the internal current slew rate control. the application circuit options in figure 9 show operation with a higher voltage supply and with combinations of outputs tied together and disabled. a6261 + ? la1 vin 12 v pwm high-side drive gnd la2 la3 la4 en ff iref thth a6261 + ? la1 vin 24 v pwm dimming input fault output gnd la2 la3 la4 en ff iref thth a6261 + ? la1 vin 12 v pwm dimming input gnd la2 la3 la4 en ff iref thth figure 9. typical applications with various supply and output options. b. higher voltage operation c. mix of output combinations a. high brightness (hb) led incandescent lamp replacement
protected led array driver a6261 13 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package lp, 16-pin tssop with exposed thermal pad a 1.20 max 0.15 0.00 0.30 0.19 0.20 0.09 8o 0o 0.60 0.15 1.00 ref c seating plane c 0.10 16x 0.65 bsc 0.25 bsc 2 1 16 5.000.10 4.400.10 6.400.20 gauge plane seating plane a terminal #1 mark area b for reference only; not for tooling use (reference mo-153 abt) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b c exposed thermal pad (bottom surface); dimensions may vary with device 6.10 0.65 0.45 1.70 3.00 3.00 16 2 1 reference land pattern layout (reference ipc7351 sop65p640x110-17m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) pcb layout reference view c branded face 30.05 30.05
protected led array driver a6261 14 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package ly, 10-pin msop with exposed thermal pad terminal #1 mark area a gauge plane seating plane 0.86 0.05 seating plane 0.50 ref 0.25 2 1 10 2 1 10 a b 0.53 0.10 0.15 0.05 0.05 0.15 0 to 6 3.00 0.10 3.00 0.10 4.88 0.20 1.98 1.73 0.27 0.18 for reference only; not for tooling use (reference jedec mo-187) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b exposed thermal pad (bottom surface)
protected led array driver a6261 15 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com for the latest version of this document, visit our website: www.allegromicro.com copyright ?2009-2012, allegro microsystems, inc. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. revision history revision revision date description of revision rev. 6 january 13, 2012 update r ja

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