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data sheet 1 v1.2, 2008-03-18 2-phase stepper-motor driver bipolar-ic tle4729g features ?2 0.7 amp. full bridge outputs integrated driver, control logic and current control (chopper) very low current consumption in inhibit mode fast free-wheeling diodes max. supply voltage 45 v output stages are free of crossover current offset-phase turn-on of output stages all outputs short-circuit proof error-flag for overload, open load, over-temperature smd package pg-dso-24-16 green product (rohs compliant) aec qualified type package tle4729g pg-dso-24-16 (smd) functional description tle4729g is a bipolar, monolithic ic for driving bipolar stepper motors, dc motors and other inductive loads that operate by cons tant current. it is fully pin and function compatible except the current programmi ng is inverse to the tle4728g with an additional inhibit feature. the control logi c and power output stages for two bipolar windings are integrated on a single chip which permits switched current control of motors with 0.7 a per phase at operating voltages up to 16 v. the direction and value of current are programmable for each phase via separate control inputs. in the case of low at all four current program inputs the device is switched to inhibit mode automatically. a common oscillator generates the timing for the current control and turn-on with phase of fset of the two out put stages. the two output stages in full-bridge configuration include fast inte grated freewheeling diodes and are free of crossover current. the device can be driven directly by a microprocessor in several modes by programming phase direction and current control of each bridge independently. pg-dso-24-16
tle 4729 g data sheet 2 v1.2, 2008-03-18 with the two error outputs the tle4729g signals malfunction of the device. setting the control inputs low resets the error flag and by reactivating the bridges one by one the location of the error can be found. pin configuration (top view) 10 12 11 8 9 7 6 3 5 4 2 124 23 22 21 20 19 18 17 16 15 14 13 gnd osc gnd gnd gnd q11 aep02195 10 11 phase 1 q12 1 r v s + 21 20 phase 2 2 r error 1 gnd gnd gnd gnd q21 error 2 q22 tle4729g figure 1
pin definitions and functions pin function 1, 2, 23, 24 digital control inputs i x0, i x1 for the magnitude of the current of the particular phase. i set = 450 ma with r sense = 1 ? i x1 i x0 phase current example of motor status l l 0 no current 1) l h 0.155 i set hold h l i set normal mode h h 1.55 i set accelerate 1) ?no current? in both bridges inhibits the ci rcuit and current consumption will sink below 50 a (inhibit-mode) 3 input phase 1; controls the current through phase winding 1. on h-potential the phase current flow s from q11 to q12, on l-potential in the reverse direction. 5 ? 8, 17 ? 20 ground; all pins are connected at leadframe internally. 4 oscillator; works at approx. 25 khz if this pin is wired to ground across 2.2 nf. 10 resistor r 1 for sensing the current in phase 1. 9, 12 push-pull outputs q11, q12 for phase 1 with int egrated free-wheeling diodes. 11 supply voltage; block to ground, as close as possible to the ic, with a stable electrolytic capacitor of at least 47 f in parallel with a ceramic capacitor of 100 nf. 14 error 2 output; signals with ?low? the errors: short circuit to ground of one or more outputs or over-temperature. 13, 16 push-pull outputs q22, q21 for phase 2 with int egrated free-wheeling diodes. 15 resistor r 2 for sensing the current in phase 2. 21 error 1 output; signals with ?low? the errors: open load or short circuit to + v s of one or more outputs or short circuit of the load or over- temperature. 22 input phase 2; controls the current flow through phase winding 2. on h-potential the phase current flows from q21 to q22, on l-potential in the reverse direction. tle 4729 g data sheet 3 v1.2, 2008-03-18
tle 4729 g data sheet 4 v1.2, 2008-03-18 block diagram d11 d12 d14 d13 t11 t13 t12 t14 function logic phase 1 oscillator phase 2 function inhibit logic t21 t23 d23 d21 t22 t24 d24 d22 error-flag generation tle 4729 g phase 1 error 1 phase 2 error 2 v s + q21 q22 21 20 osc c osc v + s r 1 r 2 q11 q12 r sense sense r gnd aeb02196 10 11 figure 2
absolute maximum ratings t j = ? 40 to 150 c parameter symbol limit values unit remarks min. max. supply voltage v s ? 0.3 45 v ? error outputs v err i err ? 0.3 ? 45 3 v ma ? ? output current i q ? 1 1 a ? ground current i gnd ? 2 ? a ? logic inputs v i xx ? 15 15 v i xx; phase 1, 2 oscillator voltage v osc ? 0.3 6 v ? r 1 , r 2 input voltage v rx ? 0.3 5 v ? junction temperature t j ? 40 150 c storage temperature t stg ? 50 150 c ? thermal resistances junction-ambient junction-ambient (soldered on a 35 m thick 20 cm 2 pc board copper area) junction-case r th ja r th ja r th jc ? ? ? 75 50 15 k/w k/w k/w ? ? measured on pin 5 operating range supply voltage v s 5 16 v ? case temperature t c ? 40 110 c measured on pin 5 p diss = 2 w output current i q ? 800 800 ma ? logic inputs v i xx ? 5 + 6 v i xx; phase 1, 2 error outputs v err i err ? 0 25 1 v ma ? ? tle 4729 g data sheet 5 v1.2, 2008-03-18
tle 4729 g data sheet 6 v1.2, 2008-03-18 characteristics v s = 6 to 16 v; t j = ? 40 to 130 q c parameter symbol limit values unit test condition min. typ. max. current consumption from + v s from + v s i s i s ? 20 ? 30 50 50 p a ma i xx = l; v s = 12 v; t j d 85 q c i q1, 2 = 0 a oscillator output charging current charging threshold discharging threshold frequency i osc v oscl v osch f osc 90 0.8 1.7 18 120 1.3 2.3 24 150 1.9 2.9 30 p a v v khz ? ? ? c osc = 2.2 nf phase current ( v s = 9 ? 16 v) mode ?no current? voltage threshold of current comparator at r sense in mode: hold setpoint accelerate i q v ch v cs v ca ? 40 410 630 0 70 450 700 ? 100 510 800 ma mv mv mv i x0 = l; i x1 = l i x0 = h; i x1 = l i x0 = l; i x1 = h i x0 = h; i x1 = h logic inputs (phase x) threshold hysteresis l-input current l-input current h-input current v i v ihy i il i il i ih 1.2 ? ? 10 ? 100 ? 1 1.7 200 ? 1 ? 20 0 2.2 ? 1 ? 5 10 v mv p a p a p a ? ? v i = 1.2 v v i = 0 v v i = 5 v logic inputs ( i x1; i x0) threshold hysteresis l-input current h-input current v i v ihy i il i ih 0.8 ? ? 100 5 1.7 200 ? 20 2.2 ? + 5 50 v mv p a p a ? ? v i = 0 v v i = 5 v
tle 4729 g data sheet 7 v1.2, 2008-03-18 error outputs saturation voltage leakage current v errsat i errl 50 ? 200 ? 500 10 mv p a i err = 1 ma v err = 25 v thermal protection shutdown prealarm delta hysteresis shutdown hysteresis prealarm t jsd t jpa ' t j t jsdhy t jpahy 140 120 10 ? ? 150 130 20 20 20 160 140 30 ? ? q c q c k k k i q1, 2 = 0 a v err = l ' t j = t jsd ? t jpa ? ? power outputs diode transistor sink pair (d13, t13; d14, t14; d23, t23; d24, t24) saturation voltage saturation voltage reverse current forward voltage forward voltage v sati v sati i ri v fi v fi 0.1 0.2 500 0.6 0.7 0.3 0.5 1000 0.9 1.0 0.5 0.8 1500 1.2 1.3 v v p a v v i q = ? 0.45 a i q = ? 0.7 a v s = v q = 40 v i q = 0.45 a i q = 0.7 a diode transistor source pair (t11, d11; t12, d12; t21, d21; t22, d22) saturation voltage saturation voltage saturation voltage saturation voltage reverse current forward voltage forward voltage diode leakage current v satuc v satud v satuc v satud i ru v fu v fu i sl 0.6 0.1 0.7 0.2 400 0.7 0.8 0 1.0 0.3 1.2 0.5 800 1.0 1.1 3 1.2 0.6 1.5 0.8 1200 1.3 1.4 10 v v v v p a v v ma i q = 0.45 a; charge i q = 0.45 a; discharge i q = 0.7 a; charge i q = 0.7 a; discharge v s = 40 v, v q = 0 v i q = ? 0.45 a i q = ? 0.7 a i f = ? 0.7 a characteristics (cont?d) v s = 6 to 16 v; t j = ? 40 to 130 q c parameter symbol limit valu es unit test condition min. typ. max.
tle 4729 g data sheet 8 v1.2, 2008-03-18 for details see next four pages. these parameters are not 100% tested in production, but guaranteed by design. error output timing time phase x to i xx time i xx to phase x delay phase x to error 2 delay phase x to error 1 delay i xx to error 2 reset delay after phase x reset delay after i xx t pi t ip t pesc t peol t iesc t rp t ri ? ? ? ? ? ? ? 5 12 45 15 30 3 1 20 100 100 50 80 10 5 p s p s p s p s p s p s p s ? characteristics (cont?d) v s = 6 to 16 v; t j = ? 40 to 130 q c parameter symbol limit valu es unit test condition min. typ. max.
tle 4729 g data sheet 9 v1.2, 2008-03-18 diagrams timing between i xx and phase x to prevent setting the error flag operating conditions: + v s = 14 v, t j = 25 c, i err = 1 ma, load = 3.3 mh, 1 ? t pi aet02197 phase x xx a) if t pi < typ. 5 s, an error ?open load? will be set. t ip phase x xx aet02198 b) if t ip < typ. 12 s, an error ?open load? will be set.
tle 4729 g data sheet 10 v1.2, 2008-03-18 this time strongly depends on + v s and inductivity of the load, see diagram below. time t ip vs. load inductivity 20 10 0 0 20 5 10 15 40 30 60 mh l 16 v 12 v 9 v t ip s 25 30 s v = 6 v aed02199 propagation delay of the error flag operating conditions: + v s = 14 v, t j = 25 c, i err = 1 ma, load = 3.3 mh, 1 ? t pesc error 2 aed02200 phase x a) i xx = h, error condition: short circuit to gnd. typ. t pesc : 45 s
t peol error 1 aet02201 phase x b) i xx = h, error condition: open load (equivalent: short circuit to + v s ). typ. t peol : 15 s t iesc error 2 aet02202 xx c) phase x = h or l, const.; error condition: short circuit to gnd. typ. t iesc : 30 s tle 4729 g data sheet 11 v1.2, 2008-03-18 t iesc is also measured under the c ondition: begin of short circuit to gnd till error flag set.
t rp aet02203 error x phase x d) i xx = h, reset of error flag when error condition is not true. typ. t rp : 3 s t ri aet02204 error x xx typ. t ri : 1 s e) phase x = h or l, const.; reset of erro r flag when error condition is not true. tle 4729 g data sheet 12 v1.2, 2008-03-18
tle 4729 g data sheet 13 v1.2, 2008-03-18 quiescent current i s vs. supply voltage v s ; bridges not chopping; t j = 25 c aed02205 5 0 v ma v s 10 15 20 40 60 = qx 0.70 a 20 10 30 50 s 0.45 a 0.07 a oscillator frequency f osc vs. junction temperature t j -50 15 0 20 v c osc s 150 100 50 c t j osc khz f 25 30 aed02207 = 14 v = 2.2 nf quiesc. current i s vs. junct. temp. t j ; bridges not chopping, v s = 14 v -50 0 0 10 20 30 150 100 50 c t j 0.07 a s ma 40 50 60 0.70 a 0.45 a qx = aed02206 output current i qx vs. junction temperature t j 500 -50 0 0 300 100 400 200 r x v s = 14 v 150 100 50 c t j 700 800 600 qx ma x1 = h, x0 = h aed02208 x1 = h, x0 = l = 1
tle 4729 g data sheet 14 v1.2, 2008-03-18 output saturation voltages v sat vs. output current i q v 0 0 0.2 0.5 1.0 0.6 0.4 0.8 a q satud v v satl satuc sat v = 14 v v 1.5 v t j s = 25 c 2.0 aed02209 typical power dissipation p tot vs. output current i q (non stepping) both phases active 0 0 0.2 1 2 0.6 0.4 0.8 a q s v = 14 v tot p = 10 mh l osc phase x phase x c 3 t c w r = 25 c = 2.2 nf = 2 4 aed02211 ? forward current i f of free-wheeling diodes vs. forward voltages v f aed02210 0 0 v f 0.5 1.0 1.5 v 0.2 0.4 0.6 0.8 1.0 a f v fl v fu j t = 25 ?c permissible power dissipation p tot vs. case temp. t c (measured at pin 5) 10 0 -25 0 25 6 2 4 8 125 75 c 175 t c 120 c jmax t 150 c = tot p 12 w 16 aed02212
tle 4729 g data sheet 15 v1.2, 2008-03-18 input characteristics of i xx , phase x -20 = -120 -4 -6 -2 -60 -100 -40 -80 j t 2 06 4 v xx v 40 c 25 c 150 c xx i a 0 20 40 phase x xx aed02213 quiescent current i s vs. supply voltage v s ; inhibit mode; t j = 25 c aed02215 5 0 100 50 0 10 15 v s 250 200 150 s 20 a v output leakage current 0 -0.8 -0.4 0 0.4 10 20 30 v v q 40 s v = 16 v ma 0.8 r 1.2 s v = 40 v aed02214
microcontroller 1 2 3 21 14 24 23 22 phase 1 error 1 error 2 phase 2 10 11 20 21 tle 4729 g m stepper motor 5,6,7,8, 17,18,19,20 10 15 4 r 2 1 ? 1 ? 1 r 22 nf q11 q12 q21 q22 13 16 12 9 osc gnd s v 100 nf 100 f 11 +12v aes02216 tle 4729 g data sheet 16 v1.2, 2008-03-18 figure 3 application circuit
v v v err 2.2 nf osc osc osc error err x xx, phase x rl fu sense v c sl gnd gnd r 1 rsense v fl output v + s q satu v v v satl aes02217 ru 100 nf 100 f s v s ? tle 4729 g tle 4729 g data sheet 17 v1.2, 2008-03-18 figure 4test circuit
h l h l h l l h h l l h phase 1 q1 q2 phase 2 t t t t t t aed02218 t t accelerate mode normal mode acc i set i - - full step operation 21 20 11 10 acc i set i - acc i - set i i set acc i tle 4729 g data sheet 18 v1.2, 2008-03-18 figure 5 full step operation
aed02219 accelerate mode normal mode half step operation 21 20 phase 2 l l h h h l q2 - - - i set acc i i set acc i acc i q1 - phase 1 set i set i l acc i h 10 11 h h l l t t t t t t t t tle 4729 g data sheet 19 v1.2, 2008-03-18 figure 6 half step operation
v osc h l osc v osc v 0 0 rsense 1 rsense 2 v q12 v s + 0 ca v s + v q11 v v + s v q22 + v q21 v s q1 i acc q2 t t t t t t t v fu satl v satu d v satu c v phase x phase x operating conditions: v r l s = 14 v = 10 mh = 4 = h phase x aed02220 0 xx = h ? acc i tle 4729 g data sheet 20 v1.2, 2008-03-18 figure 7 current control in chop-mode
osc v rsense 1 s + v q11 v phase 1 t t t t phase 1 phase 1 operating conditions: v r l s = l for t < = 14 v ? = 1 mh = 4 = h for t > aed02221 t t 2.3 v 1.3 v 0 v oscillator high imped. phase change-over h l phase 0 high impedance set slow current decay set - 1 t fast current decay = 2x t 1 1 t 11 11 10 high impedance + v q12 v s slow current decay = l tle 4729 g data sheet 21 v1.2, 2008-03-18 figure 8 phase reversal and inhibit
tle 4729 g data sheet 22 v1.2, 2008-03-18 calculation of power dissipation the total power dissipation p tot is made up of saturation losses p sat (transistor saturation voltage and diode forward voltages), quiescent losses p q (quiescent current time s supply voltage) and switching losses p s (turn-on / turn-off operations). the following equations give the power dissipation for chopper operation without phase reversal. this is the worst case, because full current flows for the entire time and switching losses occur in addition. p tot = 2 p sat + p q + 2 p s where p sat ? i n { v sati d + v fu (1 ? d ) + v satuc d + v satud (1 ? d )} p q = i q v s p q v s t ------ - i d t don 2 ------------------------ - i d i r + () t on 4 ------------------------------------- - i n 2 ----- t doff t off + () ++ ?? ?? ?? ? i n = nominal current (mean value) i q = quiescent current i d = reverse current during turn-on delay i r = peak reverse current t p = conducting time of chopper transistor t on = turn-on time t off = turn-off time t don = turn-on delay t doff = turn-off delay t = cycle duration d = duty cycle t p / t v satl = saturation voltage of sink transistor (tx3, tx4) v satuc = saturation voltage of source trans istor (tx1, tx2) during charge cycle v satud = saturation voltage of source trans istor (tx1, tx2) during discharge cycle v fu = forward voltage of free-wheeling diode (dx1, dx2) v s = supply voltage
tle 4729 g data sheet 23 v1.2, 2008-03-18 dx3 dx4 dx1 dx2 v s + tx3 tx1 tx4 tx2 l v c sense r aet02222 figure 9 t off d off t p t on t d on t v satl n turn-off turn-on s v fu v + fu s v + v t i r i d aet02223 voltage and current on chopper transistor figure 10 voltage and current on chopper transistor
tle 4729 g data sheet 24 v1.2, 2008-03-18 application hints the tle4729g is intended to drive both phas es of a stepper motor. special care has been taken to provide high efficiency, robustness and to minimize external components. power supply the tle4729g will work with supply voltages ranging from 5 v to 16 v at pin v s . surges exceeding 16 v at v s wont harm the circuit up to 45 v, but whole function is not guaranteed. as soon as the voltage drops below approximately 16 v the tle4729g works promptly again. as the circuit operates with chopper regula tion of the current, interference generation problems can arise in some applications . therefore the power supply should be decoupled by a 0.1 p f ceramic capacitor located near the package. unstabilized supplies may even afford higher capacities. inhibit mode in the case of low at all four current program inputs i xx the device will switch into inhibit condition; the current consumption is reduced to very low values. when starting operation again, i.e. putting at least one i xx to high potential, the error 1 output signals an open load error if the corresponding phase input is high. the error is reset by first recirculation in chop mode. current sensing the current in the windings of the stepper mo tor is sensed by the voltage drop across r sense . depending on the selected current inter nal comparators will turn off the sink transistor as soon as the voltage drop reaches certain thresholds (typical 0 v, 0.07 v, 0.45 v and 0.7 v). these thresholds ar e not affected by variations of v s . consequently instabilized supplies will not affect the perfo rmance of the regulation. for precise current level it must be considered, that internal bounding wire (typ. 60 m : ) is a part of r sense . due to chopper control fast current rises (up to 10 a/ p s) will occur at the sensing resistors. to prevent malfunction of the current sensing mechanism r sense should be pure ohmic. the resistors should be wired to gnd as directly as possible. capacitive loads such as long cables (with high wire to wire capacity) to the motor should be avoided for the same reason. synchronizing several choppers in some applications synchrone chopping of several stepper motor drivers may be desirable to reduce acoustic interference. th is can be done by forcing the oscillator of the tle4729g by a pulse generator overdr iving the oscillator loading currents (approximately r 120 p a). in these applications low level should be between 0 v and 0.8 v while high level should between 3 v and 5 v.
tle 4729 g data sheet 25 v1.2, 2008-03-18 application hints (cont?d) optimizing no ise immunity unused inputs should always be wired to proper voltage levels in order to obtain highest possible noise immunity. to prevent crossconduction of the output stages the tl e4729g uses a special break before make timing of the power transistors. this timing circuit can be triggered by short glitches (some hundred nanoseconds) at the phase inputs causing the output stage to become high resistive during some microsecond s. this will lead to a fast current decay during that time. to achieve maximum curr ent accuracy such glitches at the phase inputs should be avoided by proper control signals. to lower emi a ceramic capacitor of max. 3 nf is advisable from each output to gnd. thermal shut down to protect the circuit against thermal destruction, thermal shut down has been implemented. error monitoring the error outputs signal corresponding to the logic table the errors described below. logic table kind of error error output error 1 error 2 a) no error h h b) short circuit to gnd h l c) open load 1) also possible: sh ort circuit to + v s or short circuit of the load. 1) l h d) b) and c) simultaneously h l e) temperature prealarm l l over-temperature is implemented as pre-alarm; it appears approximately 20 k before thermal shut down. to detect an open load , the recirculation of the inductive load is watched. if there is no recirculation after a phase change-over, an internal error flipflop is set. because in most kinds of short circuits there won?t flow any current through the motor, there will be no recirculation after a phase change-over, and the error flipflop for open load will be set, too. additionally an open load error is signaled after a phase change-over during hold mode.
tle 4729 g data sheet 26 v1.2, 2008-03-18 only in the case of a short circuit to gnd , the most probably kind of a short circuit in automotive applications, the malfunction is sig naled dominant (see d) in logic table) by a separate error flag. simultaneously th e output current is disabled after 30 p s to prevent disturbances. a phase change-over or putting both current control inputs of the affected bridge on low potential resets the error flipflop. being a separate flipflop for every bridge, the error can be located in easy way.
tle 4729 g data sheet 27 v1.2, 2008-03-18 package outlines lead width can be 0.61 max. in dambar area does not include plastic or metal protrusion of 0.15 max. per side index marking 1.27 +0.15 0.35 15.6 1 24 2) -0.4 1) 12 0.2 13 24x 0.1 2.65 max. 0.2 -0.1 2.45 -0.2 0.4 +0.8 10.3 0.3 0.35 x 45? -0.2 7.6 1) 0.23 +0.09 max. 8? 1) 2) figure 11 pg-dso-24-16 (plastic green dual small outline) green product (rohs compliant) to meet the world-wide customer requireme nts for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). you can find all of our packages, sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm smd = surface mounted device
tle 4729 g data sheet 28 v1.2, 2008-03-18 revision history version date changes rev. 1.1 rev. 1.2 2007-09-17 2008-03-18 rohs-compliant version of the tle 4729 g ? all pages: infineon logo updated ? page 2: ?added aec qualified? and ?r ohs? logo, ?green product (rohs compliant)? and ?aec qualified? statement added to feature list, package name changed to rohs compliant versions, package picture updated, ordering code removed ? page 27: package name changed to rohs compliant versions, ?green product? description added ? added revision history ? added legal disclaimer ? update package suffix
edition v1.2, 2008-03-18 published by infineon technologies ag 81726 munich, germany ? 2008 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints gi ven herein, any typical values stated herein and/or any information regarding the application of the device, in fineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the neares t infineon technologies office. infineon technologies components may be used in life-supp ort devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. tle 4729 g data sheet 29 v1.2, 2008-03-18

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