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1/71 features applications ? sensor ic based on halios? technology ? up to 4 sending channels, 1 compensation channel an 1 differential receiver input for various halios? applications ? 16 bit micro controller el16 with debug interface ? up to 1.5k x 18 (3kbyte) sram including 2 bit parity per 16 bit word and byte write support ? up to 30k x 22 (60kbyte) flash including 6 bit crc checksum per 16 bit word ? spi and i 2 c communication interface ? sci interface incl. lin support ? watchdog, 32 bit timer, up to 8 gpios ? multiply unit ? aec-q100 automotive qualification ? supply voltage range 2.25v to 2.75v ? optical or capacitive input devices ? proximity and gesture detection ? compact hmi interfaces for one-dimensional up to three-dimensional input general description the ic is based on an optical bridge technology which provides a non-mechanical detection of movements. the system detects the optical refections of an ob - ject in front of the sensor by using a function principle called halios? (high ambient light independent opti - cal system) which is very effective in the suppression of ambient light and also has self calibration capability to eliminate disturbances caused by housing refections and scratches. in the same manner capacitive systems can be ad - dressed by using the integrated charge amplifer. ka - + - + led1 avdd vddc nrst miso mosi sck cs sda scl gpio 8 led2 led3 reset clock test timer gpio interface i 2 c interface irq control watchdog multiply ram lin sci flash spi interface j t a g tmode amp_ka amp_an an led4 ledc vddio sda e909.06 scl tm1 tm0 vpp halios control digital/ analog ? cpu core 16 bit rx tx product id temp. range package e909.06 -40c to +85c qfn32l5 ordering information elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 e909.06 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive production data - nov 16, 2011
2/71 1 pinout 1) d = digital, a = analog, s = supply, i = input, o = output, hv = high voltage 1.1 pin description no name type 1) pull esd description 1 gpio_7 d_io down +/- 2kv hbm d io pd sr - general purpose io 7 2 gpio_6 d_io down +/- 2kv hbm d io pd sr - general purpose io 6 3 gpio_5 d_io down +/- 2kv hbm d io pd sr - general purpose io 5 4 gpio_4 d_io down +/- 2kv hbm d io pd sr - general purpose io 4 5 gpio_3 d_io down +/- 2kv hbm d io pd sr - general purpose io 3 6 gpio_2 d_io down +/- 2kv hbm d io pd sr - general purpose io 2 7 gpio_1 d_io down +/- 2kv hbm d io pd sr - general purpose io 1 8 gpio_0 d_io down +/- 2kv hbm d io pd sr - general purpose io 0 9 led1 a_o - +/- 2kv hbm a o - led driver output 10 vssled1,2 s - +/- 2kv hbm a g - ground led1,2 11 led2 a_o - +/- 2kv hbm a o - led driver output 12 led3 a_o - +/- 2kv hbm a o - led driver output 13 vssled3,4 s - +/- 2kv hbm a g - ground led3,4 14 led4 a_o - +/- 2kv hbm a o - led driver output 15 vssledc s - +/- 2kv hbm a g - ground ledc 16 ledc a_o - +/- 2kv hbm a o - led driver output 17 i2c_sda d_io - +/- 2kv hbm d io - i2c sda (data) 18 i2c_scl d_io - +/- 2kv hbm d io - i2c scl (clk) 19 vddc s - +/- 2kv hbm d s - core supply 2.5v 20 vss s - +/- 2kv hbm d g - ground 21 vddio s - +/- 2kv hbm d s - io supply 3.3v 22 a mp_ k a a_o - +/- 2kv hbm a o - output 1. stage amplifer at ka 23 avdd s - +/- 2kv hbm a s - analog supply 2.5v 24 ka a_i - +/- 2kv hbm a i - kathode 25 an a_i - +/- 2kv hbm a i - anode 26 avss s - +/- 2kv hbm a g - analog ground 27 a mp_ a n a_o - +/- 2kv hbm a o - output 1. stage amplifer at an 28 nrst d_i up +/- 2kv hbm d i pu st - reset 29 tmode d_i down +/- 2kv hbm d i pd - testmode 30 tm1 a_io - +/- 2kv hbm a io - analog testbus 31 tm0 a_io - +/- 2kv hbm a io - analog testbus 32 vpp hv_s - +/- 2kv hbm a hv - flash program voltage e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
3/71 1.2 package pinout figure 1: package pinout package: qfn32l5 package is according jedec mo-220-k, version vhhd-4. an avss amp_an nrst tmode tm1 tmo vpp gpio_7 gpio_6 gpio_5 gpio_4 gpio_3 gpio_2 gpio_1 gpio_0 25 26 27 28 29 30 31 32 ka avdd amp_ka vddio vss vddc i2c_scl i2c_sda 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 ledc vssledc led4 vssled3,4 led3 led2 vssled1,2 led1 16 15 14 13 12 11 10 9 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
4/71 continuous operation of the device above these ratings is not allowed and may destroy the device. all potentials refer to ground (gnd) unless otherwise specifed. currents fowing into the circuit pins have positive values. the following conditions apply unless otherwise stated. all potentials refer to ground (gnd) unless otherwise specifed. currents fowing into the circuit pins have positive values. all voltages are referred to v ss , and currents are positive when fowing into the node unless otherwise specifed. 2 operating conditions 2.1 absolute maximum ratings 2.2 recommended operating conditions no. description condition symbol min. max. unit 1 supply voltage: digital core, analog part referenced to v ss / a vss v ddc / a vdd -0.3 2.8 v 2 io supply voltage/digital pins (see "type"/chapter ) referenced to v ss v ddio -0.3 3.7 v 3 input voltage analog pins (see "type"/chapter ) referenced to a vss v ina -0.3 a vdd + 0.3 v 4 input voltage digital pins/gpio (see "type"/chapter ) referenced to v ss v ind -0.3 v ddio + 0.3 v 5 ground offset v ss to a vss to v ssled ground offset -0.3 0.3 v 6 junction temperature t j -40 +125 c 7 storage temperature t stg -50 150 c no. description condition symbol min. typ. max. unit 1 supply voltage: analog part, digital core referenced to v ss / a vss v ddc / a vdd 2.25 2.5 2.75 v 2 io supply voltage/digital pins (see "type"/chapter ) referenced to v ss v ddio 3.0 3.3 3.6 v 3 filter capacitor analog part connected to a vdd c avdd 10 f 4 filter capacitor digital part connected to v ddc c vddc 100 nf 5 ambient operating tempera - ture range t opt -40 25 85 c e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
5/71 the following conditions apply unless otherwise stated. all potentials refer to ground (gnd) unless otherwise specifed. currents fowing into the circuit pins have positive values. mcr - measurement confguration register pcr - preamplifer confguration register 3 detailed electrical specifcation 3.1 supply voltages no. description condition symbol min. typ. max. unit 1 digital operating current, run mode fsys = 8 mhz, system state: run i vddc 5.8 12 ma 2 digital operating current, standby mode system state: standby i standby 1.8 5 ma 3 digital operating current, off mode system state: off i off 35 a 4 analog operating current mcr[13:12] ="11" pcr[14:13] ="11" i avdd 3.5 5 ma 5 analog operating current analog on = 0 i avdd_off 15 a 6 over all current consumption in application mode active mode 1) i active 2.0 2.25 ma 7 over all current consumption in application mode idle mode (i idle = i off + i avdd_off ) i idle 16 50 a 8 state change from standby to run mode t standb - y2run 3 1/ fsys 9 state change from off to run mode t off2run 5 1/ fsys 1) in application mode the current consumption is calculated from the duty cycle of the digital operating current and the analog operating current. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
6/71 3.2 reset generation 3.3 internal clock generation 3.3.1 reference clocks no. description condition symbol min. typ. max. unit 1 power on reset level reference is v ddc v por 2.25 v 2 brown out high-to-low threshold level reference is v ddc v bohl 1.8 v 3 brown out reset hysteresis v bohyst 100 200 300 mv 4 minimum supply voltage for power on reset and brown out circuit 1) vddmin 0.9 v 5 nrst-pin threshold level nrst lh 0.5 vd - dio 6 pull up current nrst-pin v nrst = v ddio i nrstpu 35 a 7 min. pulse width for a valid reset at pin nrst (debouncing) v ddc > v ddc min t debnrst 1.0 - s 8 delay watchdog start => reset 1) t wdog timer value 1/ fsys no. description condition symbol min. typ. max. unit 1 wakeup clock frequency within rec - ommended operating conditions fwk 115.2 128.0 140.8 khz 2 master clock within rec - ommended operating conditions fsys 7. 2 8.0 8.8 mhz 1) will not be tested in production test e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
7/71 3.4 module description 3.4.1 i2c interface no. description condition symbol min. typ. max. unit 1 sda/scl: input voltage low v il -0.3 0.3 x v ddio v 2 sda/scl: input voltage high v ih 0.7 x v ddio v ddio + 0.3 v 3 sda/scl: hysteresis of sch - mitt trigger inputs 1) v ddio > 2.0 v v hys 0.05 x v ddio - v 4 sda/scl: output voltage low (open drain) i = 3 ma, v ddio > 2.0 v v ol 0.4 v 5 sda/scl: input current 0 < v in < v ddio i i -10 10 a 6 sda/scl: capacitance 1) c i - 10 pf 7 scl clock frequency f scl 0 400 khz 8 hold time (repeated) start condition 1) t hd.:sta 600 - ns 9 low period of scl clock t low 1300 - ns 10 high period of scl clock t high 600 - ns 11 set-up time for repeated start condition 1) t su.:sta 600 - ns 12 data hold time 1) t hd.dat 0 900 ns 13 data set-up time 1) t su:dat 100 - ns 14 rise time of sda and scl sig - nals with a bus capacitance (cb) from 10 pf to 400 pf 1) t r 20 + 0.1 x c b 300 ns 15 fall time of sda and scl sig - nals with a bus capacitance (cb) from 10 pf to 400 pf 1) t f 20 + 0.1 x c b 300 ns 16 sda/scl: output fall time from vih to vil with a bus capacitance (cb) from 10 pf to 400 pf 1) t of 20 + 0.1 x c b 250 ns 17 set-up time for stop condi - tion 1) t su:sto 600 - ns 18 bus free time between stop and start 1) t buf 1300 - ns 19 pulse with of spikes which must be suppressed by the ic-internal input flter t sp 0 50 ns 1) will not be tested in production test e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
8/71 3.4.2 spi module 3.4.4 halios? interface 3.4.4.1 current generation for led modulators 3.4.3 gpio module no. description condition symbol min. typ. max. unit 1 sck pulse low width / pulse high width transfer tck 4 1/ fsys 2 first sck after falling csb start of transfer tcs1 2 1/ fsys 3 last sck before rising csb end of transfer tcs2 2 1/ fsys 4 setup time tsetup 1 1/ fsys 5 hold time thold 1 1/ fsys 6 data out after shift tso 3 1/ fsys 7 csb high time tcsh 2 1/ fsys 8 data out change from z to driven data start of transfer tz1 1 1/ fsys 9 data out change from driven data to z end of transfer tz2 1 1/ fsys no. description condition symbol min. typ. max. unit 1 dac resolution n 10 bit 2 integral non linearity (inl) e i 2 lsb 3 differential non linearity (dnl) e d 2 lsb 4 dac output voltage at full scale v max 1.22 v no. description condition symbol min. typ. max. unit 1 threshold point gpio th 1.2 1.32 1.46 v 2 pull down resistor v in > 0.75 v ddio r gpiopd 54 130 k? 3 output voltage low gpioiol=4 ma; v ddio =3.3 v gpiovol 0.4 v 4 output voltage high gpioioh=-4 ma; v ddio =3.3 v gpiovoh 2.4 v 5 low level output current gpiovol=0.4v gpioiol 6 12 ma 6 high level output current gpiovoh=2.4v gpioioh -25.6 -7.8 ma 7 tri-state input/output leakage current vout=v ddio or 0 v gpioilc -1 1 a e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
9/71 3.4.4.2 led driver 1 - 4 3.4.4.3 led driver c no. description condition symbol min. typ. max. unit 1 regulated proportion of led current @ dac = 0 dac = 0 i r_mins 5 % if i r_maxs 1) ma 2 max. regulated proportion of led current (range) range = 31, i r_maxs 10.0 ma 3 stepsize for regulated cur - rent-range confguration dac = 1023 i r_steps 290 a 4 resolution current-range confguration n rs 5 bit 5 max. fxed proportion of led current (offset) i o_maxs 10.0 ma 6 stepsize for fxed offset-cur - rent confguration offset = 31 i _steps 290 a 7 resolution offset-current confguration n os 5 bit 8 dc-bias current i bias s 225 a no. description condition symbol min. typ. max. unit 1 regulated proportion of led current @ dac = 0 dac = 0 i r_minc 5 % of i r_maxs 1) ma 2 max. regulated proportion of led current (range) range = 31, dac = 1023 i r_maxc 4.0 ma 3 stepsize for regulated cur - rent-range confguration i r_stepc 125.0 a 4 resolution current-range confguration n rc 5 bit 5 max. fxed proportion of led current (offset) offset = 127 i o_maxc 5.0 ma 6 stepsize for fxed offset-cur - rent confguration i o_stepc 40.0 a 7 resolution offset-current confguration n oc 7 bit 8 minimal value for dc-bias current i bia_c0 100 a 9 stepsize for dc-bias current i dco_stepc 2.5 ma 10 max. dc-bias current (dc_offset) dc_offset = 15 i dco_maxc 37.6 ma 1) i r_maxs is the maximum current selected with parameter range 1) i r_maxs is the maximum current selected with parameter range e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
10/71 3.4.4.4 receiver no. description condition symbol min. typ. max. unit 1 feedback resistor of 1. stage amplifer at input ka and an; bit 0, bit 1 = 1 r f 50 k? 2 feedback capacitor of 1. stage amplifer at input ka and an; bit 2, bit 3 = 1 c f 3.6 pf 3 dc photo-current gyrator mode; bit 9, bit 10 = 1 i dc_photo a 4 voltage at amplifer input ka v ka 1.9 v 5 voltage at amplifer input an v an 1.3 v 6 corner frequency highpass flter f g 10 khz 7 gain amplifer 2. stage g 0 6 db 8 gain amplifer 3. stage pcr[8:7]="01" g 3 12 db 9 gain amplifer 3. stage pcr[8:7]="00" or "11" g 3 24 db 10 gain amplifer 3. stage pcr[8:7]="10" g 3 36 db 11 total gain sym. input pcr[8:7]="01" g tot 118 db? 12 total gain sym. input pcr[8:7]="00" or "11" g tot 130 db? 13 total gain sym. input pcr[8:7]="10" g tot 142 db? 14 total gain nonsym. input pcr[8:7]="01" g tot 112 db? 15 total gain nonsym. input pcr[8:7]="00" or "11" g tot 124 db? 16 total gain nonsym. input pcr[8:7]="10" g tot 136 db? 17 center frequency f c 125 khz 18 resolution demodulator output n demod 1 bit 19 capacitance of photo diode at input ka c diode 70 pf 20 internal reference voltage v ref 1.22 v 21 internal reference current i bias 10 a pcr - preamplifer confguration register e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
11/71 4.1 introduction 4 functional description the general architecture of the 3d-optical input device is shown in the system block diagram. the cpu is connected to the memory (flash and sram) and the peripheral modules via the internal system bus. the system bus provides a 16 bit address space and allows 8 and 16 bit data transfers. the memory contains the program code and the data. memory and registers are mapped to the global memory map and can be accessed through all memory related operation provided by the cpus instruction set. the memory of the ic consists a flash cell up to 30kx22 (60kbyte) including 6 additional bits per word used as crc for error detection and error correction and a sram cell up to 1.5kx18 (3kbyte) including 2 bit parity per word. the interrupt controller collects requests from all interrupt sources and provides an interrupt signal to the cpu. interrupt sources can be masked within the interrupt controller. interrupts are generated by the modules and hold until they are cleared within the module. see module description for clearing procedures. the spi can be confgured either as a master or a slave. transfer length is eight bit and can be extended by a mul - tiple of eight bit. data fifos are provided for transmit and receive tasks. the sci provides the standard nrz (non return to zero) mark/space data format where each frame contains one start bit, eight data bits and one stop bit. several features are implemented for special lin support. the timer module contains a 32 bit timer module as well as a watchdog timer. additionally a second timer module operating on wake up clock is implemented that remains active even in off mode, so it can be used for a periodical wake up from off mode for applications that require a low current consumption. 8 io port pins can either be confgured as general purpose io`s or can be confgured as ports for the spi or sci mod - ule. additionally two ports are reserved for the i2c slave interface. the clock and reset generator module provides the system clock and the global reset signal. a power-on-reset, brown out detect and a power watch are implemented. as external reset source a reset input will be considered. the system clock is generated by an on-chip oscillators. a more detailed diagram of the clock/reset generation block (crg) is shown in the following sections. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
12/71 4.2 supply voltages 4.2.1 block diagram 4.2.2 functional description 4.2.3 power up sequence considerations v d d i o gpio interface peripherie flash el16 core analog led1-4 ledc crg ram v ss v d d i o v ss v ssledx v ssledc v ssledx v ssledc figure 2: block diagram supply voltages the devices has three separated power domains and needs two different levels of power supplies. the core power domain is supplied by vddc and the analog power domain by avdd. both needs the same voltage level. the third supply domain is supplied by vddio and powers gpios. see also 2.2 recommended operating conditions. during power-up the power-on-reset confgures all pads as inputs consequently disabling the output drivers. the io supply is watched after power up if the core supply is in the specifed range and causes a reset if it leaves the allowed region. the core supply is watched via a brown out circuit. the pads will remain input pads as long as the software does not reconfgure them. according the following diagram it must be guaranteed that advv / dvvc is not switched on before vddio. nrst can be switched on if the vddio and avdd/dvvc are stabilized on its potential. a >= 0ms b > 5ms (recommended) to avoid foating gates, a < 100s is recommended. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
13/71 4.3 brown out detection 4.3.1 timing diagram 4.2.4 power down sequence considerations figure 4: brown-out timing diagram figure 3: brown-out timing diagram during power down the chip will enter the reset state as soon as the core or io supply leaves the specifed region bringing all pads into input confguration again. v d d m i n b r o w n - o u t b l a c k - o u t v d d c / a v d d v b o h l v d d c / a v d d u n d e f i n e d b e h a v i o u r r e s e t t v b o h y s t 2.5v (a vdd / vddc ) e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
14/71 figure 5: timing of the external reset signal t f i l t e r e d b y d e b o u n c e r n r s t _ p a d i n n r s t _ d e b t d e b _ n r s t the ic is equipped with a reset input pin which can be used to reset the chip. any low pulse longer than tdebnrst on the external reset line will be sensed and causes an ic reset. the ic contains different dynamic and static reset sources. the static sources trigger the master reset as long as the cause for the reset persists. the dynamic sources trigger the reset for a defned minimum reset time. after that time has expired the system reset is released. in case the dynamic source is still signaling a reset the reset is re-triggered. static reset sources : - a power up sequence of the core voltage (power on reset) - brown out of the core voltage dynamic reset sources: - uncorrectable flash crc error - sram parity error - cpu register parity error - watchdog timeout - uncorrectable trim register ecc error 4.4 reset generation 4.4.1 reset generation (resgen) 4.3.2 functional description the brown out detection of the chip will cause a reset whenever the core or io power supply falls below the speci - fed region. an over-voltage protection is not implemented. the circuit will not be operational when the core sup - ply is below vddmin. in these cases the power-on-reset will take care of proper reset generation. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
15/71 figure 6: power-on-reset timing digram 4.4.2 power-on-reset 4.4.2.1 timing diagram 4.4.2.2 functional description 4.5 system failsafe features the power on reset is designed to cause a reset during the power on cycle of the chip. the reset will be deactivated when the supply crosses v por . after the power up sequence the power on reset block will only cause a new reset if the power supply voltage drops below vddmin and the rise and fall times of the supply are below the specifed values. failsafe feature asserts interrupt asserts reset flash crc (bit error corrected) x flash crc (uncorrectable bit error) x empty (erased) flash word read detection x flash write detection x ram byte parity x uninitialized ram word / byte read detection x cpu register parity x cpu undefned opcode detection x cpu misaligned word access detection x opcode execution memory protection x stack overfow detection x invalid module register access detection x watchdog time-out x watchdog window protection x brownout detection (supply voltage monitoring) x system clock monitoring x v d d c / a v d d v d d m i n b r o w n o u t i s n o t d e t e c t e d e n d o f p o w e r - o n - r e s e t t v p o r e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
16/71 4.6.2 halios? features in order to be able to realize optical as well as capacitive sensors the input amplifer can be changed in its charac - teristic between transimpedance amplifer and charge amplifer. this is achieved by changing the feedback imped - ance. to have a good immunity to noise the receiving path consists of a symmetrical differential input. the halios? ic contains a confgurable current driver interface. in the case of an optical sensor it is possible to drive up to four sending leds and one compensation led. if a capacitive sensor should be realized, the current is converted into a voltage by connecting pullup resistances at the outputs ledx. the halios? measurement loop is closed by a 10 bit dac which regulates the output current for the sending/compensation led. the dac is control - led by a counter that sets the dac dependent on the received signal amplitudes up or down. to follow fast signal changes the counter can be increased or decreased by 1, 2, 4 or 8 steps, this is called the step size that is set due to the number of up/down-counts in the same direction. to start a new measurement the in - terface is confgured with the counter-value and the step size (generally the values from the last measurement), the led confguration and the current confguration for the led driver. the measurement regulates the dac and performs 25 counter steps to follow the actual refection conditions of the sensor. after one measurement the in - terface returns the counter-value, the mean-value (it is calculated from the last 16 counter-steps during one meas - urement) and the stepsize from the last integrator cycle. figure 7: halios? block diagram 4.6 halios? interface 4.6.1 halios? block diagram ka - + - + led1 led2 led3 switch hp demod. 10 bit counter clocks clk rst adr amp_ka amp_an an led4 ledc analog digital mux current control register - + dac offset ledc 5 dac range 5 dac range 5 dac offset 5 dac din dout offset 5 dac 1 1 2 10 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
17/71 4.6.3 halios? module registers register name address description start value counter 0x00 measurement confguration 0x02 measurement confguration halios? clock 0x04 current confguration phase a 0x06 current confguration phase b 0x08 current confguration compensator offset 0x0a measurement result: counter value 0x0c measurement result: mean value 0x0e interrupt 0x10 preamplifer confguration 0x12 send frequency select 0x14 register start value counter (0x00) table 1: start value counter msb lsb content 15: 12 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:12 : stz: startup step size for one step of the integrator (range: "0001", "0010", "0100" or "1000") 10 : 0 - normal settling time of optical gyrator 1 - decrease settling time of optical gyrator 9:0 : strtcnt: startup counter - value from the integrator (range: 0 ... 1023) reset value: 0x0000 after the automated measurement cycle is fnished an interrupt appears if the interrupt is enabled. the interrupt is used to wake the system from standby mode. the halios? clock is adjustable in 5 frequencies (fsys=8 mhz): - 167 khz - 125 khz (default) - 100 khz - 83 khz - 71 khz e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
18/71 register measurement confguration halios? clock (0x04) table 3: measurement confguration halios? clock msb lsb content 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r/w r/w r/w r/w r/w external access r r r r r r r r r r r r/w r/w r/w r/w r/w bit description 4 : polarity of ledc modulator clock ('0' = normal, '1' = inverted) 3 : polarity of led4 modulator clock ('0' = normal, '1' = inverted) note: not available in version 1 and version 2 2 : polarity of led3 modulator clock ('0' = normal, '1' = inverted) note: not available in version 1 and version 2 1 : polarity of led2 modulator clock ('0' = normal, '1' = inverted) 0 : polarity of led1 modulator clock ('0' = normal, '1' = inverted) register measurement confguration (0x02) table 2: measurement confguration msb lsb content 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : halmeas: starts a new measurement phase, switching from '0' to '1' starts measurement. after measurement the bit resets itself. 14 : accon: en/disables the acceleration of the integrator ('0' = disabled, '1' = enabled) 13 : deactivation of an input to reduce current consumption in the case that only the ka input is used ('0' = active, '1' = deactivated) 12 : aon: control of analogue part ('0' = off, '1' = on) 11 : fixb: sets the leds activated in phase b to fxed sending current ('0' = variable, '1' = fxed) 10 : fixa: sets the leds activated in phase a to fxed sending current ('0' = variable, '1' = fxed) 9 : led c a: decides if led is active for the measurement ('0' = off, '1' = on) note: bits 9 downto 0 will be reset after measurement 8 : led c b: decides if led is active for the measurement ('0' = off, '1' = on) 7 : led 4 a: decides if led is active for the measurement ('0' = off, '1' = on) note: not available in version 1 and version 2 6 : led 4 b: decides if led is active for the measurement ('0' = off, '1' = on) note: not available in version 1 and version 2 5 : led 3 a: decides if led is active for the measurement ('0' = off, '1' = on) note: not available in version 1 and version 2 4 : led 3 b: decides if led is active for the measurement ('0' = off, '1' = on) note: not available in version 1 and version 2 3 : led 2 a: decides if led is active for the measurement ('0' = off, '1' = on) 2 : led 2 b: decides if led is active for the measurement ('0' = off, '1' = on) 1 : led 1 a: decides if led is active for the measurement ('0' = off, '1' = on) 0 : led 1 b: decides if led is active for the measurement ('0' = off, '1' = on) reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
19/71 register current confguration phase a (0x06) register current confguration phase b (0x08) register current confguration compensator offset (0x0a)) table 4: current confguration phase a table 5: current confguration phase b table 6: current confguration compensator offset msb lsb content 9:5 4:0 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 9:5 : off: offset phase a 4:0 : rng: range phase a msb lsb content 9:5 4:0 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 9:5 : off: offset phase b 4:0 : rng: range phase b msb lsb content 11:8 6:0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r/w r/w r/w r/w r r/w r/w r/w r/w r/w r/w r/w external access r r r r r/w r/w r/w r/w r r/w r/w r/w r/w r/w r/w r/w bit description 11:8 : dc_offset current ledc (4 bit) 6:0 : offset compensation ledc e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
20/71 register interrupt (0x10) table 9: interrupt msb lsb content 1 0 reset value 0 0 0 0 0 0 0 0 internal access r r r r r r r/w r/w external access r r r r r r r/w r/w bit description 1 : clhali: clear halios? interrupt 0 - no infuence 1 - clear halios? interrupt 0 : halie: halios? interrupt enable: 0 - interrupt disabled 1 - interrupt enabled register measurement result: counter value (0x0c) register measurement result: mean value (0x0e) table 7: measurement result: counter value table 8: measurement result: mean value msb lsb content 15: 12 9:0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:12 : stz: stepsize integrator 9:0 : count: integrator value from the measurement msb lsb content 15: 12 11:0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:12 : stz: stepsize integrator 11:0 : mean: mean value from the measurement e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
21/71 register preamplifer confguration (0x12) the el16h6 is based on a 16-bit risc cpu core. it includes a 30kx22 (60 kbyte) flash memory with 6 bit crc checksum per 16 bit word and a 1.5kx18 (3 kbyte) sram with byte write support. it provides up to 16 general purpose i/o's, one synchronous serial peripheral interface (spi) and one asynchronous serial interface (sci). spi and sci can be mapped to the io port or to the d2d port. furthermore a 32 bit timer and a watchdog are included. as the system clock source either an on-chip oscillator or a crystal oscillator can be selected. table 10: preamplifer confguration msb lsb content 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : enlarge phasemargin pm for 1. stage amplifers in capacitive mode ('0' = pm low and fast, '1' = pm high and slow) 14 : bias current of preamplifer medium ib = ('0' = 30ua, '1' = 10ua) if bit13='0' 13 : bias current of preamplifer low ib = ('0' = 10ua, '1' = 2ua) if bit14='1' 12 : deactivate gyrator at an input: ('0' = on, '1' = off) 11 : deactivate gyrator at ka input: ('0' = on, '1' = off) 10 : select between optical and capacitive gyrator at an input: ('0' = optical, '1' = capacitive) note: not available in version 1 and version 3 9 : select between optical and capacitive gyrator at ka input: ('0' = optical, '1' = capacitive) note: not available in version 1 and version 3 8:7 : select amplifcation of 3. stage amp "00" - 16 "01" - 4 "10" - 64 "11" C 16 6 : switch an input off: ('0' = on, '1' = off) 5 : switch ka input off: ('0' = on, '1' = off) 4 : polarity of the switch between 1. stage output and summation amplifer: polarity inverted ('0' = normal, '1' = inverted) 3 : 1. stage amplifer an input: cf feedback capacitor deactivation ('0' = on, '1' = off) 2 : 1. stage amplifer ka input: cf feedback capacitor deactivation ('0' = on, '1' = off) 1 : 1. stage amplifer an input: rf feedback resistor deactivation ('0' = on, '1' = off) 0 : 1. stage amplifer ka input: rf feedback resistor deactivation ('0' = on, '1' = off) reset value: 0x0000 register send frequency select (0x14) table 11: send frequency select msb lsb content 2:0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 internal access r r r r r r r r r r r r r r/w r/w r/w external access r r r r r r r r r r r r r r/w r/w r/w bit description 2:0 : halios? send frequency select sendfreq (sfreq) frequency = fsys/(sfreq*16) sfreq range 3..7 reset value: 0x0004 5 microcontroller el16h6 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
22/71 5.1 feature list 5.2 debugging 5.3 cpu registers ? risc architecture with 27 instructions and 7 addressing modes ? 16 registers including pc, sp and status register ? 16 bit address range ? word and byte addressing ? interrupt support ? standby and stop mode support ? automatic bus ready handling ? debugging support (jtag interface) ? 3 hardware breakpoint triggers ? failsafe architecture to access the debug structures of the el16 cpu a 4-wire standard jtag interface is used. the jtag interface can be accessed via gpio pins when the test_mode pin is set to one. test_mode pin set to zero resets all test and debug structures and the ic operates in normal mode. the el16 embedded breakpoint logic provides the following features: ? 3 breakpoint triggers ? each trigger can match a separate address or data bus value ? a trigger value compare mask can be defned ? trigger can match a greater, smaller, equal or non equal value ? trigger can be confgured for read / write or instruction fetch / non instruction fetch bus cycles ? triggers can be combined (trigger dependency) ? all breakpoints can be used for stepping and run-stop a program the el16 contains 16 registers (r0 to r15) including program counter, stack pointer and status register. t m 0 c p u c o re 1 6 b i t j t a g c l o c k t e s t re s e t t m 1 v p g p i o s d a s c l m u l t i p l y i r q c o n t r o l t i m e r w a t c h d o g i 2 c g p i o s p i / s c i f l a s h r a m d a t a n r s t figure 8: c block diagram e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
23/71 5.3.1 program counter (pc) 5.3.2 stack pointer (sp) 5.3.3 status register (sr) v : overfow bit this bit is set when the result of an arithmetic operation overfows the signed-variable range. clkoff : stop fag cpu clock gated cpuoff : standby fag cpu halted the 16-bit program counter (pc/r0) points to the next instruction to be executed. each instruction uses an even number of bytes (two, four, or six), and the pc is incremented accordingly. instruction accesses in the 64-kb address space are performed on word boundaries, and the pc is aligned to even addresses. the pc can be addressed with all instructions and addressing modes. the stack pointer (sp/r1) is used by the cpu to store the return addresses of subroutine calls and interrupts. it uses a pre-decrement, post-increment scheme. in addition, the sp can be used by software with all instructions and ad - dressing modes. the sp is initialized into ram by the user, and is aligned to even addresses. the status register (sr/r2), used as a source or destination register, can be used in the register mode only ad - dressed with word instructions. the remaining combinations of addressing modes are used to support the con - stant generator. register status register (sr/r2) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r r r r r r r r bit description bit 8 : v bit 5 : clk off bit 4 : cpu off bit3 : gie bit2 : n bit1 : z bit0 : c register name address description status register sr/r2 table 12: send frequency select e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
24/71 5.3.4 constant generation registers cg1 and cg2 5.3.5 general-purpose register r4 - r15 six commonly-used constants are generated with the constant generator registers r2 and r3, without requiring an additional 16-bit word of program code. the constants are selected with the source-register addressing modes (as), as described in the table below: the twelve registers, r4-r15, are general-purpose registers. all of these registers can be used as data registers or address pointers and can be used with byte or word instructions. the constant generator advantages are: no special instructions required no additional code word for the six constants no code memory access required to retrieve the constant the assembler uses the constant generator automatically if one of the six constants is used as an immediate source operand. registers r2 and r3, used in the constant mode, cannot be addressed explicitly; they act as source- only registers. register name as value remarks r2 00 - register mode (access r2) r2 01 (0) used for absolute address mode r2 10 0x0004 constant +4 r2 11 0x0008 constant +8 r3 00 0x0000 constant 0 r3 01 0x0001 constant +1 r3 10 0x0002 constant +2 r3 11 0xffff constant -1 gie : global interrupt enable n : negative bit this bit is set when the result of a byte or word operation is negative and cleared when the result is not negative. word operation: n is set to the value of bit 15 of the result byte operation: n is set to the value of bit 7 of the result z : zero bit this bit is set when the result of a byte or word operation is 0 and cleared when the result is not 0. c : carry bit this bit is set when the result of a byte or word operation produced a carry and cleared when no carry occurred. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
25/71 5.4 addressing modes 5.5 el16 instruction set seven addressing modes for the source operand and four addressing modes for the destination operand can ad - dress the complete address space with no exceptions. the bit numbers in the table below describe the contents of the as (source) and ad (destination) mode bits. the complete el16 instruction set consists of 27 instructions. there are three instruction formats: ? dual-operand ? single-operand ? jump all dual-operand and single-operand instructions can be byte or word instructions by using .b or .w extensions. byte instructions are used to access byte data. word instructions are used to access word data. if no explicit exten - sion is used, the instruction is a word instruction. the source and destination of an instruction are defned by the following felds: abbr. description src the source operand defned by as and s-reg dst the destination operand defned by ad and d-reg as the addressing bits responsible for the addressing mode used for the source (src) s-reg the working register used for the source (src) ad the addressing bits responsible for the addressing mode used for the destination (dst) d-reg the working register used for the destination (dst) b/w byte or word operation: 0: word operation, 1: byte operation as/ad addressing mode syntax description 00/0 register mode rn register contents are operand 01/1 indexed mode x(rn) (rn + x) point to the operand. x is stored in the next word. 01/1 symbolic mode addr (rn + x) point to the operand. x is stored in the next word. indexed mode x(pc) is used. 01/1 absolute mode &addr (rn + x) point to the operand. x is stored in the next word. indexed mode x(0) is used. 10/- indirect register mode @rn rn is used as a pointer to the 11/- indirect auto increment @rn+ rn is used as a pointer to the operand. rn is incremented afterwards by 1 for .b instructions and by 2 for .w instructions 11/- immediate mode #n the word following the instruction contains the immediate constant n. indirect auto-increment mode @pc+ is used. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
26/71 figure 9: coding of the 16 bit op-code the following tables shows coding of the 16 bit op-code: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 mnemonic 0 0 0 0 0 0 -- 0 0 0 1 0 0 0 0 0 0 ad/as d-reg/s-reg rrc 0 0 0 1 rrc.b 0 0 1 0 swp. b 0 0 1 1 --- 0 1 0 0 rra 0 1 0 1 rra.b 0 1 1 0 sxt 0 1 1 1 --- 1 0 0 0 push 1 0 0 1 push.b 1 0 1 0 call 1 0 1 1 --- 1 1 0 0 reti 1 1 0 1 --- 1 1 1 0 --- 1 1 1 1 --- 0 0 0 1 0 1 --- 1 0 --- 1 1 --- 0 0 1 0 0 0 10-bit pc offset jnz / jne 0 0 1 jz / jeq 0 1 0 jnc / jlo 0 1 1 jc / jhs 1 0 0 jn 1 0 1 jge 1 1 0 jl 1 1 1 jmp 0 1 0 0 s-reg ad b/ w as d-reg mov 0 1 0 1 add 0 1 1 0 addc 0 1 1 1 subc 1 0 0 0 sub 1 0 0 1 cmp 1 0 1 0 dadd 1 0 1 1 bit 1 1 0 0 bic 1 1 0 1 bis 1 1 1 0 xor 1 1 1 1 and e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
27/71 figure 10: instruction set of el16 the table below shows a list of all instructions:: mnemonic parameters description v n z c adc(.b)** dst add c to destination dst + c -> dst * * * * add(.b) src, dst add source to destination src + dst -> dst * * * * addc(.b) src, dst add source to c and destination src + dst + c -> dst * * * * and(.b) src, dst and source and destination src and dst -> dst 0 * * * bic(.b) src, dst clear bits in destination not(src) and dst -> dst - - - - bis(.b) src, dst set bits in destination src or dst -> dst - - - - bit(.b) src, dst test bits in destination src and dst 0 * * * br dst branch to destination dst -> pc - - - - call dst call destination sp-2 -> sp, pc+2 -> @sp, dst -> pc - - - - clr (.b)** dst clear destination 0 0 -> dst - - - - clrc** --- clear c 0 0 -> c - - - 0 clrn** --- clear n 0 0 -> n - 0 - - clrz** --- clear z 0 0 -> z - - 0 - cmp (.b) src, dst compare source and destination dst - src * * * * dadc (.b)** dst add c decimally to destination dst + c -> dst 0 * * * dadd (.b) src, dst add source and c decimally to destination src + dst + c -> dst 0 * * * dec (.b)** dst decrement destination dst -1 -> dst * * * * decd (.b)** dst double decrement destination dst -2 -> dst * * * * dint** --- disable interrupts 0 0 -> gie - - - - eint** --- enable interrupts 1 1 -> gie - - - - inc (.b) dst increment destination dst +1 -> dst * * * * incd (.b)** dst double increment destination dst +2 -> dst * * * * inv (.b)** dst invert destination not(dst) -> dst * * * * jc / jhs label jump if c set / jump if higher or same if (condition) pc + 2 * offset -> pc - - - - jz / jeq label jump if z set / jump if equal if (condition) pc + 2 * offset -> pc - - - - jge label jump if greater or equal if (condition) pc + 2 * offset -> pc - - - - jl label jump if less if (condition) pc + 2 * offset -> pc - - - - jmp label jump pc + 2 * offset -> pc - - - - jn label jump if n set / jump if negative if (condition) pc + 2 * offset -> pc - - - - jnc /jlo label jump if c not set / jump if lower if (condition) pc + 2 * offset -> pc - - - - jnz / jne label jump if z not set / jump if equal if (condition) pc + 2 * offset -> pc - - - - mov (.b) src, dst move source to destination src -> dst - - - - nop --- no operation --- - - - - pop (.b)** dst pop item from stack to destination @sp+ -> dst - - - - push (.b) src push source onto stack sp -2 -> sp, src -> sp - - - - ret** --- return from subroutine @sp -> pc - - - - reti --- return from interrupt @sp -> sr, @sp+ -> pc * * * * rla (.b)** dst rotate left arithmetically dst * 2 -> dst * * * * rlc (.b)** dst rotate left through c dst * 2 -> dst, c -> lsb(dst) * * * * rra (.b) dst rotate right arithmetically dst / 2 -> dst 0 * * * rrc (.b) dst rotate right through c dst / 2 -> dst, c -> msb(dst) 0 * * * sbc (.b)** dst subtract not(c) from destination dst + not(0) + c -> dst * * * * setc** --- set c 1 -> c - - - 1 setn** --- set n 1 -> n - 1 - - setz** --- set z 1 -> z - - 1 - sub (.b) src, dst subtract source from destination dst + not(src) + 1 -> dst * * * * subc (.b)** src, dst subtract source and not(c) from destination dst + not(src) + c -> dst * * * * swpb dst swap bytes --- - - - - sxt dst extend sign --- 0 * * * tst (.b)** dst test destination dst + not (0) + 1 0 * * 1 xor(.b) src, dst exclusive or source and destination src xor dst -> dst * * * * ** emulated instruction e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
28/71 5.5.1 el16 instruction cycle counts figure 11: el16 instruction cycle counts single includes rrc, rra, swpb and sxt double includes all double operand instructions except mov command type operation cycles cycles(dreg==pc) mov double sreg -> dreg sreg x dreg -> dreg 1 1 2 2 mov double sreg -> y(dreg) -> dreg sreg x y(dreg) -> ydreg 3 4 -- mov double @sreg -> dreg @sreg x dreg -> dreg 2 2 3 3 mov double @sreg -> y(dreg) -> dreg @sreg x y(dreg) -> ydreg 4 5 -- mov double @sreg+ -> dreg @sreg+ x dreg -> dreg 2 2 3 3 mov double @sreg+ -> y(dreg) -> dreg @sreg+ x y(dreg) -> ydreg 4 5 --- mov double xsreg+ -> dreg xsreg+ x dreg -> dreg 3 3 4 4 mov double xsreg+ -> y(dreg) -> dreg xsreg+ x y(dreg) -> ydreg 5 6 --- single single single single dreg @dreg @dreg+ y(dreg) --- --- --- --- 2 --- --- --- jump reti ircq --- --- --- 2 3 4 --- --- --- push push push push reg @reg @reg+ x(reg) 3 4 4 5 --- --- --- --- call call call call reg @reg @reg+ x(reg) 3 4 4 5 --- --- --- --- e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
29/71 5.6 memory description 5.6.1 memory map figure 12: memory map r e s e r v e d g p i o 0 x 0 0 0 0 0 x f f f f m o d u l e s 0 x 1 0 0 0 0 x 0 4 0 0 0 x 0 2 0 0 s c i s p i t i m e r 0 ( w d o g ) r e s e r v e d m u l t i p l i e r i r q c o n t r o l i 2 c f l a s h c o n t r o l a n a l o g c o n t r o l m e m o r y p r o t e c t i o n h a l i o s ? m e a s u r e m e n t d e s i g n i d e n t 0 x 0 2 0 0 0 x 0 0 0 0 t i m e r 1 r e s e r v e d r e s e r v e d v 4 v 3 v 2 v 1 0 x 8 0 0 0 0 x c 0 0 0 0 x e 0 0 0 0 x 0 8 0 0 0 x 0 c 0 0 0 x 0 e 0 0 f l ash sr am e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
30/71 5.6.2 base address table base address size module name 0x1000 0xf000 flash address 0x0400 0x0c00 sram address 0x0200 0x0200 reserved 0x01e0 0x0020 design ident module 0x01c0 0x0020 memory protection module 0x01a0 0x0020 analog control module 0x0180 0x0020 flash control module 0x0160 0x0020 i2c interface 0x0140 0x0020 interrupt control module 0x0120 0x0020 multiplier module 0x0100 0x0020 reserved 0x00e0 0x0020 timer 1 0x00c0 0x0020 timer 0 (window-watchdog) 0x00a0 0x0020 spi module 0x0080 0x0020 lin-sci module 0x0060 0x0020 gpio module 0x0040 0x0020 halios? interface 0x0020 0x0020 reserved 0x0000 0x0020 reserved base address size module name 0xc000 0x4000 flash 0x1000 0x3000 reserved 0x0c00 0x0400 sram 0x0400 0x0800 reserved base address size module name 0xe000 0x2000 flash 0x1000 0xd000 reserved 0x0e00 0x0200 sram 0x0400 0x0a00 reserved base address size module name 0x8000 0x8000 flash 0x1000 0x7000 reserved 0x0800 0x0800 sram 0x0400 0x0400 reserved the differences in base addresses for the 3 additional devices of the el16h6 versions are described in the tables below. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
31/71 5.6.3 flash el16h6 ? main block size: up to 30k x 22 bit (60kbyte) crc protected ? v4: 120 pages (60kbyte) ? v3: 64 pages (32kbyte) ? v2: 32 pages (16kbyte) ? v1: 16 pages (8kbyte) ? 256 words per page ? 8 rows per page -> 32 words per row ? page erase support ? see tsmc flash documentation for timing details ? 20 ms page erase ? 200 ms mass erase ? about 30 s programming time per word flash crc calculation ? crc polynomial: x 6 + x 4 + x 3 + x 2 + x 1 + 1 ? hamming distance: 4 (1 bit error correctable, 2 bit errors detectable) ? erased flash words will cause an uncorrectable bit error when read, which asserts a reset 5.6.4 sram el16h6 5.7 design ident module ? size: up to 1.5k x 18bit (3kbyte) ? v4: 3kbyte ? v3: 2kbyte ? v2: 1kbyte ? v1: 512byte ? byte write enable support ? each byte is extended by a parity bit the design ident module of the el16h6 contains following information: ? design ident (split into 4x16 bit words), a unique number which identifes every single device ? design version code all information are read only. 5.7.1 design ident module registers register name address description design ident 0 0x00 design ident 1 0x02 design ident 2 0x04 design ident 3 0x06 version 0x08 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
32/71 register design ident 0 (0x00) register design ident 1 (0x02) register design ident 2 (0x04) register design ident 3 (0x06) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : design ident 0 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : design ident 1 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : design ident 2 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : design ident 3 table 13: send frequency select table 14: design ident 1 table 15: design ident 2 table 16: design ident 3 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
33/71 register version (0x08) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : design version code v1 - 0x0000 v2 - 0x0025 v3 - 0x001a v4 - 0x003f table 17: version 5.8 memory protection module ? op-code execute area confguration (granularity: 1kbyte, 64 areas) ? stack area confguration (granularity: 256byte, 12 areas) ? invalid module register address handling note: in versions smaller then el16h6v4 activation of non existent memory areas in op-code execute enable reg - isters and stack enable register have no effect. 5.8.1 memory protection module registers register name address description op-code execute enable 0 0x00 op-code execute enable 1 0x02 op-code execute enable 2 0x04 op-code execute enable 3 0x06 failure address value 0x08 stack enable 0x0a invalid address value 0x0c interrupt clear 0x0e e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
34/71 register op-code execute enable 0 (0x00) register op-code execute enable 1 (0x02) register op-code execute enable 2 (0x04) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : area 0x3000 to 0x3ffe ... : ... 1 : area 0x0400 to 0x07fe 0 : area 0x0000 to 0x03fe enable 0 - execution of op-code denied 1 - execution of op-code allowed area size: 1 kbyte reset value: 0xfff0 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : area 0x7000 to 0x7ffe ... : ... 1 : area 0x4400 to 0x47fe 0 : area 0x4000 to 0x43fe enable 0 - execution of op-code denied 1 - execution of op-code allowed area size: 1 kbyte reset value: 0xffff bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : area 0xb000 to 0xbffe ... : ... 1 : area 0x8400 to 0x87fe 0 : area 0x8000 to 0x83fe enable 0 - execution of op-code denied 1 - execution of op-code allowed area size: 1 kbyte reset value: 0xffff table 18: op-code execute enable 0 table 19: op-code execute enable 1 table 20: op-code execute enable 2 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
35/71 register op-code execute enable 3 (0x06) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15 : area 0xf000 to 0xfffe ... : ... 1 : area 0xc400 to 0xc7fe 0 : area 0xc000 to 0xc3fe enable 0 - execution of op-code denied 1 - execution of op-code allowed area size: 1 kbyte reset value: 0xffff table 21: op-code execute enable 3 register stack enable (0x0a) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 internal access r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 11 : area 0x0f00 to 0x0ffe to 1 : area 0x0500 to 0x05fe 0 : area 0x0400 to 0x04fe reset value: 0x0fff table 23: stack enable register failure address value (0x08) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : address of last detected failure (execute protection, stack protection, misaligned 16 bit access, undefned op-code) reset value: 0x0000 table 22: failure address value e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
36/71 register invalid address value (0x0c)) register interrupt clear (0x0e) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : address of last invalid module register access reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w w w w external access w w w w w bit description 4 : undefned op-code irq clear (address of undefned op-code can be obtained by looking to the return address stored in stack minus - 2) 0 - no infuence 1 - clear interrupt 3 : misaligned 16 bit access irq clear 0 - no infuence 1 - clear interrupt 2 : invalid address irq clear 0 - no infuence 1 - clear interrupt 1 : stack protection irq clear 0 - no infuence 1 - clear interrupt 0 : execute protection irq clear 0 - no infuence 1 - clear interrupt table 24: invalid address value table 25: interrupt clear 5.9 analog control module 5.9.1 analog control module registers ? controls clock and reset generator (crg) register name address description wake-up timer confg 0x00 reset source status 0x0c reset source status clear 0x0e wake-up timer interrupt status 0x14 wake-up timer interrupt clear 0x16 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
37/71 register wake-up timer confg (0x00) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r r r r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r r r r/w r/w r/w r/w r/w bit description 15:8 : password must be written as 0xa5, will always be read as 0x96 4 : enable timer 0 - timer off 1 - timer on 3:0 : timer value: timer period = 2 ms * [timer value + 1], with timer value 0...15 reset value: 0x0010 table 26: wake-up timer confg register reset source status clear (0x0e) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w external access w bit description 0 : clears all reset status bits 0 - no infuence 1 - clears all reset status bits table 28: reset source status clear register reset source status (0x0c) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 8 : trap -> masked interrupt event occurred (interrupt number 0 and 1) 7 : ram parity error 6 : flash uncorrectable bit error 5 : cpu register parity error 4 : watchdog reset 1 : external reset 0 : power on reset / supply observe / trim register ecc error reset value: 0x0000 table 27: reset source status e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
38/71 register wake-up timer interrupt clear (0x16) register wake-up timer interrupt status (0x14) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w external access w bit description 0 : timer irq clear 0 - no infuence 1 - clear interrupt table 30: wake-up timer interrupt clear table 29: wake-up timer interrupt status bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 8 : trap -> masked interrupt event occurred (interrupt number 0 and 1) 0 : wake-up timer interrupt status 0 - no interrupt 1 - interrupt was asserted reset value: 0x0000 5.10 flash control module 5.10.1 flash control module registers note: in versions smaller then v4 activation of non existent memory areas in area protection registers have no effect. register name address description area protection (areas 0 - 7) 0x00 area protection (areas 8 - 14) 0x02 mode 0x04 status 0x06 irq clear 0x08 bit error corrected address 0x0c word confg 0x0e frequency confg 0x10 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
39/71 register area protection (areas 0 - 7) (0x00) table 31: area protection (areas 0 - 7) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 7:0 : writable 0 - area protected 1 - area writable areas 0 - 7 are flash main block areas (each 4 kbyte) area 0: 0x1000 - 0x1fff area 7: 0x8000 - 0x8fff reset value: 0x9600 register area protection (areas 8 - 14) (0x02) table 32: area protection (areas 8 - 14) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 6:0 : writable 0 - area protected 1 - area writable areas 8 - 14 are flash main block areas (each 4 kbyte) area 8: 0x9000 - 0x9fff area 14: 0xf000 - 0xffff reset value: 0x9600 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
40/71 register mode (0x04) register status (0x06) table 33: mode table 34: status bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 7:0 : mode 0x01 - main block read 0x04 - main block program 0x10 - erase main block page 0x40 - mass erase main block . : every over written mode value results in "main block read" mode . : program/erase modes: write access to appropriate fash address starts program / erase cy - cle (see busy fag of status register, consider word confg and row programming incomplete fag in program mode) -> program/erase mode fsm reset value: 0x9600 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 3 : bit error corrected bit error detected and corrected this bit is cleared by bit error corrected irq clear 2 : write error unexpected flash write access this bit is cleared by write error irq clear 1 : row programming incomplete current number of programmed row words != word confg (see below) 0 : busy 0 - ready 1 - busy (program or erase is still in progress) reset value: 0x0002 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
41/71 register bit error corrected address (0x0c) table 36: bit error corrected address bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : address of last correctable fash bit error reset value: 0x0000 register irq clear (0x08) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w external access w w bit description 1 : bit error detected irq clear 0 - no infuence 1 - clear interrupt 0 : write error irq clear 0 - no infuence 1 - clear interrupt note: a write error interrupt handler which is asserted on a bad write access during flash erase or program should be located in ram because flash content may not be readable dur - ing these operations. table 35: irq clear register word confg (0x0e) table 37: word confg bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 0 0 1 0 1 1 0 0 0 0 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r r r r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r r r r/w r/w r/w r/w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 4:0 : number of words to program within row 0: 1 word 1: 2 words ... 31: 32 words (default, a complete row) reset value: 0x961f e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
42/71 register frequency confg (0x10) table 38: frequency confg bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r r r r r r r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r r r r r r r/w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 1:0 : system frequency confg to get a correct erase and program timing 0: system frequency is 8 mhz (default) 1: system frequency is 16 mhz 2: system frequency is 24 mhz 3: system frequency is 32 mhz reset value: 0x9600 5.11 i2c interface 5.11.1 i2c block diagram figure 13: i2c block diagram sclin scl sclout stop detection 4 3 2 1 8 receive fifo 4 3 2 1 read fifo receive write byte receive data start detection bit count control sdain sda sdaout send 8 read byte high water level high water interrupt high water range range clear receive fifo slave address set/clear wake-up enable wake-up send data low water level low water interrupt low water range range clear send fifo e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
43/71 5.11.2 i2c function 5.11.3 i2c bus timing diagram figure 14: i2c bus timing diagram the i2c slave interface operates in 7 bit addressing mode with a maximum frequency of 400 khz (fast mode). to synchronize the ic to different operation voltages of the i2c bus the interface has a separate supply voltage input at pin vddio which is responsible for all interface pins. for more details of the addressing modes please refer to the "i2c - bus specification version 2.1" from philips. sda scl t hd:sta t low t high t su:dat t hd:dat t su:sta t f t sp t su:sto t buf t r 5.11.4 i2c module registers register name address description receive data fifo register 0x00 send data fifo register 0x02 control register 0x04 status register 0x06 register receive data fifo register (0x00) msb lsb content 7:0 reset value 0 0 0 0 0 0 0 0 internal access r r r r r r r r external access r r r r r r r r bit description 7:0 : receive data (see data fifo registers for details) table 39: receive data fifo register e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
44/71 register send data fifo register (0x02) register control register (0x04) register status register (0x06) msb lsb content 7:0 reset value 0 0 0 0 0 0 0 0 internal access w w w w w w w w external access w w w w w w w w bit description 7:0 : send data (see data fifo registers for details) table 40: send data fifo register table 41: control register table 42: status register bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 internal access r r r/w r/w r/w r/w r/w r/w r r/w r/w r/w r r/w r/w r/w external access r r r/w r/w r/w r/w r/w r/w r r/w r/w r/w r r/w r/w r/w bit description 13 : clear contents of send fifo registers 0 - read 1 - write 12 : clear contents of receive fifo registers 0 - read 1 - write 11 : clear wake-up mode enable bit (see description below) 0 - read 1 - write 10 : set wake-up mode enable bit (see description below) 0 - read 1 - write 9:8 : slave address "00" - $58 (reset value) "01" - $59 "10" - $5a "11" - $5b 6:4 : high water range for receive fifo (range 0....4) 2:0 : low water range for send fifo (range 0....4) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 8 : wake-up mode enable bit 0 - wake-up mode disabled 1 - wake-up mode enabled 6:4 : fill level of receive fifo 2:0 : fill level of send fifo e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
45/71 5.11.5 data fifo registers receive data fifo registers: the data received from the master is stored in the receive fifo registers and has a depth of 4. the current fll level can be read in the status register. if the fifo is completely flled up and another byte should be received the interface will force the master into a wait state until the application software reads one byte from the fifo. send data fifo registers: the master reads data that is stored in the send fifo registers. this fifo buffer has a depth of 4 registers. the current fll level can be read in the status register. if the fifo is empty and a byte is requested by the master the interface will force the master into a wait state until the application software writes one byte to the fifo. 5.11.6 interrupt handling i2c receive command (see list of all interrupts) command word pending in receive fifo, this means the next byte read from the receive fifo is the frst received byte after the slave has been addressed. depending on the application software this byte could be interpreted as a command. the interrupt fag is set back by reading a byte from the receive fifo. the master will force the inter - face into a wait state until the application software reads one byte from the fifo. i2c send request (see list of all interrupts) this fag signalizes that the master is requesting a byte but the send fifo is empty. the interrupt fag is set back by writing a byte to the send fifo. the master will force the interface into a wait state until the application soft - ware writes one byte to the fifo. i2c send fifo low water (see list of all interrupts) in case the low water mark (defned in control register) is reached or is exceeded the send fifo low water fag be - comes active. the fag is set back by flling to the send fifo. i2c receive fifo high water (see list of all interrupts) if the high water mark (defned in control register) is reached or is exceeded the receive fifo high water fag be - comes active. the fag is set back by reading from the receive fifo.. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
46/71 ? interrupt pending bit fip-fops (request hold elements) are located inside asserting modules ? interrupt vector support for more simple and faster interrupt entry ? fast vector based interrupt enable / disable ? nested interrupt support ? flash based main interrupt vector ? main interrupt enable mie for easy cli() and sei() implementation ? n is the number of interrupt vectors 5.12 interrupt control module 5.12.1 interrupt control module structure 5.11.7 i2c wake-up detection the i2c interface can be used to wake up the ic from any system state. in system state "off" the interface has to be confgured to wake the cpu therefore the 'wake-up mode enable bit' has to be set (defned in control register) before setting the ic to "off-mode". it is only possible to set the 'wake-up mode enable bit' if the i2c master has closed the communication on the bus, so the application software has to poll the bit 'wake-up mode enable' (defned in status register) after it was set to make sure the bus is in idle state and the ic can be set to "off-mode". after a new addressing of the slave on the bus the system will wake up from "off-mode" and the "i2c wake-up event" interrupt is active as long as the 'wake-up mode enable bit' is set back to zero (defned in control register). while the wake-up process the interface will force the master into a wait state by holding the scl line low. the application software has to clear the 'wake-up mode enable bit' (defned in control register) to release the scl line in order to continue the communication. and vector logic interrupt vector interrupt to cpu or mie masked interrupt status interrupt mask interrupt status n module and gpio interrupt sources n n n 1 n figure 15: interrupt control circuit e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
47/71 5.12.2 list of all interrupts vector number interrupt source priority 0 undefned op-code highest 1 misaligned word access 2 op-code execute protection error 3 stack protection error 4 invalid module register address access 5 flash bit error corrected 6 flash write error 7 halios? measurement ready 8 timer0 window error (watchdog) 9 timer1 event 10 i2c receive command 11 i2c send request 12 i2c send fifo low water 13 i2c receive fifo high water 14 spi timeout 15 spi fifo error 16 spi receive high water 17 spi send low water 18 sci break received 19 sci measurement completed 20 sci receive full 21 sci transmit empty 22 gpio rising 23 gpio falling 24 i2c wake-up event 25 wake-up timer wake-up event lowest e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
48/71 5.12.3 interrupt control module registers register name address description interrupt mask 0x00 interrupt status 0x04 masked interrupt status 0x08 interrupt vector number 0x10 maximum interrupt level 0x14 main interrupt enable 0x16 interrupt enable 0x18 interrupt disable 0x1a register interrupt mask (0x00) table 43: interrupt mask bit 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w external access r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w bit description 31:0 : mask (see list of all interrupts for details) 0 - disable 1 - enabled reset value: 0x0000.0000 register interrupt status (0x04) table 44: interrupt status bit 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r bit description 31:0 : status (see list of all interrupts for details) 0 - not active 1 - active reset value: 0x0000.0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
49/71 register masked interrupt status (0x08) table 45: masked interrupt status bit 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r bit description 31:0 : masked status (see list of all interrupts for details) 0 - not active 1 - active reset value: 0x0000.0000 register interrupt vector number (0x10) table 46: interrupt vector number bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : number (see list of all interrupts for details) vector number of pending interrupt with highest priority (smallest vector number) when no interrupt is pending, vector will be 0xffff reset value: 0x0000 register maximum interrupt level (0x14) table 47: maximum interrupt level bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 internal access r r r r r r r r r r r/w r/w r/w r/w r/w r/w external access r r r r r r r r r r r/w r/w r/w r/w r/w r/w bit description 5:0 : level needed for nested interrupt support software writes current vector number to this register, so only interrupts with higher priority (lower vector number) can nest. reset value: 0x0020 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
50/71 register main interrupt enable (0x16) register interrupt enable (0x18) register interrupt disable (0x1a) table 48: main interrupt enable table 49: interrupt enable table 50: interrupt disable bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 internal access r r r r r r r r r r r r r r r r/w external access r r r r r r r r r r r r r r r r/w bit description 0 : mie main interrupt enable fag which can be used for easy implementation of cli() and sei() routines. reset value: 0x0001 note: cli() usually must check (save current enable status) and then clear interrupt enable fag atomic (non interruptable). el16 has no such operation, so gie fag cannot be used. gie should only be used for interrupt nesting. when mie is only used inside cli() and sei(), cli() must not save current status, because mie is always enabled on cli() entry. bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w w w w external access w w w w w bit description 4:0 : set addressed enable bit in interrupt mask register to 1 vector number of interrupt to enable trap: when a disabled interrupt 0 or 1 occurred a system reset will be generated bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w w w w external access w w w w w bit description 4:0 : set addressed enable bit in interrupt mask register to 0 vector number of interrupt to disable e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
51/71 the hardware multiplier is a peripheral and is not part of the el16 cpu. this means, its activities do not interfere with the cpu activities. the multiplier registers are peripheral registers that are loaded and read with cpu instruc - tions. ? the hardware multiplier supports: ? unsigned multiply ? signed multiply ? unsigned multiply accumulate ? signed multiply accumulate ? 16 x 16 bits, 16 x 8 bits, 8 x 16 bits, 8 x 8 bits ? cpu is halted until result is valid (1 clock cycle) the hardware multiplier supports unsigned multiply, signed multiply, unsigned multiply accumulate, and signed multiply accumulate operations. the type of operation is selected by the address the frst operand is written to. the hardware multiplier has two 16-bit operand registers, op1 and op2, and three result registers, sumlo, sumhi, and sumext. sumlo stores the low word of the result, sumhi stores the high word of the result, and sumext stores information about the result. 5.13 multiplier module 5.13.1 multiplier module registers register name address description mpy 0x10 mpys 0x12 mac 0x14 macs 0x16 operand 2 0x18 sumlo 0x1a sumhi 0x1c sumext 0x1e register mpy (0x10) table 51: mpy bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : operand 1 unsigned multiply reset value: 0x000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
52/71 register mpys (0x12) register mac (0x14) register macs (0x16) register operand 2 (0x18) table 52: mpys table 53: mac table 54: macs table 55: operand 2 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : operand 1 signed multiply reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : operand 1 unsigned multiply accumulate reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : operand 1 signed multiply accumulate reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 content 15:0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : operand 2 (write access starts multiplication) reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
53/71 register sumlo (0x1a) register sumhi (0x1c) table 56: sumlo table 57: sumhi bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : lower 16 bit of result reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : in case of operation: mpy: upper 16 bit of result mpys: the msb is the sign of the result. the remaining bits are the upper 15-bits of the re - sult. two's complement notation is used for the result. mac: upper 16 bit of result macs: upper 16-bits of the result. two's complement notation is used for the result. reset value: 0x0000 register sumext (0x1e) table 58: sumext bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : in case of operation: mpy: always 0x0000 mpys: contains the extended sign of the result 0x0000 if result was positive 0xffff if result was negative mac: contains the carry of the result 0x0000 no carry result 0x0001 result with carry mpys: contains the extended sign of the result 0x0000 if result was positive 0xffff if result was negative reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
54/71 ? two 32 bit wide decrementing timers ? timer 0 is used as a window-watchdog, so it triggers a system reset instead of an interrupt when timer value = 0 ? window-watchdog timer is disabled after reset and has to be armed by software ? window-watchdog cannot be disabled or changed when armed ? 16 times sci baud rate can be confgured as timer1 clk base ? note: watchdog will be halted during flash erase / program ? note: watchdog and timer will be halted during debug cpu halt ? window-watchdog generates an interrupt when watchdog is reset outside specifed window (see diagram below) 5.14 timer 0 (window-watchdog) and timer 1 t i m e r _ c o u n t e r w a t ch d o g r e se t w i n d o w t i m e r _ v a l u e 2 w i n d o w _ s i z e 0 s y s t e m r e s e t w h e n t i m e r _ co u n t e r r e a ch e s 0 r e s e t t i m e r _ c o u n t e r t o t i m e r _ va l u e w h e n w a t ch d o g t i m e r r e se t i n t e r r u p t w h e n w a t ch d o g t i m e r r e se t ( r e s e t o f t i m e r _ c o u n t e r i s n o t p o s s i b l e ) figure 16: window-watchdog timing 5.14.1 timer 0 and timer 1 module registers register name address description timer value 0x00 timer counter 0x04 timer control 0x08 timer window confg 0x0a timer interrupt clear 0x0c sumlo 0x1a sumhi 0x1c sumext 0x1e e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
55/71 register timer value (0x00)) register timer counter (0x04) table 59: timer value table 60: timer counter m s b l s b content 31 : 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w external access r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w r / w bit description 31:0 : timer start value reset value: 0xffff.ffff m s b l s b content 31 : 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r bit description 31:0 : timer start value reset value: 0xffff.ffff e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
56/71 register timer control (0x08) register timer window confg (0x0a) table 61: timer control table 62: timer window confg bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r r r r r/w r (r) w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r r r r r/w r (r) w r/w bit description 15:8 : password must be written as 0xa5 will always be read as 0x96 3 : clock base selector (timer 1 only) 0 - mclk 1 C mclk/(16*baud rate) synchronize timer to spi clock 2 : timer reset 0 - no infuence 1 - reset to start value 1 : loop 0 - run once and hold afterwards (clears "run enable") 1 - loop 0 : run enable 0 - timer stopped 1 - timer enabled reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r r r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r r r/w r/w r/w r/w r/w r/w bit description 15:8 : timer window confg (only applicable for window-watchdog) password must be written as 0xa5 will always be read as 0x96 5 : window enable 0 - no window (default) 1 - window active 4:0 : window size reset window is defned as: timer value < (2^window size - 1) reset value: 0x001f e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
57/71 register timer interrupt clear (0x0c) table 63: timer interrupt clear bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w external access w w bit description 1 : timer irq clear 0 - no infuence 1 - clear interrupt 0 : window irq clear 0 - no infuence 1 - clear interrupt ? can be used as master or slave ? the spi interface consists of the following 4 signals: ? sck: spi clock (driven by master) ? csb: low active chip select (driven by master) ? miso: master in, slave out (data from slave to master) ? mosi: master out, slave in (data from master to slave) ? confgurable phase, polarity and bit order ? byte and multi-byte transfer support ? slave mode spi clock monitoring (timeout) ? 4 data word transmit and receive fifos note: data will not be send as long as spi interface is not routed to io ports 5.15 spi module 2 n d b i t m o s i c s b l a s t b i t 1 s t b i t m i s o t c s 1 t c s 2 t c s h t s e t u p t z 2 t h o l d t z 1 z 2 n d b i t l a s t b i t z s c k s a m p l e e d g e s c k s h i f t e d g e t c k t c k t c k t c k t s o 1 s t b i t figure 17: spi bus timing diagram e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
58/71 l a s t b i t s a m p l e d a t a s s c p h 0 1 0 1 s c k 1 s t e d g e : s h i f t 2 n d e d g e : s a m p l e s s c p o 0 0 1 1 o l e v e l : 0 o l e v e l : 1 o l e v e l : 1 o l e v e l : 0 r s t b i t a p p l y d a t a m o s i / m i s o m o s i / m i s o a p p l y d a t a a p p l y d a t a s a m p l e d a t a s a m p l e d a t a a p p l y d a t a a p p l y d a t a s a m p l e d a t a s c k 1 s t e d g e : s a m p l e 2 n d e d g e : s h i f t s c k 1 s t e d g e : s h i f t 2 n d e d g e : s a m p l e s c k 1 s t e d g e : s a m p l e 2 n d e d g e : s h i f t c s b figure 18: spi mode diagram 5.15.1 spi module registers register name address description transmit data / receive data 0x00 control 0x02 baud confg 0x04 timeout confg 0x06 module reset 0x08 status 0x0a error 0x0c interrupt clear 0x0e e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
59/71 register transmit data / receive data (0x00) register control (0x02) table 64: transmit data / receive data table 65: control bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r (r) w r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r (r) w r/w r/w r/w r/w r/w r/w r/w r/w bit description 8 : csb control (only for data transition and in master mode) 0 - byte mode 1 - keep csb active after related byte was transmitted 7:0 : transmit data / receive data reset value: 0x0000 the 'send low water' interrupt will be cleared by writing a byte to the transmit data register (fifo). the 'receive high water' interrupt will be cleared by reading a byte from the receive data reg - ister (fifo). (see list of all interrupts) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 1 internal access r/w r/w r/w r/w r r/w r/w r/w r r r r r/w r/w r/w r/w external access r/w r/w r/w r/w r r/w r/w r/w r r r r r/w r/w r/w r/w bit description 14:12 : high water receive fifo level interrupt will be asserted when receive fifo fll level increases to this value default value: 2 10:8 : low water transmit fifo level interrupt will be asserted when transmit fifo fll level decreases to this value default value: 0 3 : slave 0 - master 1 - slave 2 : polarity: sscpo, see spi mode diagram 0 - clock off level 0 1 - clock off level 1 1 : phase: sscph, see spi mode diagram 0 - 1st edge shift, 2nd edge sample 1 - 1st edge sample, 2nd edge shift 0 : order 0 - lsb frst 1 - msb frst e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
60/71 register baud confg (0x04) register timeout confg (0x06)) register status (0x0a) table 66: baud confg table 67: timeout confg table 68: status bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : baud divider = (system clock frequency) / (2 * baud rate) note: minimal value for baud divider is 4 reset value: 0x0004 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : baud divider = (system clock frequency) / (2 * baud rate) note: minimal value for baud divider is 4 reset value: 0x0004 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:0 : timeout value maximum allowed count of system clock cycles between 2 spi clock edges reset value: 0xffff e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
61/71 register error (0x0c)) register interrupt clear (0x0e) table 69: error table 70: interrupt clear bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 1 : transmit fifo was empty (only in slave mode) will be cleared on read 0 : receive fifo was full (received data will be lost) will be cleared on read bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w external access w w bit description 1 : clear error irq 0 : clear timeout irq ? full duplex operation ? 8n1 data format, standard mark/space nrz format ? extended baud rate selection options ? interrupt-driven operation with four fags: receiver full, transmitter empty, measurement fnished, break character received special lin support: ? 13 bit break generation ? 11 bit break detection threshold ? a fractional-divide baud rate prescaler that allows fne adjustment of the baud rate ? measurement counter which has 16 bits and can be used as a mini-timer to measure break and bit times (baud rate recovery). ? baud measurement results can directly be fed into the baud register to adjust the baud rate (baud self-synchronization with sync byte) 5.16 lin-sci module e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
62/71 figure 19: sci block diagram 5.16.1 lin-sci module registers register name address description sci baud rate 0x00 sci control 0x02 sci status 0x04 sci data (in/out) 0x06 sci measurement control 0x08 sci measurement counter 0x0a e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
63/71 register sci baud rate (0x00) table 71: sci baud rate bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w external access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit description 15:5 : bd - sci baud divisor select divisor: 0x000 --> 1 (bypass divider) 0x001 --> 2 0x002 --> 3 ... 0x007 --> 8 ... 4:0 : bdfa - sci baud divisor fne adjust these bits select the number of clocks inserted in each 32 output cycle frame to achieve more timing resolution on the average baud frequency shown in the following table. bdfa[00000] = 0/32 = 0 bdfa[00001] = 1/32 = 0.03125 bdfa[00010] = 2/32 = 0.0625 ... bdfa[10000] = 16/32 = 0.5 ... bdfa[11111] = 31/32 = 0.96875 reset value: 0x0000 the divider can be used to achieve divisor values between 1 and 2047.96875. the baud divi - sor fne adjust can be used to fne tune the baud rate in 1/32 steps of the divisor. use the following formula to calculate the sci baud rate: baud rate = clksys/(16*(bd+bdfa)) note: the 16 bit baud divisor value represents the number of system clock cycles of two bit lengths. the result of a baud measurement(see measurement counter below) can directly be written to the baud rate register. e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
64/71 register sci control (0x02) table 72: sci control bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7 : tie - txd interrupt enable (generates interrupt when tdre is set) 6 : lin - lin mode: lin break transmit enable (13 bit break symbol instead of 10 bit), lin break receive detection enable (detects a 11 bit break symbol instead of 10 bit) 5 : rie - rxd interrupt enable (generates interrupt when rdrf is set) 4 : bie - break detection interrupt enable (generates interrupt when brf is set) 3 : te - transmitter enable if software clears te while a transmission is in progress (tc = 0), the frame in the transmit shift register continues to shift out. to avoid accidentally cutting off the last frame in a mes - sage, always wait for tdre to go high after the last frame before clearing te 2 : re - receiver enable re set to '0' suppresses start bit recognition, setting re to '1' during an ongoing transfer can cause erroneous data reception and interrupt generation (rdrf) setting re to '0' during an ongoing transfer can cause erroneous data reception and interrupt generation (rdrf), received data should be ignored 1 : mfie - measurement fnish interrupt enable (generates interrupt when mf is set) 0 : sbk - send break bit toggling sbk sends one break character (10 logic 0s, respectively 13 logic 0s if lint is set). toggling implies clearing the sbk bit before the break character has fnished transmitting. as long as sbk is set, the transmitter continues to send complete break characters (10 bits re - spectively 13 bit). reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
65/71 register sci status (0x04) table 73: sci status bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 9 : auto_baud_triggered set when new baud value was copied automatically to baud confg register after a valid snyc byte measurement (see also measurement control register -> auto_baud) cleared when reading the msb of the status word 8 : auto_meas_triggered set when measurement was started automatically after reception of a valid break (see also measurement control register -> auto_meas) cleared when reading the msb of the status word 7 : tdre - transmit data register empty clear tdre by writing to sci data reg. write will be ignored when transmit register is not empty -> check if tdre = 1 before writing to transmit register 6 : tc - transmit complete fag tc is reset to '0' when a transmission is in progress 5 : rdrf - receive data register full fag clear rdrf by reading sci status with rdrf set and then reading sci data reg note: rdrf will be set: a) in case of data reception: 1/8 nominal bit length after the recognized stop bit, e.g. since the bits are sampled in the middle of a nominal bit length the fags and with it the irq will be set after the estimated end of the active stop bit. b) in case of break reception: see brf description below 4 : brf - break received fag (lin-mode dependent) clear brf by reading sci status with brf set and then reading sci data reg. the br fag will be set when the start bit is followed by 8 (respectively 9 when lin mode is set) logic 0 data bits and a logic 0 where the stop bit should be. when brf is set also fe and rdrf will be set, the sci data register will be cleared note: fag generation (incl brf) will be suppressed when auto_meas is set 3 : ov - receiver overrun detected clear ov by reading sci status with ov set and then reading sci data reg. ov will be set when a received data byte is not read before the data byte of the next frame or a break character arrives. the second data byte will be disallowed 2 : mrun - measurement running 1 : mf - measurement fnish fag clear mf by read accessing the measurement counter 0 : fe - framing error fag fe is set when the logic does not detect a logic 1 where the stop bit should be. fe will be set and reset together with rdrf reset value: 0x0000 register sci data (in/out) (0x06) table 74: sci data (in/out) bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7:0 : sci data register, write for transmitting byte, read received byte reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
66/71 register sci measurement control (0x08) register sci measurement counter (0x0a) table 75: sci measurement control table 76: sci measurement counter bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 internal access r r r/w r/w r/w r/w r/w r/w r r r r r/w r/w r/w r/w external access r r r/w r/w r/w r/w r/w r/w r r r r r/w r/w r/w r/w bit description 13:8 : dbc[6:1] - denounce flter threshold for baud rate measurement (mmode=0) dbc[0] is always set to logic 1. dbc[6:0] form the upper threshold value for the denouncing flter. denounce flter is reset to 81 which results in minimum flter delay of 81x62,5ns=5,1us@16mhz 3 : auto_baud automatically copy baud measurement result to baud confg register after a valid baud measurement (expecting sync byte) --> auto_baud_triggered will be set note: during baud measurement the receiver is disabled an therefore no data will be re - ceived, only the measurement logic is active which will generate a measurement fnish fag (confgurable as interrupt) 2 : auto_meas automatically start a baud rate measurement after reception of a valid break --> auto_meas_triggered will be set note: auto_meas mode suppresses the fag specifc fag generation (see sci_status -> brf) 1 : mmode measurement mode select 0 -> baud rate measurement, counter runs with system clock and measures time between 4 falling edges (8 bit length are measured), bouncer is enabled note: baud measurement expects a 0x55 data byte to measure, this is the sync byte in the lin protocol 1 -> break time measurement, counter runs with 16 x baud rate, measures time when rxd line is zero note: only applicable together with men control bit 0 : men - measurement enable set to '1' to start a measurement when measurement is fnished, men bit will be cleared automatically note: when auto_meas bit is set men must not be used note: writing a '0' to men resets the measurement logic and allows a clean restart reset value: 0x2800 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 15:0 : measurement counter counter is cleared by every start of a new measurement when the measurement counter overfows the counter value is saturated to 0xffff and the measurement will be stopped (mf fag set). the measurement should be repeated with an adapted baud rate setting. note: in baud measurement mode the result of the baud measurement (8 bit length) is di - vided by 4 and rounded (resulting 2 bit length value) the resulting 16 bit can be fed into the baud divider register to adjust the baud rate. reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
67/71 ? up to 8 gpios (see io port multiplexer table) ? interrupt capable (confgurable for positive and / or negative signal edge interrupt) 5.17 gpio module sync & irq logic input data output data direction figure 20: principle io cell structure 5.17.1 gpio module registers register name address description output data 0x00 direction 0x02 input data 0x04 posedge interrupt enable 0x06 posedge interrupt status 0x08 posedge interrupt clear 0x0a negedge interrupt enable 0x0c negedge interrupt status 0x0e negedge interrupt clear 0x10 port confg 0x12 register output data (0x00) table 77: output data bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7:0 : output data reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
68/71 register direction (0x02) register input data (0x04) register posedge interrupt enable (0x06) register posedge interrupt clear (0x0a) table 78: direction table 79: input data table 80: posedge interrupt enable table 81: posedge interrupt clear bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7:0 : direction 0 - output, pull down disabled 1 - input, pull down enabled reset value: 0x00ff bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 7:0 : input data reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7:0 : enable 0 - disabled 1 - a positive edge on related "input data" bit will set interrupt bit reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w w w w w w w external access w w w w w w w w bit description 7:0 : clear 0 - no infuence 1 - clears related interrupt bit e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
69/71 register negedge interrupt enable (0x0c) register negedge interrupt status (0x0e) register negedge interrupt clear (0x10) table 82: negedge interrupt enable table 83: negedge interrupt status table 84: negedge interrupt clear bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w external access r r r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w bit description 7:0 : enable 0 - disabled 1 - a negative edge on related "input data" bit will set interrupt bit reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r r external access r r r r r r r r r r r r r r r r bit description 7:0 : status 0 - no interrupt 1 - interrupt was asserted reset value: 0x0000 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value internal access w w w w w w w w external access w w w w w w w w bit description 7:0 : clear 0 - no infuence 1 - clears related interrupt bit register port confg (0x12) table 85: port confg bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 reset value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 internal access r r r r r r r r r r r r r r r/w r/w external access r r r r r r r r r r r r r r r/w r/w bit description 1:0 : io port confg for details see io port multiplexer reset value: 0x0000 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
70/71 5.17.2 io port multiplexer 6.1 emc 6.3 latch up test 6.2 esd 6 robustness io port jtag debug tmode=1 normal mode cfg[1:0]=00 normal mode cfg[1:0]=01 normal mode cfg[1:0]=10 normal mode cfg[1:0]=11 tmode 1 0 0 0 0 io0 gpio00 gpio00 gpio00 gpio00 gpio00 io1 gpio01 gpio01 gpio01 gpio01 gpio01 io2 gpio02 gpio02 txd gpio02 txd io3 gpio03 gpio03 rxd gpio03 rxd io4 tdo gpio04 gpio04 sck sck io5 tdi gpio05 gpio05 miso miso io6 tms gpio06 gpio06 mosi mosi io7 tck gpio07 gpio07 csb csb the contents of this chapter were not specifed yet! test method : 100 ma positive and negative pulses at 85 c according to aec-q100-004. the esd protection circuitry is measured according to aec-q100-002 with the following conditions: test method (hbm): vin = 2000 v (according to device class h1c) rext = 1500 ohm cext = 100 pf test method (cdm): vin = 500 v for all pins vin = 750 v for corner pins e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 elmos semiconductor ag reserves the right to change the detail specifcations as may be required to permit improvements in the design of its products. halios ? multi purpose sensor for automotive
71/71 e909.06 elmos semiconductor ag data sheet qm-no.: 25ds0049e.02 production data - nov 16, 2011 warning C life support applications policy elmos semiconductor ag is continually working to improve the quality and reliability of its products. neverthe - less, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vul - nerability to physical stress. it is the responsibility of the buyer, when utilizing elmos semiconductor ag products, to observe standards of safety, and to avoid situations in which malfunction or failure of an elmos semiconduc - tor ag product could cause loss of human life, body injury or damage to property. in development your designs, please ensure that elmos semiconductor ag products are used within specifed operating ranges as set forth in the most recent product specifcations. general disclaimer information furnished by elmos semiconductor ag is believed to be accurate and reliable. however, no responsi - bility is assumed by elmos semiconductor ag for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of elmos semiconductor ag. elmos semiconductor ag reserves the right to make changes to this document or the products contained therein without prior notice, to improve performance, reliability, or manu - facturability. application disclaimer circuit diagrams may contain components not manufactured by elmos semiconductor ag, which are included as means of illustrating typical applications. consequently, complete information suffcient for construction purpos - es is not necessarily given. the information in the application examples has been carefully checked and is believed to be entirely reliable. however, no responsibility is assumed for inaccuracies. furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent rights of elmos semiconductor ag or others. contact information headquarters elmos semiconductor ag heinrich-hertz-str. 1 ? d-44227 dortmund (germany) phone: +492317549100 e-mail: sales@elmos.de internet: www.elmos.com regional sales and application support offce munich elmos semiconductor ag am gefgelhof 12 ? 85716 unterschlei?heim/eching phone: +49893183700 sales offce france elmos france sas 9/11 alle de l'arche ? la dfense ? 92671 courbevoie cedex (france) phone: +33149971591 sales and application support offce north america elmos na. inc. 32255 northwestern highway, suite 45 ? farmington hills, mi 48334 phone: +12488653200 sales and application support offce korea and japan elmos korea dongbu root building, 16-2, suite 509, ? sunae-dong, bundang-gu, seongnam-shi, kyonggi-do (korea) phone: +82317141131 sales and application support offce china elmos semiconductor technology (shanghai) co., ltd. 57-01e, lampl business centre, 57f, the exchange ? 1486 nanjing w rd. (299 tongren rd) ? jingan shanghai ? p.r.china 200040 phone: +862161717358 sales and application support offce singapore elmos semiconductor singapore pte ltd. 60 alexandra terrace ? #09-31 the comtech ? singapore 118502 phone: +6566351141 ? elmos semiconductor ag, 2011. reproduction, in part or whole, without the prior written consent of elmos semiconductor ag, is prohibited. halios ? multi purpose sensor for automotive

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