PJQMF05LC preliminary 5-tvs/zener array for esd and latch-up protection specification features applications maximum ratings (per device) rating symbol value units this 5-tvs/zener array has been designed to protect sensitive equipment against esd and to prevent latch-up events in cmos circuitry operating at 5vdc and below. this tvs array offers an integrated solution to protect up to 5 data lines where the board space is a premium. 100w power dissipation (8x20sec waveform) low leakage current, maximum of 2a @ 5vdc iec61000-4-2 esd 20kv air, 15kv contact compliance very low clamping voltage, max of 10v @ 9apk 8x20sec personal digital assistant (pda) sim card port protection (mobile phone) portable instrumentation mobile phones and accessories electrical characteristics (per device) tj = 25c parameter symbol min unit s conditions typical max reverse stand-off voltage reverse breakdown voltage reverse leakage current clamping voltage (8x20sec) clamping voltage (8x20sec) off state junction capacitance off state junction capacitance v wrm v br i r cl v v cl cj cj br i = r v = i = pp i = pp 0 vdc bias f = 1mhz between i/o pins and pin 2 5 vdc bias f = 1mhz between i/o pins and pin 2 5v 6 7.2 v a 2.0 9v 10 v 90 pf pf 45 1 ma 5v 5a 9a 100 10 >25 -55 to +125 -55 to + 150 w a kv c c peak pulse power (8x20sec waveform) peak pulse current (8x20sec waveform) esd voltage (hbm) operating temperature range storage temperature range p pp i pp v esd t j t stg 1/26/2004 page 1 www.panjit.com new smt package qfn 1.6mm x 1.6mm; max height of 0.75mm max off state capacitance of 90pf @ 0vdc 1 mhz same footprint compared to the sot563 memory card port protection qfn 2x2 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 23 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 23 4 5 6 1 23 4 5 6 qfn 1.6x1.6 sq mm package
preliminary PJQMF05LC 1/26/2004 page 2 www.panjit.com typical characteristics capacitance vs. biasing voltage @1mhz 30 40 50 60 70 80 90 100 012345 bias voltage, vdc capacitance, pf clamping voltage vs ipp 8x20sec surge 0 1 2 3 4 5 6 7 8 9 10 67891011 clamping voltage, v ipp, amps non-repetitive peak pulse power vs pulse time 10 100 1000 1 10 100 1000 pulse duration, sec peak pulse power - ppp (w) pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 time, sec percent of ipp 50% of ipp @ 20s rise time 10-90% - 8s 25c unless otherwise noted
preliminary PJQMF05LC 1/26/2004 page 3 www.panjit.com typical application example i/o data lines 1 2 3 4 5 ground (pin 2)
PJQMF05LC package dimensions and suggested bond pad layout 1/26/2004 page 4 www.panjit.com 0.50 0.05 mm 0.20 0.05 mm 0.20 0.05 mm 1.1 0.05 mm 0.6 0.05 mm 1.60 0.05 mm 1.60 0.05 mm 0.75 0.05 mm 0.203 0.05 mm top view bottom view side view 0.55 mm 0.90 0.05 mm 1.0 0.05 mm 0.40 0.05 mm 0.25 0.05 mm 0.50 0.05 mm 1.00 0.05 mm 0.40 0.05 mm 0.25 0.05 mm 0.50 0.05 mm preferred alternate
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