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tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information 1 november 1997 - revised october 2000 copyright ? 2000, power innovations limited, uk information is current as of publication date. products conform to specifications in accordance with the terms of power innovations standard warranty. production processing does not necessarily include testing of all parameters. telecommunication system 100 a 10/1000 overvoltage protectors a bourns company 8 kv 10/700, 200 a 5/310 itu-t k.20/21 rating ion-implanted breakdown region precise and stable voltage low voltage overshoot under surge low differential capacitance . . . 67 pf max. ................. ul recognized component device v drm v v (bo) v ?4070 58 70 ?4080 65 80 ?4095 75 95 ?4115 90 115 ?4125 100 125 ?4145 120 145 ?4165 135 165 ?4180 145 180 ?4200 155 200 ?4220 160 220 ?4240 180 240 ?4250 190 250 ?4265 200 265 ?4290 220 290 ?4300 230 300 ?4350 275 350 ?4395 320 395 ?4400 300 400 rated for international surge wave shapes wave shape standard i tsp a 2/10 s gr-1089-core 500 8/20 s iec 61000-4-5 300 10/160 s fcc part 68 250 10/700 s itu-t k.20/21 200 10/560 s fcc part 68 160 10/1000 s gr-1089-core 100 description these devices are designed to limit overvoltages on the telephone line. overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. a single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication equipment (e.g. between the ring and tip wires for telephones and modems). combinations of devices can be used for multi-point protection (e.g. 3-point protection between ring, tip and ground). the protector consists of a symmetrical voltage-triggered bidirectional thyristor. overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. this low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. the high crowbar holding current prevents d.c. latchup as the diverted current subsides. how to order device package carrier order as tisp4xxxh3bj bj (j-bend do-214aa/smb) embossed tape reeled tisp4xxxh3bjr insert xxx value corresponding to protection voltages of 070, 080, 095, 115 etcetera. device symbol t r sd4xaa terminals t and r correspond to the alternative line designators of a and b 12 t(a) r(b) smbj package (top view) mdxxbg
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 2 november 1997 - revised october 2000 product information this tisp4xxxh3bj range consists of eighteen voltage variants to meet various maximum system voltage levels (58 v to 320 v). they are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. these high (h) current protection devices are in a plastic package smbj (jedec do-214aa with j-bend leads) and supplied in embossed carrier reel pack. for alternative voltage and holding current values, consult the factory. for lower rated impulse currents in the smb package, the 50 a 10/1000 tisp4xxxm3bj series is available. absolute maximum ratings, t a = 25 c (unless otherwise noted) rating symbol value unit repetitive peak off-state voltage, (see note 1) ?4070 ?4080 ?4095 ?4115 ?4125 ?4145 ?4165 ?4180 ?4200 ?4220 ?4240 ?4250 ?4265 ?4290 ?4300 ?4350 ?4395 ?4400 v drm 58 65 75 90 100 120 135 145 155 160 180 190 200 220 230 275 320 300 v non-repetitive peak on-state pulse current (see notes 2, 3 and 4) i tsp a 2/10 s (gr-1089-core, 2/10 s voltage wave shape) 500 8/20 s (iec 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator) 300 10/160 s (fcc part 68, 10/160 s voltage wave shape) 250 5/200 s (vde 0433, 10/700 s voltage wave shape) 220 0.2/310 s (i3124, 0.5/700 s voltage wave shape) 200 5/310 s (itu-t k.20/21, 10/700 s voltage wave shape) 200 5/310 s (ftz r12, 10/700 s voltage wave shape) 200 10/560 s (fcc part 68, 10/560 s voltage wave shape) 160 10/1000 s (gr-1089-core, 10/1000 s voltage wave shape) 100 non-repetitive peak on-state current (see notes 2, 3 and 5) i tsm 55 60 2.1 a 20 ms (50 hz) full sine wave 16.7 ms (60 hz) full sine wave 1000 s 50 hz/60 hz a.c. initial rate of rise of on-state current, exponential current ramp, maximum ramp value < 200 a di t /dt 400 a/s junction temperature t j -40 to +150 c storage temperature range t stg -65 to +150 c notes: 1. see applications information and figure 10 for voltage values at lower temperatures. 2. initially the tisp4xxxh3bj must be in thermal equilibrium with t j =25c. 3. the surge may be repeated after the tisp4xxxh3bj returns to its initial conditions. 4. see applications information and figure 11 for current ratings at other temperatures. 5. eia/jesd51-2 environment and eia/jesd51-3 pcb with standard footprint dimensions connected with 5 a rated printed wiring track widths. see figure 8 for the current ratings at other durations. derate current values at -0.61 %/c for ambient temperatu res above 25 c
3 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information electrical characteristics, t a = 25 c (unless otherwise noted) parameter test conditions min typ max unit i drm repetitive peak off- state current v d = v drm t a = 25 c t a = 85 c 5 10 a v (bo) breakover voltage dv/dt = 250 v/ms, r source = 300 ? ?4070 ?4080 ?4095 ?4115 ?4125 ?4145 ?4165 ?4180 ?4200 ?4220 ?4240 ?4250 ?4265 ?4290 ?4300 ?4350 ?4395 ?4400 70 80 95 115 125 145 165 180 200 220 240 250 265 290 300 350 395 400 v v (bo) impulse breakover voltage dv/dt 1000 v/s, linear voltage ramp, maximum ramp value = 500 v di/dt = 20 a/s, linear current ramp, maximum ramp value = 10 a ?4070 ?4080 ?4095 ?4115 ?4125 ?4145 ?4165 ?4180 ?4200 ?4220 ?4240 ?4250 ?4265 ?4290 ?4300 ?4350 ?4395 ?4400 78 88 103 124 134 154 174 189 210 230 250 261 276 301 311 362 408 413 v i (bo) breakover current dv/dt = 250 v/ms, r source = 300 ? 0.15 0.6 a v t on-state voltage i t =5a, t w = 100 s 3 v i h holding current i t = 5 a, di/dt = +/-30 ma/ms 0.15 0.6 a dv/dt critical rate of rise of off-state voltage linear voltage ramp, maximum ramp value < 0.85v drm 5 kv/s i d off-state current v d =50v t a = 85 c 10 a
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 4 november 1997 - revised october 2000 product information c off off-state capacitance f = 100 khz, v d =1v rms, v d =0, f = 100 khz, v d =1v rms, v d =-1v f = 100 khz, v d =1v rms, v d =-2v f = 100 khz, v d =1v rms, v d =-50v f = 100 khz, v d =1v rms, v d = -100 v (see note 6) ?4070 thru ?4115 ?4125 thru ?4220 ?4240 thru ?4400 ?4070 thru ?4115 ?4125 thru ?4220 ?4240 thru ?4400 ?4070 thru ?4115 ?4125 thru ?4220 ?4240 thru ?4400 ?4070 thru ?4115 ?4125 thru ?4220 ?4240 thru ?4400 ?4125 thru ?4220 ?4240 thru ?4400 145 80 70 130 71 60 120 65 55 62 30 24 28 22 170 90 84 150 79 67 140 74 62 73 35 28 33 26 pf note 6: to avoid possible voltage clipping, the ?4125 is tested with v d =-98v. thermal characteristics parameter test conditions min typ max unit r ja junction to free air thermal resistance eia/jesd51-3 pcb, i t = i tsm(1000) , t a = 25 c, (see note 7) 113 c/w 265 mm x 210 mm populated line card, 4-layer pcb, i t = i tsm(1000) , t a = 25 c 50 note 7: eia/jesd51-2 environment and pcb has standard footprint dimensions connected with 5 a rated printed wiring track widths. electrical characteristics, t a = 25 c (unless otherwise noted) (continued) parameter test conditions min typ max unit
5 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information parameter measurement information figure 1. voltage-current characteristic for t and r terminals all measurements are referenced to the r terminal -v v drm i drm v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i switching characteristic +v +i v (bo) i (bo) v d i d i h i t v t i tsm i tsp -i quadrant iii switching characteristic pmxxaab v drm i drm
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 6 november 1997 - revised october 2000 product information typical characteristics figure 2. figure 3. figure 4. figure 5. off-state current vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 |i d | - off-state current - a 0001 001 01 1 10 100 tchag v d = 50 v normalised breakover voltage vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 normalised breakover voltage 0.95 1.00 1.05 1.10 tc4haf on-state current vs on-state voltage v t - on-state voltage - v 0.7 1.5 2 3 4 5 7 110 i t - on-state current - a 1.5 2 3 4 5 7 15 20 30 40 50 70 150 200 1 10 100 t a = 25 c t w = 100 s tc4hacb '4240 thru '4400 '4070 thru '4115 '4125 thru '4220 normalised holding current vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 normalised holding current 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 1.0 tc4had
7 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information typical characteristics figure 6. figure 7. normalised capacitance vs off-state voltage v d - off-state voltage - v 0.5 1 2 3 5 10 20 30 50 100150 capacitance normalised to v d = 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 t j = 25c v d = 1 vrms tc4habb '4125 t hru ' 4220 '4240 t hru ' 4400 '4070 t hru ' 4115 differential off-state capacitance vs rated repetitive peak off-state voltage v drm - repetitive peak off-state voltage - v 50 60 70 80 90 150 200 250 300 100 ? ? ? ? c - differential off-state capacitance - pf 30 35 40 45 50 55 60 65 70 75 ? ? ? ? c = c off(-2 v) - c off(-50 v) '4070 '4080 '4095 '4125 '4145 '4165 '4180 '4265 '4300 '4350 '4400 '4200 '4240 '4115 '4220 '4250 '4290 '4395 tchaeb
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 8 november 1997 - revised october 2000 product information rating and thermal information figure 8. figure 9. figure 10. figure 11. non-repetitive peak on-state current vs current duration t - current duration - s 01 1 10 100 1000 i tsm(t) - non-repetitive peak on-state current - a 1.5 2 3 4 5 6 7 8 9 15 20 30 10 ti4hac v gen = 600 vrms, 50/60 hz r gen = 1.4*v gen /i tsm(t) eia/jesd51-2 environment eia/jesd51-3 pcb t a = 25 c thermal impedance vs power duration t - power duration - s 01 1 10 100 1000 z ja(t) - transient thermal impedance - c/w 1.5 2 3 4 5 7 15 20 30 40 50 70 150 1 10 100 ti4hae i tsm(t) applied for time t eia/jesd51-2 environment eia/jesd51-3 pcb t a = 25 c v drm derating factor vs minimum ambient temperature t amin - minimum ambient temperature - c -35 -25 -15 -5 5 15 25 -40 -30 -20 -10 0 10 20 derating factor 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 ti4hadb '4240 t hru ' 4440 '4070 t hru ' 4115 '4125 t hru ' 4220 impulse rating vs ambient temperature t a - ambient temperature - c -40-30-20-10 0 1020304050607080 impulse current - a 90 100 120 150 200 250 300 400 500 600 700 iec 1.2/50, 8/20 itu-t 10/700 fcc 10/560 bellcore 2/10 bellcore 10/1000 fcc 10/160 tc4haa
9 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information applications information deployment these devices are two terminal overvoltage protectors. they may be used either singly to limit the voltage between two conductors (figure 12) or in multiples to limit the voltage at several points in a circuit (figure 13). in figure 12, protector th1 limits the maximum voltage between the two conductors to v (bo) . this configuration is normally used to protect circuits without a ground reference, such as modems. in figure 13, protectors th2 and th3 limit the maximum voltage between each conductor and ground to the v (bo) of the individual protector. protector th1 limits the maximum voltage between the two conductors to its v (bo) value. if the equipment being protected has all its vulnerable components connected between the conductors and ground, then protector th1 is not required. impulse testing to verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms. the table below shows some common values. if the impulse generator current exceeds the protectors current rating then a series resistance can be used to reduce the current to the protectors rated value and so prevent possible failure. the required value of series resistance for a given waveform is given by the following calculations. first, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the protectors rated current. the impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then subtracted from the minimum total circuit impedance to give the required value of series resistance. in some cases the equipment will require verification over a temperature range. by using the rated waveform values from figure 11, the appropriate series resistor value can be calculated for ambient temperatures in the range of -40 c to 85 c. figure 12. two point protection figure 13. multi-point protection standard peak voltage setting v voltage wave form s peak current value a current wave form s tisp4xxxh3 25 c rating a series resistance ? gr-1089-core 2500 2/10 500 2/10 500 0 1000 10/1000 100 10/1000 100 fcc part 68 (march 1998) 1500 10/160 200 10/160 250 0 800 10/560 100 10/560 160 0 1500 9/720 ? 37.5 5/320 ? 200 0 1000 9/720 ? 25 5/320 ? 200 0 i3124 1500 0.5/700 37.5 0.2/310 200 0 itu-t k.20/k.21 1500 4000 10/700 37.5 100 5/310 200 0 ? fcc part 68 terminology for the waveforms produced by the itu-t recommendation k.21 10/700 impulse generator th1 th3 th2 th1
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 10 november 1997 - revised october 2000 product information a.c. power testing the protector can withstand currents applied for times not exceeding those shown in figure 8. currents that exceed these times must be terminated or reduced to avoid protector failure. fuses, ptc (positive temperature coefficient) resistors and fusible resistors are overcurrent protection devices which can be used to reduce the current flow. protective fuses may range from a few hundred milliamperes to one ampere. in some cases it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. the current versus time characteristic of the overcurrent protector must be below the line shown in figure 8. in some cases there may be a further time limit imposed by the test standard (e.g. ul 1459 wiring simulator failure). capacitance the protector characteristic off-state capacitance values are given for d.c. bias voltage, v d , values of 0, -1 v, -2 v and -50 v. where possible values are also given for -100 v. values for other voltages may be calculated by multiplying the v d = 0 capacitance value by the factor given in figure 6. up to 10 mhz the capacitance is essentially independent of frequency. above 10 mhz the effective capacitance is strongly dependent on connection inductance. in many applications, such as figure 15 and figure 17, the typical conductor bias voltages will be about -2 v and -50 v. figure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 v and the other at -50 v. normal system voltage levels the protector should not clip or limit the voltages that occur in normal system operation. for unusual conditions, such as ringing without the line connected, some degree of clipping is permissible. under this condition about 10 v of clipping is normally possible without activating the ring trip circuit. figure 10 allows the calculation of the protector v drm value at temperatures below 25 c. the calculated value should not be less than the maximum normal system voltages. the tisp4265h3bj, with a v drm of 200 v, can be used for the protection of ring generators producing 100 v r.m.s. of ring on a battery voltage of -58 v (th2 and th3 in figure 17). the peak ring voltage will be 58 + 1.414*100 = 199.4 v. however, this is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. in the extreme case of an unconnected line, clipping the peak voltage to 190 v should not activate the ring trip. this level of clipping would occur at the temperature when the v drm has reduced to 190/200 = 0.95 of its 25 c value. figure 10 shows that this condition will occur at an ambient temperature of -22 c. in this example, the tisp4265h3bj will allow normal equipment operation provided that the minimum expected ambient temperature does not fall below -22 c. jesd51 thermal measurement method to standardise thermal measurements, the eia (electronic industries alliance) has created the jesd51 standard. part 2 of the standard (jesd51-2, 1995) describes the test environment. this is a 0.0283 m 3 (1 ft 3 ) cube which contains the test pcb (printed circuit board) horizontally mounted at the centre. part 3 of the standard (jesd51-3, 1996) defines two test pcbs for surface mount components; one for packages smaller than 27 mm on a side and the other for packages up to 48 mm. the smbj measurements used the smaller 76.2 mm x 114.3 mm (3.0 ? x 4.5 ?) pcb. the jesd51-3 pcbs are designed to have low effective thermal conductivity (high thermal resistance) and represent a worse case condition. the pcbs used in the majority of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than indicated by the jesd51 values.
11 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information typical circuits figure 14. modem inter-wire protection figure 15. protection module figure 16. isdn protection figure 17. line card ring/test protection fuse tisp4350 ai6xbma ring detector hook switch d.c. sink signal modem ring tip r1a r1b ring wire tip wire th3 th2 th1 protected equipment e.g. line card ai6xbk r1a r1b th3 th2 th1 ai6xbl signal d.c. test relay ring relay slic relay test equip- ment ring generator s1a s1b r1a r1b ring wire tip wire th3 th2 th1 th4 th5 slic slic protection ring/test protection over- current protection s2a s2b s3a s3b v bat c1 220 nf ai6xbj tisp6xxxx, tisppblx, ?tisp6ntp2
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 12 november 1997 - revised october 2000 product information mechanical data recommended printed wiring footprint. device symbolization code devices will be coded as below. as the device parameters are symmetrical, terminal 1 is not identified. carrier information devices are shipped in one of the carriers below. unless a specific method of shipment is specified by the customer, devices will be shipped in the most practical carrier. for production quantities the carrier will be embossed tape reel pack. evaluation quantities may be shipped in bulk pack or embossed tape. device symoblization code tisp4070h3bj 4070h3 tisp4080h3bj 4080h3 tisp4095h3bj 4095h3 tisp4115h3bj 4115h3 tisp4125h3bj 4125h3 tisp4145h3bj 4145h3 tisp4165h3bj 4165h3 tisp4180h3bj 4180h3 tisp4200h3bj 4200h3 tisp4220h3bj 4220h3 tisp4240h3bj 4240h3 tisp4250h3bj 4250h3 tisp4265h3bj 4265h3 tisp4290h3bj 4290h3 tisp4300h3bj 4300h3 tisp4350h3bj 4350h3 tisp4395h3bj 4395h3 tisp4400h3bj 4400h3 carrier order # embossed tape reel pack tisp4xxxh3bjr bulk pack tisp4xxxh3bj smb pad size all linear dimensions in millimeters 2.40 2.16 2.54 mdxxbi
13 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information mechanical data smbj (do-214aa) plastic surface mount diode package this surface mount package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. smb all linear dimensions in millimeters mdxxbha 5,59 5,21 2,40 2,00 2,10 1,90 1,52 0,76 4,57 4,06 3,94 3,30 2 index mark (if needed) 2,32 1,96 0,20 0,10
tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors 14 november 1997 - revised october 2000 product information mechanical data tape dimensions smb package single-sprocket tape all linear dimensions in millimeters direction of feed 0,40 max. 4,5 max. 0 min. 12,30 11,70 1,65 1,55 4,10 3,90 2,05 1,95 ? 1,5 min. 7,90 8,10 embossment carrier tape 5,55 5,45 1,85 1,65 cover tape 8,20 max. notes: a. the clearance between the component and the cavity must be within 0,05 mm min. to 0,65 mm max. so that the component cannot rotate more than 20 within the determined cavity. b. taped devices are supplied on a reel of the following dimensions:- reel diameter: 330 3,0 mm reel hub diameter 75 mm min. reel axial hole: 13,0 0,5 mm c. 3000 devices are on a reel. mdxxbj 20 typical component cavity centre line maximium component rotation typical component centre line index mark (if needed)
15 november 1997 - revised october 2000 tisp4070h3bj thru tisp4115h3bj, tisp4125h3bj thru tisp4220h3bj, tisp4240h3bj thru tisp4400h3bj bidirectional thyristor overvoltage protectors product information important notice power innovations limited (pi) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. pi warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with pi's standard warranty. testing and other quality control techniques are utilized to the extent pi deems necessary to support t his warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. pi assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of pi covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. pi semiconductor products are not designed, intended, authorised, or warranted to be suitable for use in life-support applications, devices or systems. copyright ? 2000, power innovations limited

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