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? semiconductor components industries, llc, 2005 august, 2005 ? rev. 6 1 publication order number: mc74lcx16244/d mc74lcx16244 low?voltage cmos 16?bit buffer with 5 v?tolerant inputs and outputs (3?state, non?inverting) the mc74lcx16244 is a high performance, non?inverting 16?bit buffer operating from a 2.3 to 3.6 v supply. the device is nibble controlled. each nibble has separate output enable inputs which can be tied together for full 16?bit operation. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows mc74lcx16244 inputs to be saf ely driven from 5.0 v devices. the mc74lcx16244 is suitable for memory address driving and all ttl level bus oriented transceiver applications. the 4.5 ns maximum propagation delays support high performance applications. current drive capability is 24 ma at the outputs. the output enable (oen ) inputs, when high, disable the outputs by placing them in a high z condition. the mc74lcx16244 contains sixteen non?inverting buffers with 3?state 5.0 v?tolerant outputs. the device is nibble controlled with each nibble functioning identically, but independently. the control pins may be tied together to obtain full 16?bit operation. the 3?state outputs are controlled by an output enable (oen ) input for each nibble. when oen is low, the outputs are on. when oen is high, the outputs are in the high impedance state. features ? designed for 2.3 v to 3.6 v v cc operation ? 4.5 ns maximum t pd ? 5.0 v tolerant ? interface capability with 5.0 v ttl logic ? supports live insertion and withdrawal ? i off specification guarantees high impedance when v cc = 0 v ? lvttl compatible ? lvcmos compatible ? 24 ma balanced output sink and source capability ? near zero static supply current in all three logic states (20 a) substantially reduces system power requirements ? latchup performance exceeds 500 ma ? esd performance: human body model >2000 v; machine model >200 v ? these are pb?free devices* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. marking diagram tssop?48 dt suffix case 1201 1 48 a = assembly location wl = wafer lot yy = year ww = work week g = pb?free package 1 48 lcx16244g awlyyww see detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ordering information http://onsemi.com
mc74lcx16244 http://onsemi.com 2 figure 1. pinout: 48?lead (top view) 48 1 oe2 oe1 47 2 d0 o0 46 3 d1 o1 45 4 gnd gnd 44 5 d2 o2 43 6 d3 o3 42 7 v cc v cc 41 8 d4 o4 40 9 d5 o5 39 10 gnd gnd 38 11 d6 o6 37 12 d7 o7 36 13 d8 o8 35 14 d9 o9 34 15 gnd gnd 33 16 d10 o10 32 17 d11 o11 31 18 v cc v cc 30 19 d12 o12 29 20 d13 o13 28 21 gnd gnd 27 22 d14 o14 26 23 d15 o15 25 24 oe3 oe4 table 1. pin names pins function oen d0?d15 o0 ?o15 output enable inputs inputs outputs oe1 oe2 d0:3 d4:7 o0:3 o4:7 oe3 oe4 d8:11 d12:15 o8:11 o12:15 one of four 1 48 25 24 figure 2. logic diagram truth table oe1 d0:3 o0:3 oe2 d4:7 o4:7 oe3 d8:11 o8:11 oe4 d12:15 o12:15 l l l l l l l l l l l l l h h l h h l h h l h h h x z h x z h x z h x z h = high voltage level l = low voltage level z = high impedance state x = high or low voltage level and transitions are acceptable; for i cc reasons, do not float inputs. mc74lcx16244 http://onsemi.com 3 ordering information device package shipping ? mc74lcx16244dt tssop?48* 39 units / rail mc74lcx16244dtg tssop?48* 39 units / rail MC74LCX16244DTR2 tssop?48* 2500 / tape & reel m74lcx16244dtr2g tssop?48* 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb?free. maximum ratings symbol parameter value condition unit v cc dc supply voltage ?0.5 to +7.0 v v i dc input voltage ?0.5 v i +7.0 v v o dc output voltage ?0.5 v o +7.0 output in 3?state v ?0.5 v o v cc + 0.5 output in high or low state (note 1) v i ik dc input diode current ?50 v i < gnd ma i ok dc output diode current ?50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range ?65 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. 1. i o absolute maximum rating must be observed. recommended operating conditions symbol parameter min typ max unit v cc supply voltage operating data retention only 2.0 1.5 2.5, 3.3 2.5, 3.3 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage (high or low state) (3?state) 0 0 v cc 5.5 v i oh high level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v v cc = 2.3 v ? 2.7 v ?24 ?12 ?8 ma i ol low level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v v cc = 2.3 v ? 2.7 v +24 +12 +8 ma t a operating free?air temperature ?40 +85 c t/ v input transition rise or fall rate, v in from 0.8 v to 2.0 v, v cc = 3.0 v 0 10 ns/v mc74lcx16244 http://onsemi.com 4 dc electrical characteristics t a = ?40 c to +85 c symbol characteristic condition min max unit v ih high level input voltage (note 2) 2.3 v v cc 2.7 v 1.7 v 2.7 v v cc 3.6 v 2.0 v il low level input voltage (note 2) 2.3 v v cc 2.7 v 0.7 v 2.7 v v cc 3.6 v 0.8 v oh high level output voltage 2.3 v v cc 3.6 v; i ol = 100 a v cc ? 0.2 v v cc = 2.3 v; i oh = ?8 ma 1.8 v cc = 2.7 v; i oh = ?12 ma 2.2 v cc = 3.0 v; i oh = ?18 ma 2.4 v cc = 3.0 v; i oh = ?24 ma 2.2 v ol low level output voltage 2.3 v v cc 3.6 v; i ol = 100 a 0.2 v v cc = 2.3 v; i ol = 8 ma 0.6 v cc = 2.7 v; i ol = 12 ma 0.4 v cc = 3.0 v; i ol = 16 ma 0.4 v cc = 3.0 v; i ol = 24 ma 0.55 i i input leakage current 2.3 v v cc 3.6 v; 0 v v i 5.5 v 5.0 a i oz 3?state output current 2.3 v cc 3.6 v; 0v v o 5.5 v; v i = v ih or v il 5.0 a i off power?off leakage current v cc = 0 v; v i or v o = 5.5 v 10 a i cc quiescent supply current 2.3 v cc 3.6 v; v i = gnd or v cc 20 a 2.3 v cc 3.6 v; 3.6 v i or v o 5.5 v 20 a i cc increase in i cc per input 2.3 v cc 3.6 v; v ih = v cc ? 0.6 v 500 a 2. these values of v i are used to test dc electrical characteristics only. ac characteristics t r = t f = 2.5 ns; r l = 500 symbo l parameter waveform t a = ?40 c to +85 c unit v cc = 3.3 v 0.3 v c l = 50 pf v cc = 2.7 v c l = 50 pf v cc = 2.5 v 0.2 v c l = 30 pf min max min max min max t plh t phl propagation delay input to output 1 1.5 1.5 4.5 4.5 1.5 1.5 5.2 5.2 1.5 1.5 5.4 5.4 ns t pzh t pzl output enable time to high and low level 2 1.5 1.5 5.5 5.5 1.5 1.5 6.3 6.3 1.5 1.5 7.2 7.2 ns t phz t plz output disable time from high and low level 2 1.5 1.5 5.4 5.4 1.5 1.5 5.7 5.7 1.5 1.5 6.5 6.5 ns t oshl t oslh output?to?output skew (note 3) 1.0 1.0 ns 3. skew is defined as the absolute value of the dif ference between the actual propagation delay for any two separate outputs of the same d evice. the specification applies to any outputs switching in the same direction, either high?to?low (t oshl ) or low?to?high (t oslh ); parameter guaranteed by design. mc74lcx16244 http://onsemi.com 5 dynamic switching characteristics t a = +25 c symbol characteristic condition min typ max unit v olp dynamic low peak voltage (note 4) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc =2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v v olv dynamic low valley voltage (note 4) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc =2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v ?0.8 ?0.6 v v 4. number of outputs defined as ?n?. measured with ?n?1? outputs switching from high?to?low or low?to?high. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v, v i = 0 v or v cc 7 pf c out output capacitance v cc = 3.3 v, v i = 0 v or v cc 8 pf c pd power dissipation capacitance 10 mhz, v cc = 3.3 v, v i = 0 v or v cc 20 pf mc74lcx16244 http://onsemi.com 6 waveform 1 ? propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns v cc 0 v v oh v ol dn on t plh t phl waveform 2 ? output enable and disable times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 0 v oen on t pzh t phz t pzl t plz on vmo vmo vmi vmi vmo vmo figure 3. ac waveforms vmi v o h v hz v o l v cc v lz table 2. ac waveforms symbol v cc 3.3 v 0.3 v 2.7 v 2.5 v 0.2 v vmi 1.5 v 1.5 v v cc / 2 vmo 1.5 v 1.5 v v cc / 2 v hz v ol + 0.3 v v ol + 0.3 v v ol + 0.15 v v lz v oh ? 0.3 v v oh ? 0.3 v v oh ? 015 v open pulse generator r t dut v cc r l r 1 c l 6 v or v cc x 2 gnd figure 4. test circuit table 3. test circuit test switch t plh , t phl open t pzl , t plz 6 v at v cc = 3.3 0.3 v 6 v at v cc = 2.5 0.2 v open collector/drain t plh and t phl 6 v t pzh , t phz gnd c l = 50 pf at v cc = 3.3 0.3 v or equivalent (includes jig and probe capacitance) c l = 30 pf at v cc = 2.5 0.2 v or equivalent (includes jig and probe capacitance) r l = r 1 = 500 or equivalent r t = z out of pulse generator (typically 50 ) mc74lcx16244 http://onsemi.com 7 package dimensions tssop?48 dt suffix case 1201?01 issue a ??? ??? s u m 0.12 (0.005) v s t s u m 0.254 (0.010) t ?v? b a l k ?u? 48x ref pin 1 ident. 124 25 48 0.076 (0.003) seating d ?t? plane dim min max min max inches millimeters a 12.40 12.60 0.488 0.496 b 6.00 6.20 0.236 0.244 c ??? 1.10 ??? 0.043 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.50 bsc 0.0197 bsc h 0.37 ??? 0.015 ??? j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.17 0.27 0.007 0.011 k1 0.17 0.23 0.007 0.009 l 7.95 8.25 0.313 0.325 m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 5. terminal numbers are shown for reference only. 6. dimensions a and b are to be determined at datum plane ?w?. c g h ?w? detail e j k1 k j1 section n?n m 0.25 (0.010) f detail e n n mc74lcx16244 http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc74lcx16244/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative. |
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