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1/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. power management switch ics for pc s and digital consumer products power switch ic for expresscard tm BD4157MUV description BD4157MUV is a power management switch ic for the next generation pc card (expresscard tm ) developed by the pcmcia. it conforms to the pcmcia expresscard tm standard, expresscard tm compliance checklist., and expresscard tm implementation guideline, and obtains compliance id ?ec100395? from pcmcia. the power switch offers a number of functions - card detector, and system status detector - which are ideally suited for laptop and desktop computers. features 1) incorporates three low on-resistance fets for expresscard tm . 2) incorporates an fet for output discharge. 3) incorporates an enabler. 4) incorporates under voltage lockout (uvlo) protection. 5) employs an vqfn020v4040 package. 6) built-in thermal shutdown protector (tsd). 7) built-in thermal shutdown protector (tsd). 8) incorporates an over current protection (ocp). 9) built-in enable signal for pll 10) built-in pull up resistance for detecting expresscard tm 11) conforms to the expresscard tm standard. 12) conforms to the expresscard tm compliance checklist. 13) conforms to the expresscard tm implementation guideline. applications laptop and desktop computer s, and other expresscard tm equipped digital devices. product lineup parameter BD4157MUV package vqfn020v4040 ?expresscard tm ? is a registered trademark registered of the pcmcia (personal computer memory card international association). no.11029eat26
technical note 2/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV absolute maxi mum ratings parameter symbol ratings unit input voltage v3aux_in, v3_in, v15_in -0.3 4.5 * 1 v logic input voltage 1 en,cppe#,cpusb#,sysr, perst_in#,rclken -0.3 v3aux_in+0.3 * 1 v logic output voltage 1 rclken -0.3 v3aux_in+0.3 * 1 v logic output voltage 2 perst# -0.3 v3aux_in+0.3 v output voltage v3aux,v3, v15 -0.3 4.5 * 1 v output current 1 iov3aux 1.0 a output current 2 iov3 2.0 a output current 3 iov15 2.0 a power dissipation 1 pd1 0.34 * 2 mw power dissipation 2 pd2 0.70 * 3 mw operating temperature range topr -40 +100 storage temperature range tstg -55 +150 maximum junction temperature tjmax +150 *1 not to exceed pd. *2 reduced by 2.7mw for each increase in ta of 1 over 25 *3 reduced by 5.6mw for each increase in ta of 1 over 25 (when mounted on a board 74.2mm 74.2mm 1.6mm glass-epoxy pcb . operating conditions (ta=25 ) parameter symbol ratings unit min max input voltage 1 v3aux_in 3.0 3.6 v input voltage 2 v3_in 3.0 3.6 v input voltage 3 v15_in 1.35 1.65 v logic input voltage 1 en -0.3 3.6 v logic input voltage 2 cppe#,cpusb#,sysr, perst_in#,rclken 0 v3aux_in v logic output voltage 1 rclken 0 v3aux_in v logic output voltage 2 perst# 0 v3aux_in v output current 1 iov3aux 0 275 ma output current 2 iov3 0 1.3 a output current 3 iov15 0 650 ma this product is not designed to offer protection against radioactive rays.
technical note 3/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV electrical characteristics (unless otherwise noted, ta=25 , v3aux_in =v3_in=3.3v, v15_in=1.5v ven=open,vsysr=open,cppe#=0v,cp usb#=open,perst_in#=open) parameter symbol limits unit condition min typ max standby current ist - 40 80 a ven=0v (include ien, irclken) bias current 1 icc1 - 100 250 a vsysr=0v, cppe#=open bias current 2 icc2 - 250 500 a [enable] high level enable input voltage venhi 2.0 - 3.6 v low level enable input voltage venlow -0.2 - 0.8 v enable pin input current ien 10 - 30 a ven=0v [logic] high level logic input voltage vlhi 2.0 - - v low level logic input voltage vllow - - 0.8 v logic pin input current icppe# - 0 1 a cppe#=3.6v 10 - 30 a cppe#=0v icpusb# - 0 1 a cpusb#=3.6v 10 - 30 a cpusb#=0v isysr - 0 1 a sysr=3.6v 10 - 30 a sysr=0v iprt_in# - 0 1 a perst_in#=3.6v 10 - 30 a perst_in#=0v irclken - 0 1 a rclken=3.6v 10 - 30 a rclken=0v rclken low voltage vrclken - 0.1 0.3 v irclken=0.5ma rclken leak current irclken - - 1 a vrclken=3.6v [switch v3aux] on resistance r v3aux - 140 220 m tj=-10 100 discharge on resistance r v3aux dis - 30 150 [switch v3] on resistance r v3 - 50 90 m tj=-10 100 discharge on resistance r v3 dis - 30 150 [switch v15] on resistance r v15 - 50 90 m tj=-10 100 discharge on resistance r v15 dis - 30 150 [over current protection] v3 over current ocp v3 1.3 - - a v3aux over current ocp v3aux 0.275 - - a v15 over current ocp v15 0.65 - - a
technical note 4/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV parameter symbol limits unit condition min typ max [under voltage lockout] v3_in uvlo off voltage vuvlo v3_in 2.60 2.80 3.00 v sweep up v3_in hysteresis voltage S vuvlo v3_in 50 100 150 mv sweep down v3aux_in uvlo off voltage vuvlo v3aux_in 2.60 2.80 3.00 v sweep up v3aux_in hysteresis voltage S vuvlo v3aux_in 50 100 150 mv sweep down v15_in uvlo off voltage vuvlo v15_in 1.10 1.20 1.30 v sweep up v15_in hysteresis voltage S vuvlo v15_in 50 100 150 mv sweep down [power good] v3 power good voltage pg v3 2.700 2.850 3.000 v v3aux power good voltage pg v3aux 2.700 2.850 3.000 v v15 power good voltage pg v15 1.200 1.275 1.350 v perst# low voltage vperst# low - 0.01 0.1 v i perst =0.5ma perst# high voltage vperst# high 3.0 - - v perst# delay time t perst# 4 - 20 ms perst# assertion time tast - - 500 ns [output rise time] v3_in to v3 t v3 0.1 - 3 ms v3aux_in to v3aux t v3aux 0.1 - 3 ms v15_in to v15 t v15 0.1 - 3 ms
technical note 5/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV reference data fig.5 wakeup wave form (card assert) fig.6 wakeup wave form (usb2.0 assert) fig.7 wakeup wave form (shut down active) fig.1 card assert/ de-assert (active) fig.2 card assert/de-assert (standby) fig.4 system active ? standby(no card) fig.3 system active ? standb y ( card present ) fig.8 wakeup wave form (standby active) fig.10 power down wave form (usb2.0 de-assert) fig.9 power down wave form (card de-assert) fig.11 power down wave form (active shut down) fig.12 power down wave form (active standby) r v3 =3.3 r v3aux =13.2 r v15 =3 cppe#(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) cppe#(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) sysr(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) cppe#(2v/div) v3(2v/div) v15(1v/div) v3aux(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) sysr(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) cpusb#(2v/div) cppe#(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) sysr(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) en(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) sysr(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) cpusb#(2v/div) en(2v/div) 500s/div 500s/div 500s/div 5.0ms/div 5.0ms/div 5.0ms/div 500s/div 500s/div 500s/div 5.0ms/div 5.0ms/div 500s/div
technical note 6/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV fig.17 perst# wave form (perst_in# input) fig.18 rclken wave form (perst_in# input) fig.19 output voltage (v3_in:off on) fig.20 output voltage (v3aux_in:off on) fig.14 rclken wave form (card assert/ de-assert) fig.15 perst# wave form (usb2.0 assert/ de-assert) fig.16 rclken wave form (usb2.0 assert/ de-assert) fig.22 output voltage (v3_in:on off) fig.21 output voltage (v15_in:off on) fig.13 perst# wave form (card assert/ de-assert) fig.23 output voltage (v3aux_in:on off) fig.24 output voltage (v15_in:on off) v3(2v/div) v3aux(2v/div) perst#(2v/div) cppe#(2v/div) v3(2v/div) v3aux(2v/div) perst#(2v/div) cppe#(2v/div) v3(2v/div) v3aux(2v/div) rclken(2v/div) cppe#(2v/div) cpusb#(2v/div) v3aux(2v/div) v3(2v/div) v3aux(2v/div) perst#(2v/div) v3(2v/div) v3aux(2v/div) rclken(2v/div) v3(2v/div) rclken(2v/div) perst_in#(2v/div) perst_in#(2v/div) v3(2v/div) v15_in(2v/div) v3(2v/div) v3aux(2v/div) v3_in(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) v15(1v/div) v3aux_in(2v/div) v3aux(2v/div) v15(1v/div) v3(2v/div) r v3 =3.3 r v3aux =13.2 r v15 =3 v3_in(2v/div) v3aux(2v/div) v15(1v/div) r v3 =3.3 r v3aux =13.2 r v15 =3 v3aux_in(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) r v3 =3.3 r v3aux =13.2 r v15 =3 v15_in(2v/div) v3(2v/div) v3aux(2v/div) v15(1v/div) 5.0ms/div 5.0ms/div 500s/div 1.0ms/div 1.0ms/div 500s/div 5.0ms/div 5.0ms/div 500s/div 500s/div 500s/div 500s/div
technical note 7/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV block diagram physical dimensions pin function pin no pin name pin function 1 sysr logic input pin 2 v3_in1 v3 input pin 3 v3-1 v3 output pin 4 v3_in2 v3 input pin 5 v3-2 v3 output pin 6 perst_in# perst# control input pin (sysreset#) 7 gnd gnd pin 8 perst# logic output pin 9 cpusb# logic input pin 10 cppe# logic input pin 11 v15-1 v15 output pin 12 v15_in1 v15 input pin 13 v15-2 v15 output pin 14 v15_in2 v15 input pin 15 v3aux v3aux output pin 16 test test pin. must be open or gnd. 17 v3aux_in v3aux input pin 1 18 rclken reference clock enable signal / power good signal (no delay 19 n.c. must be open or gnd. 20 en enable input pin vqfn020v4040 package (unit:mm) 2.1 0.1 c0.2 0.5 1.0 15 6 10 11 15 16 20 4.0 0.1 4.0 0.1 2.1 0.1 0.4 0.1 0.25 +0.05 -0.04 0.02 +0.03 -0.02 1.0max. (0.22) 0.08 s s d4157 lot no. 3.3v /275ma 1.5v/650ma v3_in1 sysr v3_in v3aux_in uvlo cppe# cpusb# v15_in1 v15-2 input logic reference block v3aux_in v15_in vd 3.3v/1.30a gnd pump charge protection thermal tsd en vd vd v3-2 v3aux vd 3.3v tsd,cl,uvlo v3-1 power good tsd,cl,uvlo tsd,cl,uvlo_aux v3_in2 v15_in2 v15-1 rclken en,sysr,cpusb#,cppe# 1.5v uvlo_aux 3.3v perst# v3aux_in v3aux_in perst_in# 2 under voltage lock out 4 17 12 14 10 9 20 1 7 6 8 18 11 15 5 3 13 v3aux_in n.c. 19 v3_in,v3aux_in,v15_in v3,v3aux,v15 cl 16 test
technical note 8/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV description of block operation en with an input of 2.0 volts or higher, this terminal goes high to activate the circuit, and goes low to deactivate the circuit (with the standby circuit current of 40 a), it discharges each output and lowers out put voltage when the input falls to 0.8 volts or less. v3_in, v15_in, and v3aux_in these are the input terminals for each channel of a 3ch switch. v3 _ in and v15 _ in terminals have two pins each, which should be short-circuited on the pc board with a thick conduc tor. a large current runs through these three terminals : (v3 _ in: 1.3a; v3aux _ in: 0.275 a; and v15 _ in: 0.65 a). in order to lower the output impedance of the connected power supply, it is recommended that ceramic capacitors (with b- type characteristics or better) be provided between these terminals and the ground. specifically, th e capacitors should be on the order of 1 f between v3 _ in and gnd, and between v15 _ in and gnd; and on the order of 0.1 f between v3aux _ in and gnd. v3, v15, and v3aux these are the output terminals for each switch. the v3 and v15 terminals have two pins each, which should be short-circuited on the pc board and connected to an expresscar d connector with a thick conductor, as short as possible. in order to stabilize the output, it is recommended that cera mic capacitors (with b-type characteristics or better) be provided between these terminals and t he ground. specifically, the capacito rs should be on the order of 10 f between v3 and gnd, and between v15 and g nd; and on the order of 1 f between v3aux and gnd. cppe# this pin is used to find whether or not a pci-express signal compatible card is present. turns to ?high? level with an input of 2.0 volts or higher, which means that no card is provi ded, while it turns to ?low? level when the input is lowered to 0.8 volts or less, which means that a ca rd is provided. controls the on/off, switch selecting the proper mode based on the status of the system. pull up resistance (100k ? 200k ) is built into, so the number of components is reduced. cpusb# this pin is used to find whether or not a usb2.0 signal compatib le card is present. turns to ?high? level with an input of 2.0 volts or higher, which means that no card is provided, while it turns to ?low? level when the input is lowered to 0.8 volts or less, which means that a card is provided. controls the on/off switch, selecting the proper mode based on the system status. pull up resistance (100k ? 200k ) is built into, so the number of components is reduced. sysr this pin is used to detect the system stat us. turns to ?high? level with an input of 2.0 volts or higher, which means that the system is activated, while it turns to ?low? level when the input is lowere d to 0.8 volts or less, which means that the system is on standby. perst_in# this pin is used to control the reset signal (perst#) to a ca rd from the system side. (also referred to as ?sysreset#? by pcmcia.) turns to ?high? level with an input of 2.0 volts or higher, and sets perst# to ?high? and with a ?power good? output. turns to ?low? level and sets perst# to ?l ow? when the input falls to 0.8 volts or less. perst# this pin is used to send a reset signal to a pci-express comp atible card. reset status is determined by the outputs, perst_in#, cppe# system status, and en on/off status. turns to ?high? level and activates the pci-express compatible card only if each ou tput is within the ?power good? threshold, with the card inserted and perst_in# turned to ?high? level. rclken this pin is used to send an enable signal to the reference cl ock. activation status is determined by the outputs, cppe# system status, and en on/off status. turns to ?high? leve l and activates the reference clock pll only if each output is within the ?power good? threshold, with the card kept inserted. test this pin is used to test, which should be short-circuited to the gnd. when it is short- circuited to v3aux_in, uvlo (v3_in, v15_in) turns off.
technical note 9/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV timing chart power on/off status of expresscard tm system status expresscard tm module status power switch status primary auxiliary primary (+3.3v and +1.5v) auxiliary (3.3v aux) off off don?t care off off on on de-asserted off off asserted on on on on de-asserted off off asserted before this off on asserted after this off off expresscard tm states transition diagram system status card status stand-by status :sysr=l card asserted status :cp#=l on status :sysr=h card de-asserted status :cp#=h from on to stand-by status :sysr=h l from de-asserted to asserted status :cp#=h l from stand-by to on status :sysr=l h from asserted to de-asserted status :cp#=l h v3aux=off v15=v3=off cp#=h ? l ? sysr=l h cp#=l h sysr=h l sysr=h ? l cp#=h sysr=l cp#=l sysr=l cp#=h sysr=h cp#=l sysr=h cp#=l sysr=l h cp#=h l sysr=h cp#=l sysr=h l cp#=l sysr=l cp#=l h v3aux=on v15=v3=on v3aux=on v15=v3=off
technical note 10/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV expresscard tm timing diagrams tpd min max units a system dependent b - 100 s c system dependent d system dependent e 100 - s f 4 20 ms g - 10 ms tpd min max units a system dependent b - 10 ms a b g c d e f host powe r (v3aux_in,v3_in, v15_in) perst_in# cppe# card powe r (v3aux,v3,v15) rclken perst# refclk timing signals-card present before host power is on timing signals-usb present before host power is on a b host powe r (v3aux_in,v3_in, v15_in) perst_in# cpusb# card powe r (v3aux,v3,v15) rclken perst# refcl k (either tri-stated or off)
technical note 11/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV tpd min max units a - 100 s b - 10 ms c system dependent d system dependent e 4 10 ms tpd min max units a - 10 ms b c d e host powe r (v3aux_in,v3_in, v15_in) perst_in# cppe# card powe r (v3aux,v3,v15) rclken perst# refclk timing signals host power is on prior to card insertion a timing signals host power is on prior to usb insertion a host powe r (v3aux_in,v3_in, v15_in) perst_in# cpusb# card powe r (v3aux,v3,v15) rclken perst# refcl k (either tri-stated or off)
technical note 12/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV application information (continued) host powe r (v3aux_in) perst_in# cppe# card powe r (v3aux,v3,v15) rclken perst# timing signals-host system in standby prior to card insertion host powe r (v3_in,v15_in,sysr) refcl k (either tri-stated or off) host powe r (v3aux_in) perst_in# cpusb# card powe r (v3aux,v3,v15) rclken perst# refcl k (either tri-stated or off) timing signals-host system in standby prior to usb insertion host powe r (v3_in,v15_in,sysr)
technical note 13/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV tpd min max units a - 2 s b system dependent c system dependent d load dependent e - 2 s tpd min max units a system dependent b load dependent timing signals host controlled power down a d e host powe r (v3aux_in, v3_in,v15_in) perst_in cppe# card powe r (v3aux,v3,v15) rclken perst# refclk c b timing signals host controlled power down b host powe r (v3aux_in, v3_in,v15_in) perst_in cpusb# card powe r (v3aux,v3,v15) rclken perst# a refcl k (either tri-stated or off)
technical note 14/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV application information (continued) tpd min max units a load dependent b system dependent c - 500 ns d - 2 s e system dependent f system dependent tpd min max units a load dependent b system dependent c system dependent timing signals controlled power down when en asserted host powe r (v3aux_in,v3_in, v15_in) en cppe# card powe r (v3aux,v3,v15) rclken perst# refclk e f d a b c timing signals controlled power down when en asserted host powe r (v3aux_in,v3_in, v15_in) en cpusb# card powe r (v3aux,v3,v15) rclken perst# b c a refcl k (either tri-stated or off)
technical note 15/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV tpd min max units a load dependent b - 500 ns c system dependent d - 2 s tpd min max units a load dependent timing signals-surprise card removal host powe r (v3aux_in,v3_in, v15_in) rerst_in# cppe# card powe r (v3aux,v3,v15) rclken perst# refclk a d c b timing signals-surprise usb removal host powe r (v3aux_in,v3_in, v15_in) rerst_in# cpusb# card powe r (v3aux,v3,v15) rclken perst# a refcl k (either tri-stated or off)
technical note 16/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV tpd min max units a system dependent b 4 20 ms c - 2 s d system dependent e system dependent tpd min max units a system dependent timing signals power state transitions (signal applies for sysr) b e host powe r (v3aux_in,v3_in, v15_in) sysr cppe# card powe r (v3aux) perst# refclk a card powe r (v3,v15) b c d rclken=open, perst_in=3.3v,en=3.3v timing signals power state transitions (signal applies for sysr) host powe r (v3aux_in,v3_in, v15_in) sysr cpusb# card powe r (v3aux) perst# a card powe r (v3,v15) rclken=open, perst_in=3.3v,en=3.3v refcl k (either tri-stated or off)
technical note 17/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV tpd min max units a system dependent b 4 20 ms c - 2 s d system dependent e system dependent tpd min max units a system dependent timing signals ? power state transitions (sysr and en are connected to v3_in/v3aux_in.) rclken=open, perst_in# is asserted in advance of power changes. b e v3aux_in en v3_in,sysr v15_in card powe r (v3aux) perst# refclk a card powe r (v3,v15) b c d perst_in# cppe# timing signals ? power state transitions (sysr and en are connected to v3_in/v3aux_in.) v3aux_in en v3_in,sysr v15_in card powe r (v3aux) perst# a card powe r (v3,v15) rclken=open, perst_in# is asserted in advance of power changes. perst_in# cpusb# refcl k (either tri-stated or off)
technical note 18/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV output condition list(output state power supply logic input output v3aux_in v3_in v15_in en sysr cppe# cpusb# v3/v15 v3aux off 0 off off shut down 1 0 off off on stand-by 1 1 1 0 1 1 off off 0 off on 0 off on stand-by 1 1 0 off off on 1 1 1 1 1 1 1 off off 0 on on 0 on on state logic input logic output perst_in# rclken(input) perst# rclken off 0 0 shut down 0 0 stand-by 0 0 on(no card) 0 0 on(cpusb#=0) 0 hiz 0 0 0 0 0 0 1 hiz 0 0 1 0 0 0 on(cppe#=0) 0 hiz 0 1 0 0 0 0 1 hiz 1 1 1 0 0 0
technical note 19/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV application circuit (circuit for expresscard tm compliance checklist) heat loss thermal design should allow the device to operate within the follo wing conditions. note that the temperatures listed are the allowed temperature limits. thermal design should allow sufficient margin from these limits. 1. ambient temperature ta can be no higher than 100 . 2. chip junction temperature tj can be no higher more than 150 . chip junction temperature tj can be determined as follows: chip junction temperature tj is calc ulated from ambient temperature ta: tj=ta+ j-a w reference value j-c:vqfn020v4040 367.6 /w ic only 178.6 /w 1-layer (copper foil density 10.29mm 2 ) 56.6 /w 4-layer (copper foil density 10.29mm 2 / 2,3-layer copper foil density 5505mm 2 ) 35.1 /w 4-layer (copper foil density 5505mm 2 ) substrate size 74.2 74.2 1.6mm 3 (thermal vias in the board.) most of heat loss in the BD4157MUV occu rs at the output switch. the power lo st is determined by multiplying the on-resistance by the square of output current of each switch. cppe#(10pin) cpusb#(9pin) v3(3,5pin) v3aux(15pin) v15(11,13pin) perst#(8pin) rclken(18pin) v3_in(2,4pin) v3aux_in(17pin) v15_in(12,14pin) perst_in#(6pin) en(20pin) sysr(1pin) cppe# cpusb# 3.3v 3.3v 1.5v perst # 3.3v 3.3v 1.5v sysreset# BD4157MUV gnd(7pin) test(16pin) rclken
technical note 20/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV equivalent circuit 1pin 2,4pin 3,5pin 6pin 8pin 9pin 10pin 11,13pin 12,14pin 15pin 16pin 17pin 18pin 20pin v3aux_in v3aux_in v3 v3_in v3aux_in v3aux_in v3aux_in v3aux_in v3aux_in v3aux_in v3aux_in v15 v3_in v3aux_in v3aux v3aux_in v3aux_in v3aux_in
technical note 21/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV notes for use 1. absolute maximum ratings although quality is rigorously controlled, the device may be destroyed when applie d voltage, operating temperature, etc. exceeds its absolute maximum rating. because the sour ce (short mode or open mode) cannot be identified once the ic is destroyed, it is important to take physical safety measures such as fusing when implementing any special mode that operates in excess of absolute rating limits. 2. thermal design consider allowable loss (pd) under actual operating conditions and provide sufficient margin in the thermal design. 3. terminal-to-terminal short-circuit and mis-mounting when the mounting the ic to a printed circuit board, take utmost care to assure the position and orientation of the ic are correct. in the event that the ic is mounted erroneously, it may be destroyed. the ic may also be destroyed when a short-circuit is caused by foreign matter introduced in to the clearance between outputs, or between an output and power-gnd. 4. operation in strong electromagnetic fields using the ic in strong electromagnetic fi elds may cause malfunctions. exercise caution in respect to electromagnetic fields. 5. built-in thermal shutdown protection circuit this ic incorporates a thermal shutdown protection ci rcuit (tsd circuit). the working temperature is 175 (standard value) with a -15 (standard value) hysteresis width. when the ic chip temperature rises the tsd circuit is activated, while the output terminal is brought to t he off state. the built-in tsd circuit is intended exclusively to shut down the ic in a thermal runaway event, and is not intended to prot ect the ic or guarantee performance in these conditions. therefore, do not operate the ic after with the expectation of continued use or s ubsequent operation once this circuit is activated. 6. capacitor across output and gnd when a large capacitor is connected across the output and gnd, and the v3aux_in is short-circuited with 0v or gnd for any reason, current charged in the capacitor flows in to the output and may destroy the ic. therefore, use a capacitor smaller than 1000 f between the output and gnd. 7. set substrate inspection connecting a low-impedance capacitor to a pin when running an inspection with a set substrate may produce stress on the ic. therefore, be certain to disc harge electricity at each process of t he operation. to prevent electrostatic accumulation and discharge in the assembly process, thoro ughly ground yourself and any e quipment that could sustain esd damage, and continue observing esd-prevention procedur es in all handling, transfer and storage operations. before attempting to connect the set substr ate to the test setup, make certain that the power supply is off. likewise, be sure the power supply is off before remo ving the substrate from the test setup. 8. ic terminal input this integrated circuit is a monolithic ic, with p substrate and p + isolation between elements. the p layer and n layer of each element form a, pn juncti on. when the potential relation is gnd>terminal a>terminal b, the pn junction works as a diode, and when terminal b>g nd terminal a, the pn junction operates as a parasitic transistor. parasitic elements inevitably form, due to the nature of the ic construction. the operati on of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. consequently, take utmost care not to use the ic in a way that would cause the parasitic element to actively operate, such as applying voltage lower than gnd (p substrate) to the input terminal. 9. gnd wiring pattern if both a small signal gnd and a high current gnd are presen t, it is recommended that the patterns for the high current gnd and the small signal gnd be separated. proper grounding to the reference point of the set should also be provided. in this way, the small signal gnd voltage will by unaffected by the change in voltage stemming from the pattern wiring resistance and the high current. also, pay special attention to avoid undesirable wiring pattern fluctuations in any externally connected gnd component. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element
technical note 22/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV 10. electrical characteristics the electrical characteristics in the specifications may vary, depending on ambient temperature, power supply voltage, circuit(s) externally applied, and/or other conditions. t herefore, please check all such factors, including transient characteristics, that could affect the electrical characteristics. 11. capacitors appli ed to input terminals the capacitors applied to the input terminals (v3_in, v3au x_in and v15_in) are used to lower the output impedance of the connected power supply. an incr ease in the output impedance of the powe r supply may result in destabilization of input voltages (v3_in, v3aux_in and v15_in). it is re commended that a low-esr capacitor be used, with a lower temperature coefficient (change in capacitance vs. change in temperature), recommended capacitors are on the order of 0.1 f for v3aux_in, and1 f for v3_in and v15_in. however, they must be thoroughly checked at the temperature and with the load range expe cted in actual use, because capacitor selection depends to a significant degree on the characteristics of the input power supply to be used and the conductor pattern of the pc board. 12. capacitors applied to output terminals capacitors for the output terminals (v3, v3_aux, and v15), s hould be connected between eac h of the output terminals and gnd. a low-esr, low temperature coefficient out put capacitor is recommended-on the order of 1 f for v3 and v15 terminals, and 1 f less for v3_aux. however, they must be thor oughly checked at the temperature and with the load range expected in actual use, because capacitor se lection depends to a signific ant degree on the temperature and the load conditions. 13. not of a radiation-resistant design. 14. allowable loss (pd) with respect to the allowable loss, please refer to the therma l derating characteristics shown in the exhibit, which serves as a rule of thumb. when the system design causes the ic to operate in excess of the allowable loss, chip temperature will rise, reducing the current capacity and decreasing other basic ic functionality. ther efore, design should always enable ic operation within the allowable loss only. 15. operating range basic circuit functions and operations are warranted with in the specified operating range the working ambient temperature range. although reference values for electrical characteristics are not warranted, no rapid or extraordinary changes in these characteristics are expected, provid ed operation is within the nor mal operating and temperature range. 16. the applied circuit example diagrams presented here are recommended configurations. however, actual design depends on ic characteristics, which should be confirmed before operation. also, note that modifying external circuits may impact static, noise and other ic characteristics, includi ng transient characteristics. be sure to allow sufficient margin in the design to accommodate these factors. 17. wiring to the input terminals (v3 in, v3aux in, and v15 in) and output terminals (v3, v3aux and v15) of the built-in fet should be carried out with special care. using unnecessarily long and/or thin conductors may decrease output voltage and degrade other characteristics. 18. heatsink the heatsink is connected to the sub, which should be short- circuited to the gnd. proper heatsink soldering to the pc board should enable lower thermal resistance.
technical note 23/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV power dissipation BD4157MUV 4-layer (copper foil density 5505mm 2 ) j-a=35.1 /w 4-layer (copper foil density 10.29mm 2 ) (2,3-layer copper foil density 5505mm 2 ) j-a=56.6 /w 1-layer (copper foil density 10.29mm 2 ) j-a=178.6 /w ic only j-a=367.6 /w 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 25 50 75 100 125 150 ambient temperature: ta( ) power dissipation : pd w) 105 2.21w 3.56w 0.70w 0.34w
technical note 24/24 www.rohm.com 2011.06 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD4157MUV ordering part number b d 4 5 1 7 m u v - e 2 part no. part no. package muv:vqfn020v4040 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin (unit : mm) vqfn020v4040 2.1 0.1 1 15 11 20 16 5 10 6 0.5 1.0 0.25 +0.05 - 0.04 2.1 0.1 0.4 0.1 c0.2 1.0max 0.02 +0.03 - 0.02 (0.22) 4.0 0.1 4.0 0.1 1pin mark 0.08 s s
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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