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? semiconductor components industries, llc, 2007 february, 2007 ? rev. 12 1 publication order number: ncp565/d ncp565/ncv565 1.5 a low dropout linear regulator the ncp565/ncv565 low dropout linear regulator will provide 1.5 a at a fixed output voltage or an adjustable voltage down to 0.9 v. the fast loop response and low dropout voltage make this regulator ideal for applications where low voltage and good load transient response are important. device protection includes current limit, short circuit protection, and thermal shutdown. features ? ultra fast transient response ( 1.0 s) ? low ground current (1.1 ma @ iload = 1.5 a) ? low dropout voltage (0.9 v @ iload = 1.5 a) ? low noise (28 vrms) ? 0.9 v reference voltage ? adjustable output voltage from 7.7 v down to 0.9 v ? 1.2 v fixed output version. other fixed voltages available on request ? current limit protection (3.5 a typ) ? thermal shutdown protection (160 c) ? pb?free packages are available typical applications ? servers ? asic power supplies ? post regulation for power supplies ? constant current source http://onsemi.com d 2 pak case 936a adjustable 1 5 tab = ground pin 1. n.c. 2. v in 3. ground 4. v out 5. adj xx = 12 or 33 y = p or v a = assembly location wl = wafer lot y = year ww = work week g = pb?free see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information 1 2 3 d 2 pak case 936 fixed marking diagrams tab = ground pin 1. v in 2. ground 3. v out nc p565d2txx awlywwg nc y565d2t awlywwg dfn6 case 506ax yy = voltage rating 12 = 1.2 v a = assembly location y = year ww = work week m = date code = pb?free package p565 mnxx ayww 1 1 aym 565yy sot?223 case 318e (note: microdot may be in either location) xx = voltage rating aj = adjustible 12 = 1.2 v 33 = 3.3 v tab = v out pin 1. ground 2. v out 3. v in
ncp565/ncv565 http://onsemi.com 2 pin description d 2 pak dfn6 sot?223 symbo l description pin no. adj. version pin no. fixed version pin no. adj. version pin no. fixed version pin no. fixed version 1 5 ? 5 ? ? adj this pin is to be connected to the r sense resistors on the output. the linear regulator will attempt to maintain 0.9 v between this pin and ground. refer to figure 1 for the equation. maximum ratings rating symbol value unit input voltage (note 1) v in 9.0 v output pin voltage v out ?0.3 to v in + 0.3 v adjust pin voltage v adj ?0.3 to v in + 0.3 v thermal characteristics sot?223 (notes 2, 3) thermal resistance, junction?to?ambient thermal resistance, junction?to?pin r ja r jp 107 12 c/w thermal characteristics dfn6 3x3 (notes 2, 3) thermal resistance, junction?to?ambient thermal resistance, junction?to?pin r ja r jp 176 37 c/w thermal characteristics d 2 pak (5ld) (notes 2, 3) thermal resistance, junction?to?case thermal resistance, junction?to?ambient thermal resistance, junction?to?pin r jc r ja r jp 3 105 4 c/w operating junction temperature range t j ?40 to 150 c operating ambient temperature range t a ?40 to 125 c storage temperature range t stg ?55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series contains esd protection and exceeds the following tests: human body model jesd 22?a114?b machine model jesd 22?a115?a 2. the maximum package power dissipation is: p d t j(max) t a r ja 3. as measured using a copper heat spreading area of 50 mm 2 .
ncp565/ncv565 http://onsemi.com 3 figure 1. typical schematic, adjustable output voltage reference block v ref = 0.9 v output stage c1 r1 r2 c2 v out adj gnd r1 r2 v out v ref 1 v in 5.6 pf gnd figure 2. typical schematic, fixed output voltage reference block v ref = 0.9 v output stage c1 c 2 v out gnd v in r1 r2
ncp565/ncv565 http://onsemi.com 4 electrical characteristics (v in = v out + 1.3 v, v out = 0.9 v, t j = 25 c, c in = c out = 150 f, unless otherwise noted.) characteristic symbol min typ max unit adjustable output version reference voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?10 to 105 c) v ref 0.882 (?2%) 0.9 0.918 (+2%) v reference voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?40 to 125 c) v ref 0.873 (?3%) 0.9 0.927 (+3%) v adj pin current i adj ? 30 ? na line regulation (i out = 10 ma) reg line ? 0.03 ? % load regulation (10 ma < i out < 1.5 a) reg load ? 0.03 ? % dropout voltage (i out = 1.5 a, v out = 2.5 v) (note 4) vdo ? 0.9 1.3 v current limit i lim 1.6 3.5 ? a ripple rejection (120 hz; i out = 1.5 a) rr ? 85 ? db ripple rejection (1 khz; i out = 1.5 a) rr ? 75 ? db ground current (i out = 1.0 ma to 1.5 a) i gnd ? 1.1 3.0 ma output noise voltage (f = 100 hz to 100 khz, i out = 1.5 a) v n ? 28 ? vrms fixed output voltage (v in = v out + 1.3 v, t j = 25 c, c in = c out = 150 f, unless otherwise noted.) output voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?10 to 105 c) 1.2 v version v out 1.176 (?2%) 1.2 1.224 (+2%) v output voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?40 to 125 c) 1.2 v version v out 1.164 (?3%) 1.2 1.236 (+3%) v output voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?10 to 105 c) 3.3 v version v out 3.234 (?2%) 3.3 3.366 (+2%) v output voltage (10 ma < i out < 1.5 a; v out + 1.6 v < v in < 9.0 v; t j = ?40 to 125 c) 3.3 v version v out 3.201 (?3%) 3.3 3.399 (+3%) v line regulation (i out = 10 ma) reg line ? 0.03 ? % load regulation (10 ma < i out < 1.5 a) reg load ? 0.03 ? % dropout voltage (i out = 1.5 a, v out = 2.5 v) (note 4) vdo ? 0.9 1.3 v current limit i lim 1.6 3.5 ? a ripple rejection (120 hz; i out = 1.5 a) rr ? 85 ? db ripple rejection (1 khz; i out = 1.5 a) rr ? 75 ? db ground current (i out = 1.0 ma to 1.5 a) i gnd ? 1.1 3.0 ma output noise voltage (f = 100 hz to 100 khz, i out = 1.5 a) v n ? 28 ? vrms 4. dropout voltage is a measurement of the minimum input/output differential at full load.
ncp565/ncv565 http://onsemi.com 5 typical characteristics figure 3. output voltage vs. temperature 0.9005 0.9000 0.8995 0.8990 0.8985 0.8980 0.8975 0.8970 ?50 0 50 100 150 t j , junction temperature ( c) v ref , reference voltage (v) 3.90 ?50 0 50 100 150 t j , junction temperature ( c) i sc , short circuit current limit (a) 3.85 3.80 3.75 3.70 3.65 3.60 3.55 3.50 3.45 3.40 3.35 1.2 ?50 0 50 100 15 0 t j , junction temperature ( c) v in ? v out , dropout voltage (v) 1.0 0.8 0.6 0.4 0.2 0 i out = 1.5 a i out = 50 ma 1.16 ?50 0 50 100 150 t j , junction temperature ( c) i gnd , ground current (ma) 1.14 1.12 1.10 1.08 1.06 1.04 1.02 1.00 0.98 0.96 ?25 25 75 125 ?25 25 75 125 ?25 25 75 125 ?25 25 75 125 v in = 2.5 v v out = 0.9 v c in = c out = 150 f v in = 2.5 v v out = 0.9 v c in = c out = 150 f c in = c out = 150 f v in = 2.5 v v out = 0.9 v i out = 1.5 a c in = c out = 150 f 1.12 1.14 1.16 1.18 1.2 1.22 1.24 1.26 1.28 0 300 600 900 1200 150 0 i out , output current (ma) i gnd , ground current (ma) figure 4. output voltage vs. temperature 3.302 3.300 3.298 3.296 3.294 3.292 3.290 3.288 ?50 0 50 100 15 0 t j , junction temperature ( c) v ref , reference voltage (v) ?25 25 75 125 v in = 4.9 v v out = 3.3 v c in = c out = 150 f figure 5. short circuit current limit vs. temperature figure 6. dropout voltage vs. temperature figure 7. ground current vs. temperature figure 8. ground current vs. output current
ncp565/ncv565 http://onsemi.com 6 typical characteristics 100 90 80 70 60 50 40 30 20 10 0 10 1000000 ripple rejection (db) f, frequency (hz) 100 1000 10000 100000 i out = 1.5 a figure 9. ripple rejection vs. frequency figure 10. output capacitor esr stability vs. output current 250 0 750 500 1000 1500 1250 1 10 100 1000 output current (ma) esr ( ) c out = 10 f stable unstable v out = 3.3 v 50 40 30 20 10 0 1.50 1.00 0.50 0 0 50 150 200 250 300 350 400 time (ns) i out , output current (a) output voltage deviation (mv) 10 0 ?10 ?20 ?30 ?40 1.50 1.00 0.50 0 0 50 100 150 200 250 300 350 400 time (ns) i out , output current (a) output voltage deviation (mv) figure 11. load transient from 10 ma to 1.5 a 10 0 ?10 ?20 ?30 ?40 1.50 1.00 0.50 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4 .0 time ( s) i out , output current (a) output voltage deviation (mv) figure 12. load transient from 10 ma to 1.5 a figure 13. load transient from 1.5 a to 10 ma 50 40 30 20 10 0 1.50 1.00 0.50 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 .6 time ( s) i out , output current (a) output voltage deviation (mv) figure 14. load transient from 1.5 a to 10 ma v in = 4.59 v v out = 0.9 v v in = 4.59 v v out = 0.9 v v in = 4.59 v v out = 0.9 v v in = 4.59 v v out = 0.9 v 100 ?50
ncp565/ncv565 http://onsemi.com 7 typical characteristics 100 90 80 70 60 50 40 30 20 10 0 start 1.0 khz stop 100 khz noise density (nv rms / hz ) frequency (khz) figure 15. noise density vs. frequency 100 90 80 70 60 50 40 30 20 10 0 start 1.0 khz stop 100 khz frequency (khz) figure 16. noise density vs. frequency v in = 3.0 v v out = 0.9 v i out = 10 ma v in = 3.0 v v out = 0.9 v i out = 1.5 a noise density (nv rms / hz ) figure 17. output capacitor esr stability vs. output current 250 0 750 500 1000 1500 1250 1 10 100 1000 output current (ma) esr ( ) c out = 10 f fixed 3.3v stable unstable
ncp565/ncv565 http://onsemi.com 8 application information the ncp565 low dropout linear regulator provides adjustable voltages at currents up to 1.5 a. it features ultra fast transient response and low dropout voltage. these devices contain output current limiting, short circuit protection and thermal shutdown protection. input, output capacitor and stability an input bypass capacitor is recommended to improve transient response or if the regulator is located more than a few inches from the power source. this will reduce the circuit?s sensitivity to the input line impedance at high frequencies and significantly enhance the output transient response. different types and different sizes of input capacitors can be chosen dependent on the quality of power supply. a 150 f oscon 16sa150m type from sanyo should be adequate for most applications. the bypass capacitor should be mounted with shortest possible lead or track length directly across the regulator?s input terminals. the output capacitor is required for stability. the ncp565 remains stable with ceramic, tantalum, and aluminum? electrolytic capacitors with a minimum value of 1.0 f as long as the esr remains between 50 m and 2.5 . the ncp565 is optimized for use with a 150 f oscon 16sa150m type in parallel with a 10 f oscon 10sl10m type from sanyo. the 10 f capacitor is used for best ac stability while 150 f capacitor is used for achieving excellent output transient response. the output capacitors should be placed as close as possible to the output pin of the device. if not, the excellent load transient response of ncp565 will be degraded. adjustable operation the typical application circuit for the adjustable output regulators is shown in figure 1. the adjustable device develops and maintains the nominal 0.9 v reference voltage between adj and ground pins. a resistor divider network r1 and r2 causes a fixed current to flow to ground. this current creates a voltage across r1 that adds to the 0.9 v across r2 and sets the overall output voltage. the output voltage is set according to the formula: v out v ref r1 r2 r2 i adj r2 the adjust pin current, iadj, is typically 30 na and normally much lower than the current flowing through r1 and r2, thus it generates a small output voltage error that can usually be ignored. load transient measurement large load current changes are always presented in microprocessor applications. therefore good load transient performance is required for the power stage. ncp565 has the feature of ultra fast transient response. its load transient responses in figures 11 through 14 are tested on evaluation board shown in figure 18. on the evaluation board, it consists of ncp565 regulator circuit with decoupling and filter capacitors and the pulse controlled current sink to obtain load current transitions. the load current transitions are measured by current probe. because the signal from current probe has some time delay, it causes un?synchronization between the load current transition and output voltage response, which is shown in figures 11 through 14. ncp565 evaluation board gen gnd v rl gnd scope voltage probe + + pulse figure 18. schematic for transient response measurement v out ?v cc v in
ncp565/ncv565 http://onsemi.com 9 pcb layout considerations good pcb layout plays an important role in achieving good load transient performance. because it is very sensitive to its pcb layout, particular care has to be taken when tackling printed circuit board (pcb) layout. the figures below give an example of a layout where parasitic elements are minimized. for microprocessor applications it is customary to use an output capacitor network consisting of several capacitors in parallel. this reduces the overall esr and reduces the instantaneous output voltage drop under transient load conditions. the output capacitor network should be as close as possible to the load for the best results. the schematic of ncp565 typical application circuit, which this pcb layout is base on, is shown in figure 19 . the output voltage is set to 3.3 v for this demonstration board according to the feedback resistors in the table 1. figure 19. schematic of ncp565 typical application circuit v in v out ncp565 gnd adj c 1 150 r 2 15.8 k v out v in gnd c 2 150 nc c 4 10 c 3 150 gnd c 3 150 c 6 5.6 p r 1 42.2 k 2 1 3 5 4 figure 20. top layer
ncp565/ncv565 http://onsemi.com 10 figure 21. bottom layer figure 22. silkscreen layer d1 c1 c2 c3 c4 c5 c6 gnd r1 r2 gnd vin vout ncp565 on semiconductor www.onsemi.com july, 2003 table 1. bill of materials for ncp565 adj demonstration board item used # component designators suppliers part number 1 4 radial lead aluminum capacitor 150 f/16 v c1, c2, c3, c5 sanyo oscon 16sa150m 2 1 radial lead aluminum capacitor 10 f/10 v c4 sanyo oscon 10sl10m 3 1 smt chip resistor (0805) 15.8 k 1% r2 vishay crcw08051582f 4 1 smt chip resistor (0805) 42.2 k 1% r1 vishay crcw08054222f 5 1 smt ceramic capacitor (0603) 5.6 pf 10% c6 vishay vj0603a5r6kxaa 6 1 ncp565 low dropout linear regulator u1 on semiconductor ncp565d2tr4
ncp565/ncv565 http://onsemi.com 11 protection diodes when large external capacitors are used with a linear regulator it is sometimes necessary to add protection diodes. if the input voltage of the regulator gets shorted, the output capacitor will discharge into the output of the regulator. the discharge current depends on the value of the capacitor, the output voltage and the rate at which v in drops. in the ncp565 linear regulator, the discharge path is through a large junction and protection diodes are not usually needed. if the regulator is used with large values of output capacitance and the input voltage is instantaneously shorted to ground, damage can occur. in this case, a diode connected as shown in figure 23 is recommended. v in v out ncp565 gnd adj c 1 c adj r 1 r 2 1n4002 (optional) c 2 v out figure 23. protection diode for large output capacitors v in thermal considerations this series contains an internal thermal limiting circuit that is designed to protect the regulator in the event that the maximum junction temperature is exceeded. this feature provides protection from a catastrophic device failure due to accidental overheating. it is not intended to be used as a substitute for proper heat sinking. the maximum device power dissipation can be calculated by: p d t j(max) t a r ja figure 24. thermal resistance 0 50 100 150 200 250 300 350 400 450 50 0 40 60 80 100 120 140 160 180 copper heat?spreader area (mm sq) ja ( c/w) 200 dfn 1 oz cu dfn 2 oz cu sot?223 1 oz cu sot?223 2 oz cu d 2 pak 1 oz cu d 2 pak 2 oz cu
ncp565/ncv565 http://onsemi.com 12 ordering information device nominal output voltage* package shipping ? ncp565d2t adj d 2 pak 50 units / tube ncp565d2tg d 2 pak (pb?free) ncp565d2tr4 d 2 pak 800 / tape & reel ncp565d2tr4g d 2 pak (pb?free) ncp565mnadjt2g dfn6 (pb?free) 3000 / tape & reel ncp565d2t12 fixed (1.2 v) d 2 pak 50 units / tube ncp565d2t12g d 2 pak (pb?free) ncp565d2t12r4 d 2 pak 800 / tape & reel ncp565d2t12r4g d 2 pak (pb?free) ncp565mn12t2g dfn6 (pb?free) 3000 / tape & reel ncp565st12t3g sot?223 (pb?free) 4000 / tape & reel NCP565D2T33G fixed (3.3 v) d 2 pak (pb?free) 50 units / tube ncp565d2t33r4g d 2 pak (pb?free) 800 / tape & reel ncp565mn33t2g dfn6 (pb?free) 3000 / tape & reel ncv565d2tg adj d 2 pak (pb?free) 50 units / tube ncv565d2tr4g 800 / tape & reel *for other fixed output versions, please contact the factory. ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp565/ncv565 http://onsemi.com 13 package dimensions d 2 pak?3 d2t suffix case 936?03 issue b 5 ref 5 ref v u terminal 4 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 4. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 f 0.051 ref 1.295 ref g 0.100 bsc 2.540 bsc h 0.539 0.579 13.691 14.707 j 0.125 max 3.175 max k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min a 12 3 k f b j s h d g c m 0.010 (0.254) t e m l p n r ?t? optional chamfer 8.38 0.33 1.016 0.04 17.02 0.67 10.66 0.42 3.05 0.12 5.08 0.20 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
ncp565/ncv565 http://onsemi.com 14 package dimensions 5 ref a 123 k b s h d g c e m l p n r v u terminal 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 6. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 g 0.067 bsc 1.702 bsc h 0.539 0.579 13.691 14.707 k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r 5 ref s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min 45 m 0.010 (0.254) t ?t? optional chamfer 8.38 0.33 1.016 0.04 16.02 0.63 10.66 0.42 3.05 0.12 1.702 0.067 5?lead d 2 pak scale 3:1 mm inches d 2 pak 5 case 936a?02 issue c soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
ncp565/ncv565 http://onsemi.com 15 package dimensions sot?223 (to?261) case 318e?04 issue l *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 6. dimensioning and tolerancing per ansi y14.5m, 1982. 7. controlling dimension: inch. h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079
ncp565/ncv565 http://onsemi.com 16 package dimensions dfn6, 3x3.3, 0.95 pitch case 506ax?01 issue o *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* ???? ???? ???? c 0.15 2x 2x top view d e c 0.15 notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. e2 bottom view b 0.10 6x l 13 0.05 c ab c d2 4x e l1 64 6x 6x (a3) c c 0.08 6x c 0.10 side view a1 a seating plane dim min nom max millimeters a 0.80 ??? 0.90 a1 0.00 ??? 0.05 a3 0.20 ref b 0.30 ??? 0.40 d 3.00 bsc d2 1.90 ??? 2.10 e 3.30 bsc e2 1.10 ??? 1.30 e 0.95 bsc k 0.20 ??? ??? l 0.40 ??? 0.60 (note 3) k l1 0.00 ??? 0.15 6x 0.83 2.15 1.35 1 0.50 0.95 pitch 3.60 dimensions: millimeters 6x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 ncp565/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative the product described herein (ncp565), may be covered by one or more of the following u.s. patents: 5,920,184; 5,834,926. there may be other patents pending.

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