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  rev.2.00 jun. 28, 2004 page 1 of 9 hd74lv541a octal buffers / drivers with 3-state outputs rej03d0213?0200z (previous ade-205-278 (z)) rev.2.00 jun. 28, 2004 description the hd74lv541a has eight line drivers with thr ee state outputs in a 20 pin package. when oe1 and oe2 is low level, this drivers set up output is enable. low-voltage operation is suitable for battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. features ? v cc = 2.0 v to 5.5 v operation ? all inputs v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) ? all outputs v o (max.) = 5.5 v (@v cc = 0 v) ? typical v ol ground bounce < 0.8 v (@v cc = 3.3 v, ta = 25c) ? typical v oh undershoot > 2.3 v (@v cc = 3.3 v, ta = 25c) ? output current 8 ma (@v cc = 3.0 v to 3.6 v), 16 ma (@v cc = 4.5 v to 5.5 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) hd74lv541afpel sop?20 pin (jeita) fp?20dav fp el (2,000 pcs/reel) hd74lv541arpel sop?20 pin (jedec) fp?20dbv rp el (1,000 pcs/reel) HD74LV541ATELL tssop?20 pin ttp?20dav t ell (2,000 pcs/reel) note: please consult the sales office for the above package availability. function table inputs oe1 oe2 a output y llll llhh hxxz xhxz note: h: high level l: low level x: immaterial z: high impedance
hd74lv541a rev.2.00 jun. 28, 2004 page 2 of 9 pin arrangement 17 18 15 16 19 20 11 12 13 14 v cc oe 2 y1 y2 y3 y4 1 2 3 4 5 6 7 8 9 10 oe1 a1 a2 a3 a4 a5 a6 gnd a7 a8 y5 y6 y7 y8 (top view) absolute maximum ratings item symbol ratings unit conditions supply voltage range v cc ?0.5 to 7.0 v input voltage range* 1 v i ?0.5 to 7.0 v ?0.5 to v cc + 0.5 output: h or l output voltage range* 1, 2 v o ?0.5 to 7.0 v v cc : off or output: z input clamp current i ik ?20 ma v i < 0 output clamp current i ok 50 ma v o < 0 or v o > v cc continuous output current i o 35 ma v o = 0 to v cc continuous current through v cc or gnd i cc or i gnd 70 ma 835 sop maximum power dissipation at ta = 25c (in still air)* 3 p t 757 mw tssop storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 5.5 v maximum. 3. the maximum package power dissipation was calculated using a junction temperature of 150c.
hd74lv541a rev.2.00 jun. 28, 2004 page 3 of 9 recommended operating conditions item symbol min max unit conditions supply voltage range v cc 2.0 5.5 v input voltage range v i 05.5v 0v cc h or l output voltage range v o 05.5 v high impedance state ? ?50 av cc = 2.0 v ??2 v cc = 2.3 to 2.7 v ??8 v cc = 3.0 to 3.6 v i oh ? ?16 ma v cc = 4.5 to 5.5 v ?50 av cc = 2.0 v ?2 v cc = 2.3 to 2.7 v ?8 v cc = 3.0 to 3.6 v output current i ol ?16 ma v cc = 4.5 to 5.5 v 0 200 v cc = 2.3 to 2.7 v 0 100 v cc = 3.0 to 3.6 v input transition rise or fall rate ? t / ? v 020 ns/v v cc = 4.5 to 5.5 v operating free-air temperature ta ?40 85 c note: unused or floating inputs must be held high or low. logic diagram to seven other channels a1 y1 o e2 o e1 218 1 19
hd74lv541a rev.2.00 jun. 28, 2004 page 4 of 9 dc electrical characteristics ta = ?40 to 85c item symbol v cc (v) * min typ max unit test conditions 2.0 1.5 ? ? 2.3 to 2.7 v cc 0.7 ? ? 3.0 to 3.6 v cc 0.7 ? ? v ih 4.5 to 5.5 v cc 0.7 ? ? 2.0 ? ? 0.5 2.3 to 2.7 ? ? v cc 0.3 3.0 to 3.6 ? ? v cc 0.3 input voltage v il 4.5 to 5.5 ? ? v cc 0.3 v min to max v cc ? 0.1 ? ? i oh = ?50 a 2.3 2.0 ? ? i oh = ?2 ma 3.0 2.48 ? ? i oh = ?8 ma v oh 4.5 3.8 ? ? i oh = ?16 ma min to max ? ? 0.1 i ol = 50 a 2.3 ? ? 0.4 i ol = 2 ma 3.0 ? ? 0.44 i ol = 8 ma output voltage v ol 4.5 ? ? 0.55 v i ol = 16 ma input current i in 0 to 5.5 ? ? 1 av in = 5.5 v or gnd off-state output current i oz 5.5 ? ? 5 av o = v cc or gnd quiescent supply current i cc 5.5 ? ? 20 av in = v cc or gnd, i o = 0 output leakage current i off 0??5 av i or v o = 0 v to 5.5 v input capacitance c in 3.3 ? 3 ? pf v i = v cc or gnd note: for conditions shown as min or max, use the appr opriate values under recommended operating conditions.
hd74lv541a rev.2.00 jun. 28, 2004 page 5 of 9 switching characteristics v cc = 2.5 0.2 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 7.3 11.3 1.0 13.5 c l = 15 pf propagation delay time t plh t phl ? 8.9 15.9 1.0 18.5 ns c l = 50 pf ay ? 8.5 16.6 1.0 19.5 c l = 15 pf enable time t zh t zl ? 10.5 20.7 1.0 24.0 ns c l = 50 pf oe y ? 8.4 13.1 1.0 15.0 c l = 15 pf disable time t hz t lz ? 10.5 17.9 1.0 20.0 ns c l = 50 pf oe y v cc = 3.3 0.3 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 5.2 7.0 1.0 8.5 c l = 15 pf propagation delay time t plh t phl ? 6.5 10.5 1.0 12.0 ns c l = 50 pf ay ? 6.1 10.5 1.0 12.5 c l = 15 pf enable time t zh t zl ? 8.0 14.0 1.0 16.0 ns c l = 50 pf oe y ? 5.8 11.0 1.0 12.0 c l = 15 pf disable time t hz t lz ? 7.0 15.4 1.0 17.5 ns c l = 50 pf oe y v cc = 5.0 0.5 v ta = 25c ta = ?40 to 85c item symbol min typ max min max unit test conditions from (input) to (output) ? 3.9 5.0 1.0 6.0 c l = 15 pf propagation delay time t plh t phl ? 4.7 7.0 1.0 8.0 ns c l = 50 pf ay ? 4.3 7.2 1.0 8.5 c l = 15 pf enable time t zh t zl ? 6.3 9.2 1.0 10.5 ns c l = 50 pf oe y ? 3.9 7.5 1.0 8.0 c l = 15 pf disable time t hz t lz ? 5.3 8.8 1.0 10.0 ns c l = 50 pf oe y output-skew characteristics ta = 25c ta = ?40 to 85c item symbol v cc = (v) min max min max unit 2.3 to 2.7 ? 2.0 ? 2.0 3.0 to 3.6 ? 1.5 ? 1.5 output skew t sk (o) 4.5 to 5.5 ? 1.0 ? 1.0 ns note: skew between any outputs of the same package switchi ng in the same direction. this parameter is warranted but not production tested.
hd74lv541a rev.2.00 jun. 28, 2004 page 6 of 9 operating characteristics c l = 50 pf ta = 25c item symbol v cc = (v) min typ max unit test conditions 3.3 ? 23.5 ? power dissipation capacitance c pd 5.0 ? 27.7 ? pf f = 10 mhz noise characteristics c l = 50 pf ta = 25c item symbol v cc = (v) min typ max unit test conditions quiet output, maximum dynamic v ol v ol (p) 3.3 ? 0.4 0.8 v quiet output, minimum dynamic v ol v ol (v) 3.3 ? ?0.3 ?0.8 v quiet output, minimum dynamic v oh v oh (v) 3.3 ? 2.9 ? v high-level dynamic input voltage v ih (d) 3.3 2.31??v low-level dynamic input voltage v il (d) 3.3 ? ? 0.99 v test circuit open gnd c 1 k ? v cc v cc s2 l output test s2 t /t plh phl open gnd t /t zh hz t /t zl lz note: c includes the probe and jig capacitance. l
hd74lv541a rev.2.00 jun. 28, 2004 page 7 of 9 v ? 0.3 v oh v + 0.3 v ol t zl t lz t zh t hz t f t r 90% 10% 90% 10% v oh v ol gnd t plh t phl v oh v cc v cc v cc gnd v ol input a 10% gnd 90% t r t f 90% 10% input oe waveform ? a waveform ? b output y 50%v cc 50%v cc 50%v cc 50%v cc 50%v cc 50%v cc 50%v cc 50%v cc ? waveform 1. tr 3 ns, tf 3 ns 2. input waveform: prr 1 mhz, duty cycle 50% 3. waveform ? a is for an output with internal conditions such that the output is low except when disabled by the output control. 4. waveform ? b is for an output with internal conditions such that the output is high except when disabled by the output control. notes:
hd74lv541a rev.2.00 jun. 28, 2004 page 8 of 9 package dimensions package code jedec jeita mass (reference value) fp?20dav ? conforms 0.31 g *pd plating *0.40 0.06 0.12 0.15 m 20 10 1 *0.20 0.05 0.80 max 11 12.6 5.5 2.20 max 13 max 0 ? ? 8 ? 0.70 0.20 + 0.20 ? 0.30 7.80 1.27 0.10 0.10 1.15 as of january, 2002 unit: mm package code jedec jeita mass (reference value) fp-20dbv conforms ? 0.52 g *ni/pd/au plating 0.12 0.15 0 ? ? 8 ? m 20 11 0.20 0.10 1 1.27 10 12.8 13.2 max 7.50 2.65 max *0.25 0.05 *0.40 0.06 + 0.57 ? 0.30 0.70 + 0.25 ? 0.40 10.40 1.45 0.935 max as of january, 2003 unit: mm
hd74lv541a rev.2.00 jun. 28, 2004 page 9 of 9 package code jedec jeita mass (reference value) ttp?20dav ? ? 0.07 g *pd plating 0.50 0.10 0? ? 8? *0.15 0.05 6.40 0.20 0.10 1.10 max 0.13 m 0.65 110 20 11 4.40 6.50 6.80 max *0.20 0.05 0.07 +0.03 ?0.04 1.0 0.65 max as of january, 2002 unit: mm
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi als. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 2004. renesas technology corp., all rights reserved. printed in japan. c olophon .1 .0


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