information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad632 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: www.analog.com fax: ? analog devices, inc., internally trimmed precision ic multiplier pin configurations h-package to-100 d-package product description the ad632 is an internally-trimmed monolithic four-quadrant multiplier/divider. the ad632b has a maximum multiplying error of 0.5% without external trims. excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse condi- tions. the simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control func- tions. the ad632 is pin-for-pin compatible with the industry standard ad532 with improved specifications and a fully differential high impedance z-input. the ad632 is capable of providing gains of up to x10, frequently eliminating the need for separate instru- mentation amplifiers to precondition the inputs. the ad632 can be effectively employed as a variable gain differential input amplifier with high common-mode rejection. the effectiveness of the variable gain capability is enhanced by the inherent low noise of the ad632: 90 m v rms. features pretrimmed to 0.5% max 4-quadrant error all inputs (x, y and z) differential, high impedance for [(x 1 Cx 2 )(y 1 Cy 2 )/10] + z 2 transfer function scale-factor adjustable to provide up to x10 gain low noise design: 90 m v rms, 10 hzC10 khz low cost, monolithic construction excellent long-term stability applications high quality analog signal processing differential ratio and percentage computations algebraic and trigonometric function synthesis accurate voltage controlled oscillators and filters product highlights guaranteed performance over temperature the ad632a and ad632b are specified for maximum multi- plying errors of 1.0% and 0.5% of full scale, respectively at +25 c and are rated for operation from C25 c to +85 c. maximum multiplying errors of 2.0% (ad632s) and 1.0% (ad632t) are guaranteed over the extended temperature range of C55 c to +125 c. high reliability the ad632s and ad632t series are also available with mil-std-883 level b screening and all devices are available in either the hermetically-sealed to-100 metal can or ceramic dip package. rev. b
C2C ad632Cspecifications (@ +25 8 c, v s = 15 v, r 3 2 k v unless otherwise noted) ad632a ad632b ad632s ad632t model min typ max min typ max min typ max min typ max units multiplier performance transfer function ( x 1 - x 2 )( y 1 - y 2 ) 10 v + z 2 ( x 1 - x 2 )( y 1 - y 2 ) 10 v + z 2 ( x 1 - x 2 )( y 1 - y 2 ) 10 v + z 2 ( x 1 - x 2 )( y 1 - y 2 ) 10 v + z 2 total error 1 (C10 v x, y +10 v) 6 1.0 6 0.5 6 1.0 6 0.5 % t a = min to max 6 1.5 6 1.0 6 2.0 6 1.0 % total error vs. temperature 0.022 0.015 6 0.02 6 0.01 %/ c scale factor error (sf = 10.000 v nominal) 2 0.25 0.1 0.25 0.1 % temperature-coefficient of scaling-voltage 0.02 6 0.01 0.2 6 0.005 %/ c supply rejection ( 15 v 1 v) 0.01 0.01 0.01 0.01 % nonlinearity, x (x = 20 v p-p, y = 10 v) 0.4 0.2 0.3 0.4 0.2 0.3 % nonlinearity, y (y = 20 v p-p, x = 10 v) 0.2 0.1 0.1 0.2 0.1 0.1 % feedthrough 3 , x (y nulled, x = 20 v p-p 50 hz) 0.3 0.15 0.3 0.3 0.15 0.3 % feedthrough 3 , y (x nulled, y = 20 v p-p 50 hz) 0.01 0.01 0.1 0.01 0.01 0.1 % output offset voltage 5 6 30 2 15 5 6 30 2 15 mv output offset voltage drift 200 100 500 300 m v/ c dynamics small signal bw, (v out = 0.1 rms) 1111mhz 1% amplitude error (c load = 1000 pf) 50 50 50 50 khz slew rate (v out 20 p-p) 20 20 20 20 v/ m s settling time (to 1%, d v out = 2 0 v )2222 m s noise noise spectral-density sf = 10 v 0.8 0.8 0.8 0.8 m v/ ? hz sf = 3 v 4 0.4 0.4 0.4 0.4 m v/ ? hz wideband noise a = 10 hz to 5 mhz 1.0 1 .0 1.0 1.0 mv rms p = 10 hz to 10 khz 90 90 90 90 m v/rms output output voltage swing 6 11 6 11 6 11 6 11 v output impedance (f 1 khz) 0.1 0.1 0.1 0.1 w output short circuit current (r l = 0, t a = min to max) 30 30 30 30 ma amplifier open loop gain (f = 50 hz) 70 70 70 70 db input amplifiers (x, y and z) 5 signal voltage range (diff. or cm 10 10 10 10 v operating diff.) 12 12 12 12 v offset voltage x, y 5 6 20 2 6 10 5 6 20 2 6 10 mv offset voltage drift x, y 100 50 100 150 m v/ c offset voltage z 5 6 30 2 6 15 5 6 30 2 6 15 mv offset voltage drift z 200 100 500 300 m v/ c cmrr 60 80 70 90 60 80 70 90 db bias current 0.8 2.0 0.8 2.0 0.8 2.0 0.8 2.0 m a offset current 0.1 0. i 0.1 0.1 m a differential resistance 10 10 1 0 10 m w divider performance transfer function (x 1 > x 2 ) 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 total error 1 (x = 10 v, C10 v z +10 v) 0.75 0.35 0.75 0.35 % (x = 1 v, C1 v z +1 v) 2.0 1.0 2.0 1.0 % (0.1 v x 10 v, C10 v z 10 v) 2.5 1.0 2.5 1.0 % squarer performance transfer function ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 total error (C10 v x 10 v) 0.6 0.3 0.6 0.3 % s quare-rooter performance transfer function, (z 1 z 2 ) 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 total error 1 (1 v z 10 v) 1.0 0.5 1.0 0.5 % rev. b
C3C ad632 ad632a ad632b ad632s ad632t model min typ max min typ max min typ max min typ max units power supply specifications supply voltage rated performance 15 15 15 15 v operating 8 6 18 8 6 18 8 6 22 8 6 22 v supply current quiescent 4 6 46 4 6 46 ma notes 1 figures given are percent of full-scale, l0 v (i.e., 0.01% = 1 mv). 2 may be reduced to 3 v using external resistor between Cv s and sf. 3 irreducible component due to nonlinearity: excludes effect of offsets. 4 using external resistor adjusted to give sf = 3 v. 5 see functional block diagram for definition of sections. all min and max specifications are guaranteed. specifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. specifications subject to change without notice. chip dimensions and pad layout dimensions shown in inches and (mm). (contact factory for latest dimensions.) for further information, consult factory. thermal characteristics thermal resistance q jc = 25 c/w for h-10 q ja = 150 c/w for h-10 q jc = 25 c/w for d-14 q ja = 95 c/w for d-14 rev. b
ad632 C4C typical performance curves (typical @ +25 8 c with 6 v s = 15 v) figure 1. ac feedthrough vs. frequency figure 2. frequency response as a multiplier figure 3. frequency response vs. divider denominator input voltage figure 4. ad632 functional block diagram operation as a multiplier figure 5 shows the basic connection for multiplication. note that the circuit will meet all specifications without trimming. figure 5. basic multiplier connection in some cases the user may wish to reduce ac feedthrough to a minimum (as in a suppressed carrier modulator) by applying an external trim voltage ( 30 mv range required) to the x or y input. curve 1 shows the typical ac feedthrough with this ad- justment mode. note that the feedthrough of the y input is a factor of 10 lower than that of the x input and should be used in applications where null suppression is critical. the z 2 terminal of the ad632 may be used to sum an addi- tional signal into the output. in this mode the output amplifier behaves as a voltage follower with a 1 mhz small signal band- width and a 20 v/ m s slew rate. this terminal should always be referenced to the ground point of the driven system, particularly if this is remote. likewise the differential inputs should be refer- enced to their respective signal common potentials to realize the full accuracy of the ad632. a much lower scaling voltage can be achieved without any re- duction of input signal range using a feedback attenuator as shown in figure 6. in this example, the scale is such that v out = xy, so that the circuit can exhibit a maximum gain of 10. this connection results in a reduction of bandwidth to about 80 khz without the peaking capacitor c f . in addition, the output offset voltage is increased by a factor of 10 making exter- nal adjustments necessary in some applications. rev. b
ad632 C5C feedback attenuation also retains the capability for adding a signal to the output. signals may be applied to the z terminal, where they are amplified by C10, or to the common ground connection where they are amplified by C1. input signals may also be applied to the lower end of the 2.7 k w resistor, giving a gain of +9. figure 6. connections for scale-factor of unity operation as a divider figure 7 shows the connection required for division. unlike earlier products, the ad632 provides differential operation on both numerator and denominator, allowing the ratio of two floating variables to be generated. further flexibility results from access to a high impedance summing input to y 1 . as with all dividers based on the use of a multiplier in a feedback loop, the bandwidth is proportional to the denominator magnitude, as shown in figure 3. figure 7. basic divider connection without additional trimming, the accuracy of the ad632b is sufficient to maintain a 1% error over a 10 v to 1 v denomina- tor range (the ad535 is functionally equivalent to the ad632 and has guaranteed performance in the divider and square-rooter configurations and is recommended for such applications). this range may be extended to 100:1 by simply reducing the x offset with an externally generated trim voltage (range required is 3.5 mv max) applied to the unused x input. to trim, apply a ramp of +100 mv to +v at 100 hz to both x 1 and z 1 (if x 2 is used for offset adjustment, otherwise reverse the signal polarity) and adjust the trim voltage to minimize the variation in the output.* since the output will be near +10 v, it should be ac-coupled for this adjustment. the increase in noise level and reduction in bandwidth preclude operation much beyond a ratio of 100 to 1. *see the ad535 data sheet for more details. rev. b
ad632 -6- rev. b outline dimensions controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. dimensions per jedec standards mo-006-af 0.500 (12.70) min 0.185 (4.70) 0.165 (4.19) reference plane 0.050 (1.27) max 0.040 (1.02) max 0.335 (8.51) 0.305 (7.75) 0.370 (9.40) 0.335 (8.51) 0.021 (0.53) 0.016 (0.40) 1 0.034 (0.86) 0.025 (0.64) 0.045 (1.14) 0.025 (0.65) 0.160 (4.06) 0.110 (2.79) 6 2 8 7 5 4 3 0.115 (2.92) bsc 9 10 0.230 (5.84) bsc base & seating plane 36 bsc 022306-a figure 8. 14-lead side -brazed ceramic dual in-line package [sbdip] (d-14) dimensions shown in inches and (millimeters) c ontrolling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents fo r reference only and are not appropriate for use in design . 14 1 7 8 0.310 (7.87) 0.220 (5.59) pin 1 0.080 (2.03) max 0.005 (0.13) min seating plane 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) max 0.200 (5.08) 0.125 (3.18) 0.070 (1.78) 0.030 (0.76) 0.100 (2.54) bsc 0.150 (3.81) min 0.765 (19.43) max 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) figure 9. 10-pin metal header package [to-100] (h-10) dimensions shown in inches and (millimeters) ordering guide model 1 temperature range package description package option ad632ad ?25c to +85c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 ad632adz ?25c to +85c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 ad632ah ?25c to +85c 10-pin metal header package [to-100] h-10 ad632ahz ?25c to +85c 10-pin metal header package [to-100] h-10 ad632bd ?25c to +85c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 AD632BDZ ?25c to +85c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 ad632bh ?25c to +85c 10-pin metal header package [to-100] h-10 ad632bhz ?25c to +85c 10-pin metal header package [to-100] h-10 ad632sd ?55c to +125c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 ad632sh ?55c to +125c 10-pin metal header package [to-100] h-10 ad632sh/883b ?55c to +125c 10-pin metal header package [to-100] h-10 ad632td ?55c to +125c 14-lead side-brazed ceramic dual in-line package [sbdip] d-14 ad632td/883b ?55c to +125c 14-lead side-braze d ceramic dual in-line package [sbdip] d-14 ad632th ?55c to +125c 10-pin metal header package [to-100] h-10 ad632th/883b ?55c to +125c 10-pin metal header package [to-100] h-10 1 z = rohs compliant part.
ad632 rev. b -7- revision history changes to pin configurations and product highlights section ................................................................................................ 1 changes to thermal characteristics section ................................ 3 updated outline dimensions .......................................................... 6 changes to ordering guide ............................................................. 6 ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d09040-0-4/10(b)
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