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M35052-XXXSP/fp screen character and pattern display controllers mitsubishi microcomputers description the M35052-XXXSP/fp is tv screen display control ic which can be used to display information such as number of channels, the date and messages and program schedules on the tv screen. in particular, owing to the built-in sync-sep (synchronous separa- tion) circuit, the synchronous correction circuit, the decoder circuit, and to the encoder circuit, external circuits can be decrease and character turbulence that occurs when superimposing can be reduced. the processor can conform to the eds broadcast service and is suit- able for av systems such as vtrs, lds, and so on. it is a silicon gate cmos process and M35052-XXXSP is housed in a 20-pin shrink dip package, m35052-xxxfp is housed in a 20-pin shrink sop package. for m35052-001sp/fp that is a standard rom version of m35052- xxxsp/fp respectively, the character pattern is also mentioned. features screen composition .............................. 24 characters ? 10 lines, 32 characters ? 7 lines number of characters displayed .................................. 240 (max.) character composition ..................................... 12 ? 18 dot matrix characters available ............................................. 128 characters character sizes available .................... 4 (horizontal) ? 4 (vertical) display locations available horizontal direction ............................................... 240 locations vertical direction ................................................... 256 locations blinking ................................................................. character units cycle : approximately 1 second, or approximately 0.5 seconds duty : 25%, 50%, or 75% data input .............................. by the serial input function (16 bits) coloring background coloring (composite video signal) blanking total blanking (14 ? 18 dots) border size blanking character size blanking synchronizing signal composite synchronizing signal generation (pal, ntsc, m-pal) 2 output ports (1 digital line) oscillation stop function it is possible to stop the oscillation for synchronizing signal generation built-in half-tone display function built-in reversed character display function built-in decoder (ntsc only) built-in encoder (ntsc only) built-in synchronous correction circuit built-in synchronous separation circuit application tv, vcr, movie pin configuration (top view) rev.1.2 m 3 5 0 5 2 - x x x f p cp1 testa cs sck sin ac v dd2 cvideo lecha cvin v d d 1 h o r c p 2 o s c i n v s s p 1 p 0 t e s t b e d o v s s m 3 5 0 5 2 - xxxsp 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 cp1 testa cs sck sin ac v dd2 cvideo lecha cvin v d d 1 h o r c p 2 o s c i n v s s p 1 p 0 e d o v s s o u t l i n e 2 0 p 4 b o u t l i n e 2 0 p 2 q - a testb 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 ? ?
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 2 pin description function this is the filter output pin 1. this is the pin for test. connect this pin to gnd during normal operation. this is the chip select pin, and when serial data transmission is being carried out, it goes to l. hysteresis input. includes built-in pull-up resistor. __ when cs pin is l, sin serial data is taken in when sck rises. hysteresis input. built-in pull-up resistor is included. this is the pin for serial input of data and addresses for the display control register and the display data memory. also, serially outputs decode data according to the settings in the relevant registers (serial i/o). when l, this pin resets the internal ic circuit. hysteresis input. includes built-in pull-up resistor. please connect to +5v with the analog circuit power pin. this is the output pin for composite video signals. it outputs 2v p-p composite video signals. in superimpose mode, character output etc. is superimposed on the external composite video signals from cvin. this is the input pin which determines the white character color level in the composite video signal. this is the input pin for external composite video signals. in superimpose mode, character output etc. is superimposed on these external composite video signals. please connect to gnd using circuit earthing pin. this is the output pin for encode data. it outputs three-valve data. this is the pin for test. connect this pin to gnd during normal operation. this pin outputs the port output or blnk1 (character background) signal. this pin outputs the port output or co1(character) signal. please connect to gnd using circuit earthing pin (analog side). this is the input pin for the sub-carrier frequency (f sc ) for generating a synchronous signal. a frequency of 3.580mhz is needed for ntsc, and a frequency of 4.434mhz in needed for pal and 3.576mhz is needed for m-pal. filter output pin 2. this is the input pin for external composite video signals. this pin inputs the external video signal clamped sync-chip to 1.5v, and internally carries out synchronous separa- tion. please connect to +5v with the digital circuit power pin. symbol osc1 testa __ cs sck sin __ ac v dd2 cvideo lecha cvin v ss edo testb p0 p1 v ss oscin cp2 hor v dd1 pin name clock input test pin chip select input serial clock input/ output serial data input auto-clear input power pin composite video signal output character level input composite video signal input earthing pin encode data output test pin port p0 output port p1 output earthing pin f sc input pin for synchronous signal generation filter output horizontal synchro- nizing signal input power pin input/ output input input input input/ output input output input input output output output input output input
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 3 block diagram d a t a c o n t r o l c i r c u i t a d d r e s s c o n t r o l c i r c u i t d i s p l a y c o n t r o l r e g i s t e r d i s p l a y r a m d i s p l a y c h a r a c t e r r o m t i m i n g g e n e r a t o r b l i n k i n g c i r c u i t s h i f t r e g i s t e r d i s p l a y c o n t r o l c i r c u i t r e a d i n g a d d r e s s c o n t r o l c i r c u i t h c o u n t e r n t s c p a l m - p a l v i d e o o u t p u t c i r c u i t t i m i n g g e n e r a t o r s y n c - s e p c i r c u i t 3 . 5 8 0 m h z ( n t s c ) 4 . 4 3 4 m h z ( p a l ) 3 . 5 7 6 m h z ( m - p a l ) t e s t a t e s t b p o r t o u t p u t c i r c u i t d e c o d e r c i r c u i t c l o c k o s c i l l a t i o n c i r c u i t d a t a s l i c e r c i r c u i t s c k s i n c s c v i d e o c v i n l e c h a v d d 1 a c v s s v d d 2 h o r p 0 p 1 c p 1 v s s e d o o s c i n c p 2 i / o c o n t r o l c i r c u i t o s c i l l a t i o n c i r c u i t f o r s y n c h r o n i z i n g s i g n a l g e n e r a t i o n d i s p l a y l o c a t i o n d e t e c t i o n c i r c u i t 7 1 6 1 1 2 0 6 1 3 2 5 4 3 1 1 9 1 7 1 8 8 1 0 9 1 2 1 4 1 5
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 4 memory constitution address 00 16 to ef 16 are assigned to the display ram, address f0 16 to f8 16 are assigned to the display control registers. the internal circuit is reset and all display control registers (address f0 16 to f8 16 ) are set to 0 and display ram (address 00 16 to ef 16 ) __ are ram erased when the ac pin level is l. set 0 in any of da7, dad through daf of addresses 00 16 through ef 16 , and of dae and daf of addresses f0 16 through f8 16 . setting the blank code ff 16 as a character code is an exception. testn (n : a number) is mitsubishi test memory, so be sure to observe the setting conditions. da5 c5 c5 sepv1 hp5 vp5 vsz11 dsp5 mpal bg curs5 stop1 daa ec2 ec2 test10 dvp2 evp2 efld0 space test17 test0 test22 ehp2 bit address 00 16 ef 16 f0 16 f1 16 f2 16 f3 16 f4 16 f5 16 f6 16 f7 16 f8 16 daf 0 0 0 0 0 0 0 0 0 0 0 dae 0 0 0 0 0 0 0 0 0 0 0 dad 0 0 test25 test26 test27 test28 test29 test30 test31 test32 level1 dac rev rev _ _ _ _ _ _ _ _ _ _ w/r dvp4 evp4 test12 test14 test19 test2 test24 ehp4 blink test11 dvp3 evp3 efld1 test13 _ _ _ _ _ _ _ _ _ _ _ _ _ _ mb/lb test1 rgbon ehp3 dab blink encode data or character color da9 ec1 ec1 decb1 dvp1 evp1 dfld1 dsp9 test16 lblack _ _ _ _ _ _ _ _ _ _ cl17/18 ehp1 da8 ec0 ec0 decb0 dvp0 evp0 dfld0 dsp8 test15 _ _ _ _ _ _ _ _ lin24/32 cblink ehp0 da7 0 0 sysep1 hp7 vp7 vsz21 dsp7 eqp blkhf curs7 ramers da6 c6 c6 sysep0 hp6 vp6 vsz20 dsp6 palh bb curs6 dspon da4 c4 c4 sepv0 hp4 vp4 vsz10 dsp4 _______ int/non br curs4 stopin da3 c3 c3 ptd1 hp3 vp3 hsz21 dsp3 _ _ _ _ _ _ _ n/p level0 curs3 scor da2 c2 c2 ptd0 hp2 vp2 hsz20 dsp2 blink2 phase2 curs2 ex da1 c1 c1 ptc1 hp1 vp1 hsz11 dsp1 blink1 phase1 curs1 blk1 da0 c0 c0 ptc0 hp0 vp0 hsz10 dsp0 blink0 phase0 curs0 blk0 port output specify and so on display mode specify blinking specify and so on raster color specify cursor display specify control display and so on vertical display start position and encode position specify character size and encode e decode specify horizontal display start position and decode position specify remarks display ram character code reversed character blinking fig. 1 memory constitution (M35052-XXXSP/fp)
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 5 screen constitution the screen lines and rows are determined from each address of the display ram. the screen consitution (24 characters 5 10 lines) is shown in figure 2 the screen constitution (32 characters 5 7 lines) is shown in 3. note : the hexadecimal numbers in the boxes show the display ram address. 1 2 3 4 5 6 7 8 9 10 1 00 16 18 16 30 16 48 16 60 16 78 16 90 16 a8 16 c0 16 d8 16 2 01 16 19 16 31 16 49 16 61 16 79 16 91 16 a9 16 c1 16 d9 16 3 02 16 1a 16 32 16 4a 16 62 16 7a 16 92 16 aa 16 c2 16 da 16 4 03 16 1b 16 33 16 4b 16 63 16 7b 16 93 16 ab 16 c3 16 db 16 5 04 16 1c 16 34 16 4c 16 64 16 7c 16 94 16 ac 16 c4 16 dc 16 6 05 16 1d 16 35 16 4d 16 65 16 7d 16 95 16 ad 16 c5 16 dd 16 7 06 16 1e 16 36 16 4e 16 66 16 7e 16 96 16 ae 16 c6 16 de 16 8 07 16 1f 16 37 16 4f 16 67 16 7f 16 97 16 af 16 c7 16 df 16 9 08 16 20 16 38 16 50 16 68 16 80 16 98 16 b0 16 c8 16 e0 16 10 09 16 21 16 39 16 51 16 69 16 81 16 99 16 b1 16 c9 16 e1 16 11 0a 16 22 16 3a 16 52 16 6a 16 82 16 9a 16 b2 16 ca 16 e2 16 12 0b 16 23 16 3b 16 53 16 6b 16 83 16 9b 16 b3 16 cb 16 e3 16 13 0c 16 24 16 3c 16 54 16 6c 16 84 16 9c 16 b4 16 cc 16 e4 16 14 0d 16 25 16 3d 16 55 16 6d 16 85 16 9d 16 b5 16 cd 16 e5 16 15 0e 16 26 16 3e 16 56 16 6e 16 86 16 9e 16 b6 16 ce 16 e6 16 16 0f 16 27 16 3f 16 57 16 6f 16 87 16 9f 16 b7 16 cf 16 e7 16 17 10 16 28 16 40 16 58 16 70 16 88 16 a0 16 b8 16 d0 16 e8 16 18 11 16 29 16 41 16 59 16 71 16 89 16 a1 16 b9 16 d1 16 e9 16 19 12 16 2a 16 42 16 5a 16 72 16 8a 16 a2 16 ba 16 d2 16 ea 16 20 13 16 2b 16 43 16 5b 16 73 16 8b 16 a3 16 bb 16 d3 16 eb 16 21 14 16 2c 16 44 16 5c 16 74 16 8c 16 a4 16 bc 16 d4 16 ec 16 22 15 16 2d 16 45 16 5d 16 75 16 8d 16 a5 16 bd 16 d5 16 ed 16 23 16 16 2e 16 46 16 5e 16 76 16 8e 16 a6 16 be 16 d6 16 ee 16 24 17 16 2f 16 47 16 5f 16 77 16 8f 16 a7 16 bf 16 d7 16 ef 16 1 2 3 4 5 6 7 1 00 16 20 16 40 16 60 16 80 16 a0 16 c0 16 2 01 16 21 16 41 16 61 16 81 16 a1 16 c1 16 3 02 16 22 16 42 16 62 16 82 16 a2 16 c2 16 4 03 16 23 16 43 16 63 16 83 16 a3 16 c3 16 5 04 16 24 16 44 16 64 16 84 16 a4 16 c4 16 6 05 16 25 16 45 16 65 16 85 16 a5 16 c5 16 7 06 16 26 16 46 16 66 16 86 16 a6 16 c6 16 8 07 16 27 16 47 16 67 16 87 16 a7 16 c7 16 9 08 16 28 16 48 16 68 16 88 16 a8 16 c8 16 10 09 16 29 16 49 16 69 16 89 16 a9 16 c9 16 11 0a 16 2a 16 4a 16 6a 16 8a 16 aa 16 ca 16 12 0b 16 2b 16 4b 16 6b 16 8b 16 ab 16 cb 16 13 0c 16 2c 16 4c 16 6c 16 8c 16 ac 16 cc 16 14 0d 16 2d 16 4d 16 6d 16 8d 16 ad 16 cd 16 15 0e 16 2e 16 4e 16 6e 16 8e 16 ae 16 ce 16 16 0f 16 2f 16 4f 16 6f 16 8f 16 af 16 cf 16 17 10 16 30 16 50 16 70 16 90 16 b0 16 d0 16 18 11 16 31 16 51 16 71 16 91 16 b1 16 d1 16 19 12 16 32 16 52 16 72 16 92 16 b2 16 d2 16 20 13 16 33 16 53 16 73 16 93 16 b3 16 d3 16 21 14 16 34 16 54 16 74 16 94 16 b4 16 d4 16 22 15 16 35 16 55 16 75 16 95 16 b5 16 d5 16 23 16 16 36 16 56 16 76 16 96 16 b6 16 d6 16 24 17 16 37 16 57 16 77 16 97 16 b7 16 d7 16 25 18 16 38 16 58 16 78 16 98 16 b8 16 d8 16 26 19 16 39 16 59 16 79 16 99 16 b9 16 d9 16 27 1a 16 3a 16 5a 16 7a 16 9a 16 ba 16 da 16 28 1b 16 3b 16 5b 16 7b 16 9b 16 bb 16 db 16 29 1c 16 3c 16 5c 16 7c 16 9c 16 bc 16 dc 16 30 1d 16 3d 16 5d 16 7d 16 9d 16 bd 16 dd 16 31 1e 16 3e 16 5e 16 7e 16 9e 16 be 16 de 16 32 1f 16 3f 16 5f 16 7f 16 9f 16 bf 16 df 16 notes 1. the hexadecimal numbers in the boxes show the display ram address. notes 2. when 32 characters 5 7 lines are displayed, set blank code ff 16 to character code of addresses e0 16 to ef 16 . fig. 3 screen constitution (32 characters 5 7 lines) fig. 2 screen constitution (24 characters 5 10 lines) rows rows lines lines
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 6 status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 da 0~c 0 1 2 3 4 5 6 7 8 9 a b c name c0 (lsb) c1 c2 c3 c4 c5 c6 (msb) ec0 ec1 ec2 blink rev contents function set rom-held character code of a character needed to display. set to 0 during normal operation can not be used when efild1, 0=1, 0 or 0, 1, set code of the data needed to encode. when rgbon=1, set background color by character unit. no blinking blinking normal character reversed character remarks (note 2) refer to encode function. refer to supplemental explanation (4). refer to blink2 to 0 (address f5 16 ) notes __ 1. resetting at the ac pin ram-erases the display ram, and the status turns as indicated by the mark around in the status col umn. 2. set to 1 only when you set a blank code. display ram description display ram address 00 16 to ef 16
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 7 status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d register ptc0 ptc1 ptd0 ptd1 sepv0 sepv1 sysep0 sysep1 decb0 decb1 test10 test11 ____ w/r test25 contents remarks function p0 output (port 0) blnk1 output p1 output (port 1) co1 output it is negative polarity at p0 output l, blink1 output. it is positive polarity at p0 output h, blink1 output. it is negative polarity at p01 output l, co1 output. it is positive polarity at p01 output h, co1 output. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. sysep1 0 0 1 1 sysep0 0 1 0 1 bias potential can not be used. can not be used. 1.75 can not be used. decb1 0 0 1 1 can not be used. it should be fixed to 1. it should be fixed to 0. can not be used. input data from sin pin output data from sin pin (note 2) it should be fixed to 0. can not be used. port output control refer to supplemental explanation (5). control the port data refer to supplemental explanation (5). specifies the vertical synchronous separation criterion refer to supplemental explanation (1). specifies the sync-bias potential specifies the decoding bias potential control data i/o refer to decode data output timing. bias potential 2.35 can not be used. can not be used. can not be used. decb0 0 1 0 1 notes 1. __ the mark around the status value means the reset status by the l level is input to ac pin. notes 2. __ ___ not necessary to release after setting w/r to 1. turn cs to h to switch over to input mode. display control register (1) address f0 16
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 8 function let horizontal display start position be hs, hs = t 5 ( s 2 n hpn+6) t : the oscillation cycle of display clock let the slice lines be dvs, dvs = s 2 n dvpn+6 it should be fixed to 0. can not be used. v s h s h o r v e r t c h a r a c t e r d i s p l a y i n g a r e a status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 register hp0 (lsb) hp1 hp2 hp3 hp4 hp5 hp6 hp7 (msb) dvp0 (lsb) dvp1 dvp2 dvp3 dvp4 (msb) test26 contents remarks set the horizontal display start position by use of hp7 through hp0. hp7 to hp0 = (00000000) to (00001111) setting is forbidden. it can be set this up to 240 steps in increments of one t. set the slice lines (horizontal scanning lines) under decoding by use of dvp4 through dvp0. dvp4 to dvp0 = (00000) to (00011) setting is forbidden. thus, it can be defined a setting up to 26 steps covered by a range from line 10 to line 35. refer to supplemental explanation (2) about slice lines (dvs). da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d (2) address f1 16 7 n=0 4 n=0
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 9 status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 register vp0 (lsb) vp1 vp2 vp3 vp4 vp5 vp6 vp7 (msb) evp0 (lsb) evp1 evp2 evp3 evp4 (msb) test27 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function let vertical display start position be vs, hs = t 5 s 2 n vpn let the encode lines be evs, dvs= s 2 n evpn+6 it should be fixed to 0. can not be used. (3) address f2 16 remarks set the vertical display start position by use of vp7 through vp0. vp7 to vp0 = (00000000) to (00000110) setting is forbidden. it can be set this up to 249 steps in increments of one h. vp7 to vp0 = (00000000) to (00100011) setting is forbidden. sets the lines (horizontal scanning lines) under encoding by use of evp4 through evp0. evp4 to evp0 = (00000) to (00011) setting is forbidden. thus, it can be defined a setting up to 26 steps covered by a range from line 10 to line 35. refer to supplemental explanation (2) about the encode lines (evs). h : the oscillation cycle of horizontal synchronous signal 7 n=0 4 n=0 v s h s h o r v e r t c h a r a c t e r d i s p l a y i n g a r e a
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 10 register hsz10 hsz11 hsz20 hsz21 vsz10 vsz11 vsz20 vsz21 dfld0 dfld1 efild0 efld1 test12 test28 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function hsz11 0 0 1 1 hsz10 0 1 0 1 horizontal direction size 1t/dot 2t/dot 3t/dot 4t/dot hsz21 0 0 1 1 hsz20 0 1 0 1 horizontal direction size 1t/dot 2t/dot 3t/dot 4t/dot vsz11 0 0 1 1 vsz10 0 1 0 1 vertical direction size 1h/dot 2h/dot 3h/dot 4h/dot vsz21 0 0 1 1 vsz20 0 1 0 1 vertical direction size 1h/dot 2h/dot 3h/dot 4h/dot dfld1 0 0 1 1 dfld0 0 1 0 1 field detection off the first field the second field can not be used efld1 0 0 1 1 efld0 0 1 0 1 field detection off the first field the second field can not be used it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (4) address f3 16 remarks character size setting in the horizontal direction for the first line. character size setting in the horizontal direction for the 2nd line to 10th line. character size setting in the vertical direction for the first line. character size setting in the vertical direction for the 2nd line to 10th line. specifies the field determination procedure in relation to the decoding functions. refer to supplemental explanation (2). specifies the field determination procedure in relation to the encoding functions. refer to supplemental explanation (2).
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 11 register dsp0 dsp1 dsp2 dsp3 dsp4 dsp5 dsp6 dsp7 dsp8 dsp9 space test13 test14 test29 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function normal display put a space line between line 2 and line 3, and between line 8 and line 9. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. dspn= 0 matrix-outline size character size border size matrix-outline size blk1 0 0 1 1 blk0 0 1 0 1 dspn= 1 matrix-outline border size border size matrix-outline size character size status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (5) address f4 16 depends on blk0 and blk1 (address f8 16 ) dspn in the generic name for dsp0 to dsp9. dsp0 to dsp9 are each controlled independently. remarks set the display mode of line 1. set the display mode of line 2. set the display mode of line 3. set the display mode of line 4. set the display mode of line 5. set the display mode of line 6. set the display mode of line 7. set the display mode of line 8. set the display mode of line 9. set the display mode of line 10. put a space line between line 2 and line 3 in displaying 32 characters.
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 12 status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 register blink0 blink1 blink2 _ _ _ _ _ n/p _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ int/non mpal palh eqp test15 test16 test17 _ _ _ _ _ _ _ _ _ _ _ _ _ _ mb/lb test19 test30 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function blink0 0 0 1 1 blink1 0 1 0 1 duty blinking off 25% 50% 75% (6) address f5 16 remarks blinking duty ratio can be altered. (note) blinking cycle can be altered. refer to register mpal scanning lines control (only in internal synchronization) synchronizing signal is selected _ with this register and n/p register. it should be fixed to 0 at ntsc effective only at non-interlace setting the decode data output form division of vertical synchronizing signal into 1/64. cycle approximately 1 second. division of vertical synchronizing signal into 1/32. cycle approximately 0.5 second. ntsc, m-pal mode pal mode interlace non interlace not include the equivalent pulse. include the equivalent pulse. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. output from msb side output from lsb side it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. _ n/p 0 0 1 1 mpal 0 1 0 1 synchronous mode ntsc m-pal pal not available palh 0 1 __ int/non 0 1 0 1 number of scanning lines 625h lines 626h lines 627h lines 628h lines note. to flash a character, set 1 to dab (the flash bit) of the display ram.
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 13 register phase0 phase1 phase2 level0 br bg bb blkhf _ _ _ _ _ _ _ _ _ _ lin24/32 lblack test0 test1 test2 test31 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function internal bias off internal bias on the halftone displaying off in superimpose the halftone displaying on in superimpose 24 characters 5 10 lines display 32 characters 5 7 lines display blanking level i 2.3v blanking level ii 2.1v it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. can not be used. it should to be fixed to 1. phase2 0 0 0 0 1 1 1 1 phase1 0 0 1 1 0 0 1 1 phase0 0 1 0 1 0 1 0 1 raster black red green yellow blue magenta cyan white bb 0 0 0 0 1 1 1 1 bg 0 0 1 1 0 0 1 1 br 0 1 0 1 0 1 0 1 black red green yellow blue magenta cyan white status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 character back- ground color remarks raster color setting refer to supplemental explanation (3) about video signal level generates bias potential for composite video signals character background color setting. refer to supplemental explanation (3) about video signal level this register is available in the superimpose displaying only. (note) 1 setting is forbidden under encoding. set a blackness level (7) address f6 16 note. it is neccessary to input the external composite video signal to the cvin pin, and externally connect a 100 to 200 w register in series.
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 14 register cur0 cur1 cur2 cur3 cur4 cur5 cur6 cur7 cblink _ _ _ _ _ _ _ _ _ _ cl17/18 test22 rgbon test24 test32 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function let cursor displaying address be curs, curs = t 5 s 2 n curn no blinking blinking cursor displaying at the 17th dot by vertical direction. cursor displaying at the 18th dot by vertical direction. it should be fixed to 0. can not be used. normal character background coloring it should be fixed to 0. can not be used. it should be fixed to 0. can not be used. status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (8) address f7 16 remarks set the cursor displaying address by use of cur7 through cur0. cur7 to cur0 (11110000) setting is forbidden under 24 characters display. cur7 to cur0 (11100000) setting is forbidden under 32 characters display. set cur7 to cur0 = ( 11111111) under cursor is not be displayed. the cursor displaying address (curs) is correspond to display construction. the cursor blinking setting refer to character construction. refer to supplemental explanation (4). 7 n=0
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 15 status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 register blk0 blk1 ex scor stopin stop1 dspon ramers ehp0 ehp1 ehp2 ehp3 ehp4 level1 contents da 0~d 0 1 2 3 4 5 6 7 8 9 a b c d function external synchronization internal synchronization superimpose monotone display superimpose coloring display (only ntsc) f sc input mode can not be used. oscillation vco for display stop oscillation vco for display display off display on ram not erased ram erased let encode data programming start position be ehs, ehs = t 5 s 2 n ehpn+6 internal bias off internal bias on dspn= 0 matrix-outline size character size border size matrix-outline size blk1 0 0 1 1 blk0 0 1 0 1 dspn= 1 matrix-outline border size (9) address f8 16 remarks display mode (blnk output) variable synchronizing signal switching (note1) 1 setting is forbidden at internal synchronous or pal, m-pal mode displaying. oscin oscillation control control oscillation vco for display this register does not exist (note 3). set encode start position by use of ehp4 through ehp0. ehp4 to ehp0 = (00000) to (01111) is setting forbidden. refer to encode function (3) generates bias potential for decod- ing and synchronous separation. notes 1. in dealing with the internal synchronization, cut off external video signals outside the ic. the leakage of external input vide o signals can be avoided. notes 2. in displaying color superimposition, enter into the oscin pin the f sc signal that phase-synchronizes with the color burst of the composite video signals (input to the cvin pin). notes 3. erases all the display ram. the character code turns to blank-ff 16 , the encode data bit and the blinking bit turn to 1 respectively, and reversed character bit turns to 0. border size matrix-outline size character size 4 n=0
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 16 supplemental explanation about display control register (1) how to effect synchronous separation from composite video signals synchronous separation is effected as follows depending on the width of l-level of the vertical synchronous period. 1. less than 8.4 s not to be determined to be a vertical synchronous signal. 2. equal to or higher than 8.4 s but less than 15.6 s when two clocks continue, if take place, it is l period is determined to be a vertical synchronization signal. 3. equal to or higher than 15.6 s it is l period is determined to be a vertical synchronous signal with no condition. the determination is made at the timing indicated by v in fig.3 either in case 2 or in case 3. fig. 4 the method of synchronous separation from composite video signal. fig. 5 field definition ] a horizontal scanning line number corresponds to slice lines dvp4 through dvp0 (address f1 16 ) and to encode lines evp4 through evp0 (address f2 16 ). stands for either an equalizing pulse or sequence of synchronizing pulse to be used as a trigger of a receiving set. h stands for a hori- zontal scanning period. (2) field definition 8 . 4 m s 1 5 . 6 m s v e r t i c a l s y n c h r o n o u s s i g n a l c o m p o s i t e v i d e o s i g n a l v 8 . 4 m s e q u a l i z i n g p u l s e s e q u e n c e o f s y n c h r o n i z i n g p u l s e f i r s t f i e l d p u l s e s d u r i n g a v e r t i c a l r e t r a c e l i n e e r a s u r e p e r i o d s e c o n d f i e l d 1 / 2 h 1 h 123 456 7 8 9 1 0 1 / 2 h1 h 8 C 1 2 h 1 '2 '3 '4 '5 '6 '7 '8 '9 '1 0 ' 1 1 ]
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 17 fig. 6 bector phases v dd : 5.0v, ta : 25c (3) video signal level (4) setting rgbon (address f7 16 ) a) when encode is off .... efild1, 0 (address f3 16 ) = 0,0 encode setting ... not effected rgbon = 0 ..... sets background colors depending on bb, bg, and br (address f6 16 ), screen by screen. rgbon = 1 ..... sets background colors depending on ec2 to ec0 (address 00 16 to ef 16 ), character by char- acter. the color setting is shown below. b) when encode is on ... efild1, 0 (address f3 16 ) = 0, 1 or 1, 0 encode setting ... sets encode data depending on ec2 through ec0. (refer to the encode functions for details.) rgbon = 0 ..... sets background colors depending on bb, bg and br (address f6 16 ) screen by screen. rgbon = 1 ..... this setting can not be used. (when encode is on, setting rgbon to 1 re- sults in setting both encode data and back- ground colors depending on the same memory (ec2 through ec0), so this setting can not be used. amplitude ratio (to color burst) max. C C C C 4.5 4.2 3.0 3.0 4.2 4.5 C pal, m-pal method C C 4 p /16 e 7 p /16 2 p /16 5 p /16 2 p /16 p /16 2 p /16 15 p /16 2 p /16 11 p /16 2 p /16 9 p /16 2 p /16 e color sync-chip pedestal color burst black red green yellow blue magenta cyan white ntsc method e e 0 e 7 p /16 2 p /16 27 p /16 2 p /16 p /16 2 p /16 17 p /16 2 p /16 11 p /16 2 p /16 23 p /16 2 p /16 e min. 1.3 1.9 1.9 2.1 2.3 2.7 3.1 2.0 2.5 2.9 3.1 ty p . 1.5 2.1 2.1 2.3 2.5 2.9 3.3 2.2 2.7 3.1 3.3 max. 1.7 2.3 2.3 2.5 2.7 3.1 3.5 2.4 2.9 3.3 3.5 min. e e e e 1.5 1.4 1.0 1.0 1.4 1.5 e ty p. e e 1.0 e 3.0 2.8 2.0 2.0 2.8 3.0 e phase angle (rad) brightness level (v) + e + e + e cb cb1 cb2 rs1 rs2 p /4 r-y b-y - p /4 cb color burst under ntsc cb1,cb2 color burst under pal or m-pal rs1,rs2 color subcarrier under pal or m-pal ? ? ? ? ec2 0 0 0 0 1 1 1 1 ec1 0 0 1 1 0 0 1 1 ec0 0 1 0 1 0 1 0 1 color black red green yellow blue magenta cyan white color setting
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 18 (5) port output and blnk1, co1 output fig. 7 example of port control stop1 dspon cs pin at display clock operating 0 1 l at display clock stop 1 0 h stop1, dspon (address f8 16 ) (6) setting conditions for oscillating or stopping the display clock level0 level1 0 0 external synchronous 1 1 operation state (character display) internal synchronous 1 0 level0 (address f6 16 ), level1 (address f8 16 ) now-working condition (no characters are displayed) (7) setting condition at level0,1 1 0 p t d 0 ( p t d 1 ) p o l a r i t y s w i t c h i n g b l n k 1 ( c o 1 ) 1 0 p t c 0 i p t c 1 j s e l e c t p t d 0 ( p t d 1 ) p t d 0 , 1 , p t c 0 , 1 ( a d d r e s s f 0 1 6 ) o u t p u t
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 19 this display format allows each line to be controlled independently, so that two kinds of display formats can be combined on the same screen. display forms M35052-XXXSP/fp has the following four display forms as the blank- ing function, when co1 and blnk1 are output. (1) character size : blanking same as the character size. (2) border size : blanking the background as a size from cha- racter. (3) matrix-outline size: blanking the background as a size from all character font size. (4) matrix-outline : blanking the background as a size from all border size character font size. border display. fig. 8 display forms at each display mode s c a n n i n g l i n e c v i d e o 1 2 d o t s 1 4 d o t s a :b a c k g r o u n d c a r r i e r c o l o r s i g n a l ( 1 ) c h a r a c t e r s i z e ( 2 ) b o r d e r s i z e ( 3 ) m a t r i x - o u t l i n e s i z e c o 1 b l n k 1 aa aa ] ] n o t e : i n t h i s c a s e , t h e o u t p u t p o l a r i t y t h a t c o 1 @ a n d b l n k 1 @ i s p o s i t i v e . 1 4 d o t s ( 4 ) m a t r i x - o u t l i n e b o r d e r s i z e 1 2 d o t s 1 8 d o t s ]
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 20 data input example data of display ram and display control registers can be set by then serial input function. example of data setting is shown in figure 9. owing to automatic address increment, not necessary to enter ad- dresses for the second and subsequent data. in automatically, the next of address f8 16 is assigned to address 00 16 . fig. 9 shows an example of data serially entered. da e 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 da d 0 0 0 0 0 0 0 0 0 0 0 0 1 0 level 1 da c 0 0 rev rev rev rev _ _ _ _ _ _ w/r dvp 4 evp 4 0 0 0 0 0 ehp 4 da b 0 0 blink blink blink blink 0 dvp 3 evp 3 efld 1 0 _____ mb/lb 0 rgbon ehp 3 da a 0 0 ec2 ec2 ec2 ec2 1 dvp 2 evp 2 efld 0 space 0 0 0 ehp 2 da 9 0 0 ec1 ec1 ec1 ec1 0 dvp 1 evp 1 dfld 1 dsp 9 0 lblack cl _____ 17/18 ehp 1 da 8 0 0 ec0 ec0 ec0 ec0 0 dvp 0 evp 0 dfld 0 dsp 8 0 lin _____ 24/32 cblink ehp 0 da 7 1 0 0 0 0 0 1 hp 7 vp 7 vsz 21 dsp 7 eqp blkhf curs 7 ram ers da 6 1 0 c6 c6 c6 c6 0 hp 6 vp 6 vsz 20 dsp 6 palh bb curs 6 dspon da 5 1 0 c5 c5 c5 c5 0 hp 5 vp 5 vsz 11 dsp 5 mpal bg curs 5 stop 1 da 4 1 0 c4 c4 c4 c4 0 hp 4 vp 4 vsz 10 dsp 4 _______ int /non br curs 4 stop in da 3 1 0 c3 c3 c3 c3 ptd 1 hp 3 vp 3 hsz 21 dsp 3 _ _ _ _ n/p level 0 curs 3 scor da 2 0 0 c2 c2 c2 c2 ptd 0 hp 2 vp 2 hsz 20 dsp 2 blink 2 phase 2 curs 2 ex da 1 0 0 c1 c1 c1 c1 ptc 1 hp 1 vp 1 hsz 11 dsp 1 blink 1 phase 1 curs 1 blk 1 da 0 0 0 c0 c0 c0 c0 ptc 0 hp 0 vp 0 hsz 10 dsp 0 blink 0 phase 0 curs 0 blk 0 remarks specify address display off da f 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 address (f8 16 ) data (f8 16 ) data (01 16 ) data (ee 16 ) data (ef 16 ) data (f0 16 ) data (f1 16 ) data (f2 16 ) data (f3 16 ) data (f4 16 ) data (f5 16 ) data (f6 16 ) data (f7 16 ) data (f8 16 ) specify address display ram 0 to ef 16. specify address register f0 16 to f7 16 . display on fig. 9 example of data setting serial input function
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 21 serial data input timing (1) the address consists of 16 bits. (2) the data consists of 16 bits. (3) __ the 16 bits in the sck after the cs signal has fallen are the ad- dress, and for succeeding input data, the address is incremented every 16 bits. output timing of decode data (1) __ setting 1 in the w/r register activates output mode. (2) outputs decode data in 16 clocks of the sck after switching over to output mode. (dont enter the sck for more than 16 clocks.) (3) __ raising the cs signal deactivates output mode. __ (to switch over to input mode, cause cs to fall.) (4) if no data are present, or if data have already been read, 0000 16 is output. fig. 11 decode data output timing fig. 10 serial input timing a d d r e s s ( 1 6 b i t ) n = 1 , 2 , 3 c s s c k l s bm s b s i n d a t a n ( 1 6 b i t ) d a t a n + 1 ( 1 6 b i t ) l s bm s bl s bm s b . . . . . . m s b l s b d e c o d e d a t a ( 1 6 b i t ) l s b a d d r e s s ( 1 6 b i t ) d a t a ( 1 6 b i t ) c s s c k s i n m s b 1 21 51 6 . . . o u t p u t m o d e w h e n r e g i s t e r m b / l b ( a d d r e s s f 5 1 6 ) = 0 ( r e g i s t e r w / r = 1 )
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 22 encode functions (effective for ntsc only) (1) setting encode data setting data code (000 C 111) in ec0 through ec2 (bits da8 through daa) of the display ram (addresses 0 through ef 16 ) encodes. a sample setting and data code are shown below. fig. 12 an example of data code setting l ec2 0 0 0 0 1 1 1 1 ec1 0 0 1 1 0 0 1 1 ec0 0 1 0 1 0 1 0 1 l lh hl hh lhlh lh l data can not be used the oscillation frequency when encoding: 3 mhz ] 1 clock cycle: 0.333 s 1 character (12 dots): 3.996 s 2 bits/1 character: 3.996 s 1 bit: 1.998 s y t y t 18 dots 12 dots an example of setting ? ? ? ? ] 192 5 f h (horizontal synchronous frequency) for f h = 15.625 khz note: refer to the next page about address setting. no encoding a suite of data code (000 ?111) for encoding to be set in ec2 through ec0 are assigned as given below. fixed 2 bit / a character set by every 2 bits (one character) with ec2 to ec0. 16 bit data 1h 5 characters 8 characters ec2~ec0= (address) (note) (1) (2) (3) 001 (5) (6) (7) (8) (9) (10) (11) (12) (0) 100 100 101 (4) (set one code of 000 to 011) 100 lsb msb
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 23 fig.13 display monitor (2) setting addresses set encode data in ec0 through ec2 of addresses (that correspond to an extent from the first character to the thirteenth character in each line as appearing on the screen.) set 111 to ec2 through ec0 of all the addresses in which you set no encode data. 0d 16 25 16 3d 16 55 16 6d 16 85 16 9d 16 b5 16 cd 16 e5 16 0e 16 26 16 3e 16 56 16 6e 16 86 16 9e 16 b6 16 ce 16 e6 16 0f 16 27 16 3f 16 57 16 6f 16 87 16 9f 16 b7 16 cf 16 e7 16 10 16 28 16 40 16 58 16 70 16 88 16 a0 16 b8 16 d0 16 e8 16 11 16 29 16 41 16 59 16 71 16 89 16 a1 16 b9 16 d1 16 e9 16 12 16 2a 16 42 16 5a 16 72 16 8a 16 a2 16 ba 16 d2 16 ea 16 13 16 2b 16 43 16 5b 16 73 16 8b 16 a3 16 bb 16 d3 16 eb 16 14 16 2c 16 44 16 5c 16 74 16 8c 16 a4 16 bc 16 d4 16 ec 16 15 16 2d 16 45 16 5d 16 75 16 8d 16 a5 16 bd 16 d5 16 ed 16 16 16 2e 16 46 16 5e 16 76 16 8e 16 a6 16 be 16 d6 16 ee 16 17 16 2f 16 47 16 5f 16 77 16 8f 16 a7 16 bf 16 d7 16 ef 16 00 16 18 16 30 16 48 16 60 16 78 16 90 16 a8 16 c0 16 d8 16 02 16 1a 16 32 16 4a 16 62 16 7a 16 92 16 aa 16 c2 16 da 16 03 16 1b 16 33 16 4b 16 63 16 7b 16 93 16 ab 16 c3 16 db 16 04 16 1c 16 34 16 4c 16 64 16 7c 16 94 16 ac 16 c4 16 dc 16 05 16 1d 16 35 16 4d 16 65 16 7d 16 95 16 ad 16 c5 16 dd 16 06 16 1e 16 36 16 4e 16 66 16 7e 16 96 16 ae 16 c6 16 de 16 07 16 1f 16 37 16 4f 16 67 16 7f 16 97 16 af 16 c7 16 df 16 08 16 20 16 38 16 50 16 68 16 80 16 98 16 b0 16 c8 16 e0 16 09 16 21 16 39 16 51 16 69 16 81 16 99 16 b1 16 c9 16 e1 16 0a 16 22 16 3a 16 52 16 6a 16 82 16 9a 16 b2 16 ca 16 e2 16 0b 16 23 16 3b 16 53 16 6b 16 83 16 9b 16 b3 16 cb 16 e3 16 0c 16 24 16 3c 16 54 16 6c 16 84 16 9c 16 b4 16 cc 16 e4 16 01 16 19 16 31 16 49 16 61 16 79 16 91 16 a9 16 c1 16 d9 16 screen line 1 line 2 line 3 line 4 line 5 line 6 line 7 line 8 line 9 line 10 the first character .......................................................... the 13th character ................................ ................ the 24th character useless area start setting data from the first line. data set in the lines specified by registers evp0 through evp3 (address f2 16 ) will be encoded. setting data in the second and subsequent lines, it is possible to set encode data to ten consecutive lines from those secified by registers evp0 to evp2. similarly to encode line n specified by registers evp0 through evp2, extending encode lines to line n-1 and to line n+1, it is possible to read encode data more certainly. ? ? ? ? ? y ? ? ? ? ? t ? ? ? ? y ? ? ? ? t using area for encode data setting
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 24 fig. 14 encode data output (3) encode data output symbol a b c d e h v oh v om v ol min. C C C C C C C 1.5 C ty p. (ehs+9) 5 1/(fh 5 192)* 6.5p 2p 1p 16p 1/fh 5.0 2.3 0 unit s s s s s s v v v v dd : 5.0v, ta : 25 c digital 3 value output (edo output) 1p = 1/(f h 5 32) f h : horizontal synchronous frequency (mhz) * it is possible to make a fine adjustment (in increments of 1/(f h 5 192)) by use of ehs (registers ehp4 to ehp0 of address f8 16 ). (ehs 15 setting is forbidden.) h abcd e v oh v om v ol clock run-in start bit character 1 character 2 lsb1 lsb2 msb1 msb2 e e e e e e 3.0 e max. e
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 25 fig. 15 character font and border character font images are composed on a 12 5 18 dot matrix, and characters can be linked vertically and horizontally with other characters to allow the display the continuous symbols. character code ff 16 is so fixed as to be blank and to have no background, thus cannot assign a character font to this code. 18 dots note: hatching represents border. 12 dots register cl17/18 (address f7 16 ) = ? register cl17/18 = ? positioning the cursor at the 17th dot. positioning the cursor at the 18th dot. character note: when the cursor positioning at the bottom (18th) dot, no border is left at the bottom. when the character extends to the top dot of the matrix, no border is left at the top. when the character extends to the bottom (18th) dot of the matrix, no border is left at the bottom. (1) border display (set by register blk0, 1 (address f8 16 )) (2) cursor display (border display)
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 26 M35052-XXXSP/fp peripheral circuit fig. 16 M35052-XXXSP/fp example of peripheral circuit in displaying color superimposition, enter into the oscin pin the f sc signal that phase-synchronizes with the color burst of the composite video signals (input to the cvin pin). note 7: in dealing with the internal synchronization, cut off external video signals outside the ic. the leakage of external input video signals can be aoided. . : ? ? 220 2.2k 120 150 +7.0v composite video signal input 10k 47 m from microcomputer + note 1 +5.0v 470 +7.0v external composite video signal input 47 m note 2 1.50v 75 220 m + note 5 4700p note 6 + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 20 19 18 17 cp1 testa sin cvideo lecha cvin sck v dd 2 cs ac v dd 1 v ss hor p1 p0 oscin testb cp2 edo 1 m + 1 m 100 m 0.01 m +5.0v + + note 4 1k 0.01 m 0.22 m 4700p 1.5k fsc note 3 i/o +5.0v 0.1 m 1 m 100 m + + v ss note 7 delay circuit ntsc=3.580mhz pal=4.434mhz m-pal=3.576mhz note 4: construct integral circuit by built-in 30k w of ac pin and an external condenser. attention to supply voltage rise time about this cr constant. note 5: external loop filter 2 constant is provi- sional valve. note 6: connect f sc frequency. 0.3vp-p v oscin 4.0vp-p note 1: clamp sync chip to 1.50v. note 2: set basic electric potential in consid eration of dynamic range of the tran- sistor. note 3: external loop filter 1 constant is pro- visional valve.
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 27 0 c 1 6 2 4 1 6 o u t s i d e o f d i s p l a y a r e a i n s i d e o f d i s p l a y s e t b l a n k c o d e f f 1 6 t o c h a r a c t e r c o d e o f p a r t . o u t s i d e o f d i s p l a y a r e a i n s i d e o f d i s p l a y 0 0 1 6 1 8 1 6 0 b 1 6 2 f 1 6 1 7 1 6 n u m b e r s a r e a d r e s s e s 2 3 1 6 3 0 1 6 4 8 1 6 4 7 1 6 5 f 1 6 c 0 1 6 d 8 1 6 e f 1 6 d 7 1 6 fig. 17 example of display precautions (1) points to note in setting the display rams a) be careful to the edges may sway depending on the combina- tion of characters background color and raster color. b) if what display exceeds the display area in dealing with exter- nal synchronization, (if use double - size characters), set the character code of the addresses lying outside that display area blank code C ff 16 . e d g e s w a y fig. 18 example of display
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 28 (2) before setting registers at the starting of system, be sure to reset __ the M35052-XXXSP/fp by applying l level to the ac pin. (3) power supply noise when power supply noise is generated, the internal oscillator cir- cuit does not stabilize, whereby causing horizontal jitters across the picture display. therefore, connect a bypass capacitor be- tween the power supply and gnd. (4) synchronous correction action when switching channel or in the special playback mode (quick playback, rewinding, and so on) of vtr, effect of synchronous correction becomes strong, and distortion of a character is apt to occur because the continuity of video signal is suddenly switched. when the continuity of video signal is out of order, erasure of displayed characters is recommended in a extreme short time to raise the quality of displayed characters. (5) notes on f sc signal input this ic amplifies the subcarrier frequency (f sc ) signal (ntsc, m- pal system: 3.58mhz, pal system: 4.43mhz) input to the oscin pin (17-pin) and generates the composite video signal internally. the amplified f sc signal can be destabilized in the following cases. a) when the f sc signal is outside of recommended operating con- ditions. b) when the waveform of the f sc signal is distorted. c) when dc level in the f sc waveform fluctuates. when the amplified signal is unstable, the composite video signal generated inside the ic is also unstable in terms of syn- chronization with the subcarrier and phase. consequently, this results in color flicker and lost synchroniza- tion when the composite video signal is generated. make note of the fact that this may prevent a stable blue background from being formed. (6) forbidding to stop entering the f sc signal this ic doesnt properly work if the f sc signal is not entered into the oscin pin (pin 17), so dont stop the f sc signal so as to work the ic. to stop the ic, turn the display off (set 0 in the register dspon (address f8 16 ).) (7) forbidding to set data during the period in which the internal oscillation circuit stabilizes a) to start entering the f sc signal when its input is stopped. b) to start oscillating the oscillation circuit for display when its oscillation is stopped. (to assign 1 to the register stop1 (ad- dress f8 16 ) when it is assigned 0, or the like.) c) to turn on the internal bias when it is turned off. (to assign 1 to the register level1 (address f8 16 ) when it is assigned 0.) there can be instances in which data are not properly set in the registers until the internal oscillation circuit stabilizes, so follow the steps in sequence as given below. 1) set 0 in the register dspon (address f8 16 ). (the display is turned off) 2) effect the settings a), b), and c) given above. 3) wait 20 ms (the period necessary for the internal oscillation cir- cuit to stabilize) before entering data. 4) set necessary data in other registers, and make the display ram ready.
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 29 parameter sck width _ _ _ _ _ _ _ _ _ _ cs setup time _ _ _ _ _ _ _ _ _ _ cs hold time sin setup time sin hold time 1 word writing time symbol tw(sck) _ _ _ _ _ _ _ _ _ _ tsu(cs) _ _ _ _ _ _ _ _ _ _ _ _ th(cs) tsu(sin) th(sin) t word min. 400 200 2 200 200 12.8 unit ns ns s ns ns s __ __ note. when oscillation stop at register stor1 (address f8 16 ), 1v (field term) or more of t su( cs ) and th ( cs ) are needed. max. C C C C C C typ. C C C C C C limits timing requirements (ta = C20c to 70c, v dd = 50.25v, unless otherwise noted) fig. 19 serial input timing requirements s c k c s c s 2 s ( m i n . ) t w ( c s ) t w ( s c k ) t s u ( s i n )t h ( s i n ) t s u ( c s ) t h ( c s ) t w ( s c k ) s i n s c k t w o r d 12 1 6 1 4 . . . 1 5 3 12 1 6 1 4 c 1 5 3
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 30 parameter supply voltage _ _ _ _ _ _ _ _ _______ h level input voltage ac, cs, sin, sck, testa, testb _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ _ l level input voltage ac, cs, sin, sck, testa, testb cvin, hor input voltage oscin (note) synchronous signal oscillation frequency (duty 40~60%) display oscillation frequency 24 characters 5 10 lines 32 characters 5 7 lines symbol v dd v i v o p d t opr t stg parameter supply voltage input voltage output voltage power dissipation operating temperature storage temperature conditions with respect to v ss ta=25 c ratings e0.3~6.0 v ss e0.3 v i v dd +0.3 v ss v o v dd 300 e20~70 e40~125 unit v v v mw c c limits min. 4.75 0.8 5 v dd 0 e 0.3v p-p e e e ty p. 5.00 v dd 0 2.0v p-p e 3.580 4.434 3.576 480 5 f h 640 5 f h max. 5.25 v dd 0.2 5 v dd e 4.0v p-p e e e unit v v v v v mhz mhz mhz notes 1. noise component is within 30mv. notes 2. f h : horizontal synchronous frequency (mhz). symbol v dd i dd v oh v ol r i v oh v om v ol limits min. 4.75 3.75 10 4.0 1.5 ty p. 5.00 30 30 2.3 max. 5.25 50 0.4 100 3.0 0.4 unit v ma v v k w v v v parameter supply voltage supply current h level output voltage p0, p1, sin l level output voltage p0, p1, sin pull-up resistance _____ _____ ac, cs, sck, sin, testb h level output voltage edo mlevel output voltage edo l level output voltage edo symbol v in-sc limits min. e ty p. 1.5 max. e unit v parameter composite video signal input clamp voltage test conditions sync-chip voltage symbol v dd v ih v il v cvin v oscin f oscin f osc1 f osc2 test conditions ta=e20~70 c v dd =5.00v v dd =4.75v, i oh =e0.4ma v dd =4.75v, i ol =e0.4ma v dd =5.00v v dd =5.00v, i oh =e0.04ma v dd =5.00v, i om = 0.04ma v dd =5.00v, i ol =0.04ma absolute maximum ratings (v dd = 5v, ta = ?0 to 70 c, unless otherwise noted) recommended operating conditions (v dd = 5v, ta = ?0 to 70 c, unless otherwise noted) electrical characteristics (v dd = 5v, ta = 25 c, unless otherwise noted) video signal input conditions (v dd = 5v, ta = ?0 to 70 c, unless otherwise noted)
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 31 note for supplying power (1) __ timing of power supplying to ac pin the internal circuit of M35052-XXXSP/fp is reset when the level __ of the auto clear input pin ac is l. this pin is hysteresis input __ with the pull-up resistor. the timing about power supplying of ac pin is shown in figure 20. t w is the interval after the supply volt- age becomes 0.8 5 v dd or more and before the supply voltage to __ __ the ac pin (v ac ) becomes 0.2 5 v dd or more. after supplying the power (v dd and v ss ) to M35052-XXXSP/fp, the t w time must be reserved for 1ms or more. before starting input from the microcomputer, the waiting time (ts) must be re- __ served for 500ms after the supply voltage to the ac pin becomes 0.8 5 v dd or more. (2) timing of power supplying to v dd 1 pin and v dd 2 pin the power need to supply to v dd 1 and v dd 2 at a time, though it is separated perfectly between the v dd 1 as the digital line and the v dd 2 as the analog line. rom ordering method please submit the information described below when ordering mask rom. (1) rom order confirmation form ................................................. 1 (2) data to be written into mask rom ................................ eprom (three sets containing the identical data) (3) mark specification form ............................................................ 1 (4) program for character font generating + froppy disk in which char- acter data is input precaution for use notes on noise and latch-up connect a capacitor (approx. 0.1 f) between pins v dd and v ss at the shortest distance using relatively thick wire to prevent noise and latch up. __ fig. 20 timing of power supplying to ac pin s u p p l y v o l t a g e v d d 0 . 8 5 v d d 0 . 2 5 v d d t w v o l t a g e m v n t i m e t [ s ] v a c i a c p i n i n p u t v o l t a g e j t s
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 32 standard rom type : m35052-001sp/fp m35052-001sp/fp is a standard rom type of M35052-XXXSP/fp character patterns are fixed to the contents of figure 21 to 23. fig. 21 m35052-001sp/fp character patterns (1) 00 16 01 16 02 16 03 16 04 16 05 16 06 16 07 16 08 16 09 16 0a 16 0b 16 0c 16 0d 16 0e 16 0f 16 10 16 11 16 12 16 13 16 14 16 15 16 16 16 17 16 18 16 19 16 1a 16 1b 16 1c 16 1d 16 1e 16 1f 16 20 16 21 16 22 16 23 16 24 16 25 16 26 16 27 16 28 16 29 16 2a 16 2b 16 2c 16 2d 16 2e 16 2f 16 30 16 31 16 32 16 33 16 34 16 35 16 36 16 37 16 38 16 39 16 3a 16 3b 16 3c 16 3d 16 3e 16 3f 16
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 33 fig. 22 m35052-001sp/fp character patterns (2) 40 16 41 16 42 16 43 16 44 16 45 16 46 16 47 16 48 16 49 16 4a 16 4b 16 4c 16 4d 16 4e 16 4f 16 50 16 51 16 52 16 53 16 54 16 55 16 56 16 57 16 58 16 59 16 5a 16 5b 16 5c 16 5d 16 5e 16 5f 16 60 16 61 16 62 16 63 16 64 16 65 16 66 16 67 16 68 16 69 16 6a 16 6b 16 6c 16 6d 16 6e 16 6f 16 70 16 71 16 72 16 73 16 74 16 75 16 76 16 77 16 78 16 79 16 7a 16 7b 16 7c 16 7d 16 7e 16 7f 16 blank
mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers 34 package outline
?2000 mitsubishi electric corp. new publication, effective august. 2000. specifications subject to change without notice. notes regarding these materials these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product b est suited to the customer? application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-party? rights, origina ting in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents inf ormation on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that c ustomers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. mitsubishi electric corporation assu mes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by mitsubishi electric corporation by various means, including the mitsubish i semiconductor home page (http://www.mitsubishichips.com). when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. mitsubishi electric corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used und er circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herei n for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these m aterials. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a licen se from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for further detai ls on these materials or the products contained therein. keep safety first in your circuit designs! mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with a ppropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. head office: 2-2-3, marunouchi, chiyoda-ku, tokyo 100-8310, japan mitsubishi microcomputers M35052-XXXSP/fp screen character and pattern display controllers
rev. rev. no. date 1.0 first edition 980402 1.1 p41 20p2q-a (20-pin ssop) mark specification form 000707 b: note 4 added 1.2 delete mask rom order confirmation form and mask specification form 000829 revision description list M35052-XXXSP/fp data sheet (1/1) revision description

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