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rev. 2.2 5/2011 page 1 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com (formerly viv0102thj) 015 050a00 x eh 48 vtm features ? 48 vdc to 1.5 vdc 50 a current multiplier - operating from standard 48 v or 24 v prm? regulators ? high efficiency (>89%) reduces system power consumption ? high density (334 a/in 3 ) ? ?half chip? v ? i chip package enables surface mount, low impedance interconnect to system board ? contains built-in protection features against: - overvoltage - overcurrent - short circuit - overtemperature - reverse inrush ? provides enable / disable control, internal temperature monitoring, current monitoring ? zvs / zcs resonant sine amplitude converter topology ? less than 50oc temperature rise at full load in typical applications typical applications ? high end computing systems ? automated test equipment ? high density power supplies ? communications systems ? 0 description the v ? i chip? current multiplier is a high efficiency (>89%) sine amplitude converter? (sac?) operating from a 26 to 55 vdc primary bus to deliver an isolated output. the sine amplitude converter offers a low ac impedance beyond the bandwidth of most downstream regulators, which means that capacitance normally at the load can be located at the input to the sine amplitude converter. since the k factor of the vtm48eh015t050a00 is 1/32, that capacitance value can be reduced by a factor of 1024, resulting in savings of board area, materials and total system cost. the vtm48eh015t050a00 is provided in a v ? i chip package compatible with standard pick-and-place and surface mount assembly processes. the co-molded v ? i chip package provides enhanced thermal management due to large thermal interface area and superior thermal conductivity. with high conversion efficiency the vtm48eh015t050a00 increases overall system efficiency and lowers operating costs compared to conventional approaches. the vtm48eh015t050a00 enables the utilization of factorized power architecture tm providing efficiency and size benefits by lowering conversion and distribution losses and promoting high density point of load conversion. v in l o a d pr pc vc tm il os sg prm? cd -out +out -in +in pc vtm? im vc tm -out +out -in +in regulator current multiplier factorized power architecture? vtm tm current multiplier v in = 26 to 55 v v out = 0.8 to 1.7 v ( no load ) i out = 50 a ( nom ) k= 1/32 c us ? (see application note an:024 ) s nrtl c us part number product grade t = -40 to 125c m = -55 to 125c part numbering for storage and operating temperatures see section 6.0 general characteristics 015 x 050a00 h vtm e 48
rev. 2.2 5/2011 page 2 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm attribute symbol conditions / notes min typ max unit input voltage range v in no external vc applied 26 55 v dc vc applied 055 v in slew rate dv in /dt 1 v/s v in uv turn off v in _ uv module latched shutdown, 16.2 26.0 v no external vc applied, i out = 50a no load power dissipation p nl v in = 42 v 1.2 5.0 w v in = 26 v to 55 v 7.1 v in = 42 v, t c = 25oc 2.6 3.5 v in = 26 v to 55 v, t c = 25oc 4.8 inrush current peak i inrp vc enable, v in = 42 v c out = 5000 f, 2.5 10 a r load = 28 m dc input current i in _ dc 1.8 a transfer ratio k k = v out /v in , i out = 0 a 1/32 v/v output voltage v out v out = v in ? k - i out ? r out , section 11 v output current (average) i out _ avg 50 a output current (peak) i out _ pk t peak < 10 ms, i out _ avg 50 a 75 a output power (average) p out _ avg i out _ avg 50 a 80 w v in = 42 v, i out = 50 a 87.2 88.6 efficiency (ambient) amb v in = 26 v to 55 v, i out = 50 a 83.0 % v in = 42 v, i out = 25 a 86.3 88.0 efficiency (hot) hot v in = 42 v, t c = 100c, i out = 50 a 87.0 88.3 % efficiency (over load range) 20% 10 a < i out < 50 a 70.0 % output resistance (cold) r out _ cold t c = -40c, i out = 50 a 1.2 1.5 1.8 m output resistance (ambient) r out _ amb t c = 25c, i out = 50 a 1.5 1.8 2.2 m output resistance (hot) r out _ hot t c = 100c, i out = 50 a 1.9 2.2 2.5 m switching frequency f sw 1.30 1.45 1.60 mhz output ripple frequency f sw _ rp 2.60 2.90 3.20 mhz output voltage ripple v out _ pp c out = 0 f, i out = 50 a, v in = 42 v, 155 300 mv 20 mhz bw, section 12 output inductance (parasitic) l out _ par frequency up to 30 mhz, 600 ph simulated j-lead model output capacitance (internal) c out _ int v out = 1.5 v 130 f output capacitance (external) c out _ ext vtm standalone operation 5000 f v in pre-applied, vc enable protection ovlo v in _ ovlo + module latched shutdown 55.5 57.7 59.8 v overvoltage lockout t ovlo effective internal rc filter 2.4 s response time output overcurrent trip i ocp 60 75 100 a short circuit protection trip current i scp 75 a output overcurrent response t ocp effective internal rc filter (integrative). 8 ms time constant short circuit protection response time t scp from detection to cessation 1s of switching (instantaneous) thermal shutdown setpoint t j _ otp 125 130 135 oc 1.0 absolute maximum voltage ratings the absolute maximum ratings below are stress ratings only. operation at or beyond these maximum ratings can cause permanent damage to the device. 2.0 electrical characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t j < 125c (t-grade) ; all other specifications are at t j = 25oc unless otherwise noted. min max unit + in to - in . . . . . . . . . . . . . . . . . . . . . . . -1.0 60 v dc pc to - in . . . . . . . . . . . . . . . . . . . . . . . . -0.3 20 v dc tm to -in . . . . . . . . . . . . . . . . . . . . . . . . -0.3 7 v dc vc to - in . . . . . . . . . . . . . . . . . . . . . . . . -0.3 20 v dc min max unit im to - in ................................................. 0 3.15 v dc + in / - in to + out / - out (hipot) ........ 2250 v dc + in / - in to + out / - out (working) ... 60 v dc + out to - out ....................................... -1.0 4 v dc
rev. 2.2 5/2011 page 3 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm signal type state attribute symbol conditions / notes min typ max unit external vc voltage v vc _ ext required for startup, and operation 12 16.5 v below 26 v. see section 7. vc current draw threshold v vc _ th low vc current draw for v in >26 v 13 v vc = 13 v, v in = 0 v 90 150 steady vc current draw i vc vc = 13 v, v in > 26 v 6 ma vc = 16.5 v, v in > 26 v 90 vc internal resistor r vc - int 11 k analog start up vc slew rate dvc/dt required for proper startup; 0.02 0.25 v/s input vc inrush current i inr _ vc vc = 16.5 v, dvc/dt = 0.25 v/s 750 ma vc output turn-on delay t on v in pre-applied, pc floating, vc enable 500 s transitional c pc = 0 f, c out = 5000 f vc to pc delay t vc _ pc vc = 12 v to pc high, v in = 0 v, 10 25 s dvc/dt = 0.25 v/s internal vc capacitance c vc _ int vc = 0 v 2.2 f signal type state attribute symbol conditions / notes min typ max unit pc voltage v pc 4.7 5.0 5.3 v analog steady pc source current i pc _ op 2ma output pc resistance (internal) r pc _ int internal pull down resistor 50 150 400 k start up pc source current i pc _ en 50 100 300 a pc capacitance (internal) c pc _ int section 7 50 pf pc resistance (external) r pc _ ext 60 k enable pc voltage (enable) v pc _ en 2 2.5 3 v digital disable pc voltage (disable) v pc _ dis 2 v input / ouput pc pull down current i pc _ pd 5.1 ma transitional pc disable time t pc _ dis _ t 4s pc fault response time t fr _ pc from fault to pc = 2 v 100 s ? used to wake up powertrain circuit. ? a minimum of 12 v must be applied indefinitely for v in < 26 v to ensure normal operation. ? vc slew rate must be within range for a successful start. ? prm? module vc can be used as valid wake-up signal source. ? vc voltage may be continuously applied; there will be minimal vc current drawn when v in > 26 v and vc < 13. ? internal resistance used in adaptive loop compensation vtm control : vc 3.0 signal characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t j < 125c (t-grade) ; all other specifications are at t j = 25c unless otherwise noted. ? the pc pin enables and disables the vtm? module. when held below 2 v, the vtm module will be disabled. ? pc pin outputs 5 v during normal operation. pc pin is equal to 2.5 v during fault mode given v in > 26 v and vc > 12 v. ? after successful start-up and under no fault condition, pc can be used as a 5 v regulated voltage source with a 2 ma maximum current. ? module will shutdown when pulled low with an impedance less than 400 ?. ? in an array of vtm modules, connect pc pin to synchronize startup. ? pc pin cannot sink current and will not disable other module during fault mode. primary control : pc signal type state attribute symbol conditions / notes min typ max unit tm voltage v tm _ amb t j controller = 27c 2.95 3.00 3.05 v analog tm source current i tm 100 a output steady tm gain a tm 10 mv/c tm voltage ripple v tm _ pp c tm = 0 f, v in = 42 v, 120 200 mv i out = 50 a disable tm voltage v tm _ dis 0v digital output tm resistance (internal) r tm _ int internal pull down resistor 25 40 50 k transitional tm capacitance (external) c tm _ ext 50 pf (fault flag) tm fault response time t fr _ tm from fault to tm = 1.5 v 10 s ? the tm pin monitors the internal temperature of the vtm controller ic within an accuracy of 5c. ? can be used as a "power good" flag to verify that the vtm is operating. ? the tm pin has a room temperature setpoint of 3 v (@27c) and approximate gain of 10 mv/c. temperature monitor : tm
rev. 2.2 5/2011 page 4 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm 4.0 timing diagram 12 7 v in 1. initiated v c pulse 2. controller start 3. v in ramp up 4. v in = v ovlo 5. v in ramp down no v c pulse 6. overcurrent 7. start up on short circuit 8. pc driven low v out pc 3 v vc nl 5 v v ovlo tm v tm-amb c notes: C timing and voltage is not to scale C error pulse width is load dependent a: vc slew rate (dvc/dt) b: minimum vc pulse rate c: t ovlo d: t ocp e: output turn on delay (t on ) f: pc disable time (t pc_dis_t ) g: vc to pc delay (t vc_pc ) d i ssp i out i ocp v vc-ext 3 45 6 a b 8 g e f 26 v signal type state attribute symbol conditions / notes min typ max unit im voltage (no load) v im _ nl t c = 25oc, v in = 42 v, i out = 0 a 0.25 0.39 0.49 v im voltage (50%) v im _ 50% t c = 25oc, v in = 42 v, i out = 25 a 0.98 v analog steady im voltage (full load) v im _ fl t c = 25oc, v in = 42 v, i out = 50 a 1.86 v output im gain a im t c = 25oc, v in = 42 v, i out > 25 a 35.2 mv/a im resistance (external) r im _ ext 2.5 m ? the nominal im pin voltage varies between 0.39 v and 1.86 v representing the output current within 25% under all operating line temperature conditions between 50% and 100%. ? the im pin provides a dc analog voltage proportional to the output current of the vtm? module. current monitor : im 3.0 signal characteristics (cont.) specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t j < 125c (t-grade) ; all other specifications are at t j = 25c unless otherwise noted.
rev. 2.2 5/2011 page 5 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm 5.0 application characteristics the following values, typical of an application environment, are collected at t c = 25oc unless otherwise noted. see associated figures for general trend data. attribute symbol conditions / notes typ unit no load power dissipation p nl v in = 42 v 3.1 w efficiency (ambient) amb v in = 42 v, i out = 50 a 88.6 % efficiency (hot) hot v in = 42 v, i out = 50 a, t c = 100oc 88.0 % output resistance (ambient) r out _ amb v in = 42 v, i out = 50 a 1.8 m output resistance (hot) r out _ hot v in = 42 v, i out = 50 a, t c = 100oc 2.2 m output resistance (cold) r out _ cold v in = 42 v, i out = 50 a, t c = -40oc 1.5 m output voltage ripple v out _ pp c out = 0 f, i out = 50 a, v in = 42 v, 235 mv 20 mhz bw, section 12 v out transient (positive) v out _ tran + i out _ step = 0 a to 50a, v in = 42 v, 20 mv i slew > 10 a /us v out transient (negative) v out _ tran - i out _ step = 50 a to 0 a, v in = 42 v 20 mv i slew > 10 a /us 1 2 3 4 5 6 7 26 29 32 36 39 42 45 49 52 55 power dissipation (w) no load power dissipation vs. line -40? 25? 100? t : case input voltage (v) full load efficiency vs. case temperature full load efficiency (%) 80 82 84 86 88 90 92 -40 -20 0 20 40 60 80 100 26 v 42 v 55 v v : in case temperature (?) 0 2 4 6 8 10 12 14 16 18 20 40 45 50 55 60 65 70 75 80 85 90 0 5 10 15 20 25 30 35 40 45 50 p d output current (a) 26 v 42 v 55 v v : in 26 v 42 v 55 v efficiency (%) efficiency & power dissipation -40c case power dissipation (w) efficiency & power dissipation 25c case efficiency (%) power dissipation (w) 0 2 4 6 8 10 12 14 16 18 56 60 64 68 72 76 80 84 88 92 0 5 10 15 20 25 30 35 40 45 50 26 v 42 v 55 v v : in 26 v 42 v 55 v output current (a) p d figure 1 ? no load power dissipation vs. v in figure 2 ? full load efficiency vs. temperature figure 3 ? efficiency and power dissipation at ?40c figure 4 ? efficiency and power dissipation at 25c
rev. 2.2 5/2011 page 6 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm -40? 25? 100? im voltage vs. load at v in = 42 v im (v) t case : load current (a) 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 0 5 10 15 20 25 30 35 40 45 50 v : in ripple vs. load load current (a) ripple (mv pk-pk) 42 v 0 50 100 150 200 250 0 5 10 15 20 25 30 35 40 45 50 im voltage vs. load 25c case load current (a) im (v) 26 v 42 v 55 v v : in 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 0 5 10 15 20 25 30 35 40 45 50 figure 9 ? im voltage vs. load t case (?) im (v) 26 v 42 v 55 v v in im voltage vs. t case & line 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 -40 -20 0 20 40 60 80 100 efficiency & power dissipation 100c case output current (a) efficiency (%) 26 v 42 v 55 v v : in 26 v 42 v 55 v power dissipation (w) 0 2 4 6 8 10 12 14 16 60 64 68 72 76 80 84 88 92 0 5 10 15 20 25 30 35 40 45 50 p d r out vs. case temperature at v in = 42 v case temperature (c) rout (m) i : out 25 a 50 a 0.5 1 1.5 2 2.5 -40 -20 0 20 40 60 80 100 figure 5 ? efficiency and power dissipation at 100c figure 6 ? r out vs. temperature figure 10 ? full load im voltage vs. t case figure 8 ? im voltage vs. load figure 7 ? v ripple vs. i out ; no external c out . board mounted module, scope setting : 20 mhz analog bw
rev. 2.2 5/2011 page 7 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm figure 13 ? start up from application of v in ; vc pre-applied c out = 0 f figure 16 ? 50 a ? 0 a transient response: c in = 100 f, no external c out figure 15 ? 0 a? 50 a transient response: c in = 100 f, no external c out safe operating area output voltage (v) output current (a) 0 10 20 30 40 50 60 70 80 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 10 ms max continuous figure 11 ? safe operating area figure 12 ? full load ripple, 100 f c in ; no external c out . board mounted module, scope setting : 20 mhz analog bw figure 14 ? start up from application of vc; v in pre-applied c out = 0 f
rev. 2.2 5/2011 page 8 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm attribute symbol conditions / notes min typ max unit mechanical length l 21.7 / [0.85] 22.0 / [0.87] 22.3 / [0.88] mm/[in] width w 16.4 / [0.64] 16.5 / [0.65] 16.6 / [0.66] mm/[in] height h 6.48 / [0.255] 6.73 / [0.265] 6.98 / [0.275] mm/[in] volume vol no heat sink 2.44 / [0.150] cm 3 /[in 3 ] weight w 8.0 / 0.28 g/[oz] nickel 0.51 2.03 lead finish palladium 0.02 0.15 m gold 0.003 0.051 thermal operating temperature t j vtm48eh015t050a00 (t-grade) -40 125 c VTM48EH015M050A00 (m-grade) -55 125 c thermal capacity 5 ws/c assembly peak compressive force supported by j-lead only 2.5 3 lbs applied to case (z-axis) storage temperature t st vtm48eh015t050a00 (t-grade) -40 125 c VTM48EH015M050A00 (m-grade) -65 125 c esd hbm 1500 esd withstand esd mm 400 v dc soldering peak temperature during reflow msl 5 225 c msl 6, tob = 4hrs 245 c peak time above 183c 150 s peak heating rate during reflow 1.5 3 c/s peak cooling rate post reflow 1.5 6 c/s safety working voltage (in ? out) v in _ out 60 v dc isolation voltage (hipot) v hipot 2250 v dc isolation capacitance c in _ out unpowered unit 1350 1750 2150 pf isolation resistance r in _ out 10 m mtbf mil hdbk 217, 25oc, 4.5 mhrs ground benign ctuvus agency approvals / standards curus ce mark rohs 6 of 6 human body model, "jedec jesd 22-a114c.01" machine model, "jedec jesd 22-a115-a" 6.0 general characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40oc < t j < 125oc (t-grade) ; all other specifications are at t j = 25c unless otherwise noted.
rev. 2.2 5/2011 page 9 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm 7.0 using the control signals vc, pc, tm, im the vtm control (vc) pin is an input pin which powers the internal vcc circuitry when within the specified voltage range of 12 v to 16.5 v. this voltage is required in order for the vtm? current multiplier to start, and must be applied as long as the input is below 26 v. in order to ensure a proper start, the slew rate of the applied voltage must be within the specified range. some additional notes on the using the vc pin: ? in most applications, the vtm module will be powered by an upstream prm? regulator which provides a 10 ms vc pulse during startup. in these applications the vc pins of the prm and vtm modules should be tied together. ? the vc voltage can be applied indefinitely allowing for continuous operation down to 0 v in . ? the fault response of the vtm module is latching. a positive edge on vc is required in order to restart the unit. if vc is continuously applied the pc pin may be toggled to restart the module. primary control (pc) pin can be used to accomplish the following functions: ? delayed start: upon the application of vc, the pc pin will source a constant 100 a current to the internal rc network. adding an external capacitor will allow further delay in reaching the 2.5 v threshold for module start. ? auxiliary voltage source: once enabled in regular operational conditions (no fault), each vtm module pc provides a regulated 5 v, 2 ma voltage source. ? output disable: pc pin can be actively pulled down in order to disable the module. pull down impedance shall be lower than 400 . ? fault detection flag: the pc 5 v voltage source is internally turned off as soon as a fault is detected. it is important to notice that pc doesn?t have current sink capability. therefore, in an array, pc line will not be capable of disabling neighboring modules if a fault is detected. ? fault reset: pc may be toggled to restart the unit if vc is continuously applied. temperature monitor (tm) pin provides a voltage proportional to the absolute temperature of the converter control ic. it can be used to accomplish the following functions: ? monitor the control ic temperature: the temperature in kelvin is equal to the voltage on the tm pin scaled by 100. (i.e. 3.0 v = 300 k = 27oc). if a heat sink is applied, tm can be used to thermally protect the system. ? fault detection flag: the tm voltage source is internally turned off as soon as a fault is detected. for system monitoring purposes (microcontroller interface) faults are detected on falling edges of tm signal. current monitor (im) pin provides a voltage proportional to the output current of the vtm module. the nominal voltage will vary between 0.39 v and 1.86 v over the output current range of the vtm module (see figures 8?10). the accuracy of the im pin will be within 25% under all line and temperature conditions between 50% and 100% load. 8.0 startup behavior depending on the sequencing of the vc with respect to the input voltage, the behavior during startup will vary as follows: ? normal operation (vc applied prior to v in ): in this case the controller is active prior to ramping the input. when the input voltage is applied, the vtm module output voltage will track the input (see figure 13). the inrush current is determined by the input voltage rate of rise and output capacitance. if the vc voltage is removed prior to the input reaching 26 v, the module may shut down. ? stand alone operation (vc applied after v in ): in this case the module output will begin to rise upon the application of the vc voltage (see figure 14). the adaptive soft start circuit (see section 10) may vary the ouput rate of rise in order to limit the inrush current to it?s maximum level. when starting into high capacitance, or a short, the output current will be limited for a maximum of 900 sec. after this period, the adaptive soft start circuit will time out and the vtm module may shut down. no restart will be attempted until vc is re-applied, or pc is toggled. the maximum output capacitance is limited to 5000 f in this mode of operation to ensure a sucessful start. 9.0 thermal considerations v ? i chip? products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. maintaining the top of the vtm48eh015t050a00 case to less than 100oc will keep all junctions within the v ? i chip module below 125oc for most applications. the percent of total heat dissipated through the top surface versus through the j-lead is entirely dependent on the particular mechanical and thermal environment. the heat dissipated through the top surface is typically 60%. the heat dissipated through the j-lead onto the pcb board surface is typically 40%. use 100% top surface dissipation when designing for a conservative cooling solution. it is not recommended to use a v ? i chip module for an extended period of time at full load without proper heat sinking.
rev. 2.2 5/2011 page 10 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm +v out -v out modulator +v in fast current limit slow current limit vref pc enable -v in 2.5 v 100 ua 5 v 2 ma 150 k 40 k 560 pf 10.5 v gate drive supply 2.5 v primary current sensing pc pull-up & source temperature dependent voltage source overcurrent protection primary stage & resonant tank 1.5 k vc buck regulator supply primary gate drive enable fault logic ovlo uvlo v in tm secondary gate drive power transformer synchronous rectification v ref (130? ?5?) over temperature protection enable adaptive soft start q1 q2 c2 c1 lr cr q3 q4 c out enable c in rvc 18 v im 3 v max. 240 ? max. 10.0 vtm? module block diagram
rev. 2.2 5/2011 page 11 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm 11.0 sine amplitude converter? point of load conversion the sine amplitude converter? (sac?) uses a high frequency resonant tank to move energy from input to output. (the resonant tank is formed by cr and leakage inductance lr in the power transformer windings as shown in the vtm? module block diagram. see section 10). the resonant lc tank, operated at high frequency, is amplitude modulated as function of input voltage and output current. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. the vtm48eh015t050a00 sac can be simplified into the following model: at no load: v out = v in ? k (1) k represents the ?turns ratio? of the sac. rearranging eq (1): k= v out (2) v in in the presence of load, v out is represented by: v out = v in ? k ? i out ? r out (3) and i out is represented by: i out = i in ?i q (4) k r out represents the impedance of the sac, and is a function of the r dson of the input and output mosfets and the winding resistance of the power transformer. i q represents the quiescent current of the sac control and gate drive circuitry. the use of dc voltage transformation provides additional interesting attributes. assuming for the moment that r out = 0 and i q = 0 a, eq. (3) now becomes eq. (1) and is essentially load independent. a resistor r is now placed in series with v in as shown in figure 18. the relationship between v in and v out becomes: v out = (v in ?i in ? r) ? k (5) substituting the simplified version of eq. (4) (i q is assumed = 0 a) into eq. (5) yields: v out = v in ? k ? i out ? r ? k 2 (6) + + v out c out v in v?i k + C + C c in i out r c out i q r out r c in l in = 5 nh 0.062 a 1/32 ? i out 1/32 ? v in 1.8 m r cin 6.3 m 61 ph 49 m r cout 130 130 f l out = 600 ph 900 nf i q l in = 3.7 nh i out r out v in v out r sac k = 1/32 vin vout + ? v in v out r sac? k = 1/32 figure 18 ? k = 1/32 sine amplitude converter? with series input resistor figure 17 ? v ? i chip? module ac model c out c in
rev. 2.2 5/2011 page 12 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm this is similar in form to eq. (3), where r out is used to represent the characteristic impedance of the sac?. however, in this case a real r on the input side of the sac is effectively scaled by k 2 with respect to the output. assuming that r = 1 , the effective r as seen from the secondary side is 0.98 m , with k = 1/32 as shown in figure 18. a similar exercise should be performed with the additon of a capacitor, or shunt impedance, at the input to the sac. a switch in series with v in is added to the circuit. this is depicted in figure 19. a change in v in with the switch closed would result in a change in capacitor current according to the following equation: i c (t) = c dv in (7) dt assume that with the capacitor charged to v in , the switch is opened and the capacitor is discharged through the idealized sac. in this case, i c =i out ? k (8) substituting eq. (1) and (8) into eq. (7) reveals: i out = c ? dv out (9) k 2 dt writing the equation in terms of the output has yielded a k 2 scaling factor for c, this time in the denominator of the equation. for a k factor less than unity, this results in an effectively larger capacitance on the output when expressed in terms of the input. with a k= 1/32 as shown in figure 19, c = 1 f would effectively appear as c = 1024 f when viewed from the output. low impedance is a key requirement for powering a high current, low voltage load efficiently. a switching regulation stage should have minimal impedance, while simultaneously providing appropriate filtering for any switched current. the use of a sac between the regulation stage and the point of load provides a dual benefit, scaling down series impedance leading back to the source and scaling up shunt capacitance (or energy storage) as a function of its k factor squared. however, these benefits are not useful if the series impedance of the sac is too high. the impedance of the sac must be low well beyond the crossover frequency of the system. a solution for keeping the impedance of the sac low involves switching at a high frequency. this enables magnetic components to be small since magnetizing currents remain low. small magnetics mean small path lengths for turns. use of low loss core material at high frequencies reduces core losses as well. the two main terms of power loss in the vtm? module are: - no load power dissipation (p nl ): defined as the power used to power up the module with an enabled power train at no load. - resistive loss (r out ): refers to the power loss across the vtm current multiplier modeled as pure resistive impedance. p dissipated = p nl + p r out (10) therefore, p out = p in ?p dissipated = p in ?p nl ?p r out (11) the above relations can be combined to calculate the overall module efficiency: = p out = p in ?p nl ?p r out (12) p in p in = v in ? i in ?p nl ?(i out ) 2 ? r out v in ? i in =1 ? ( p nl + (i out ) 2 ? r out ) v in ? i in c s sac k = 1/32 vin vout + ? v in v out c sac? k = 1/32 figure 19 ? sine amplitude converter? with input capacitor s
rev. 2.2 5/2011 page 13 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm 12.0 input and output filter design a major advantage of a sac? system versus a conventional pwm converter is that the former does not require large functional filters. the resonant lc tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving high power density. this paradigm shift requires system design to carefully evaluate external filters in order to: 1.guarantee low source impedance. to take full advantage of the vtm? module dynamic response, the impedance presented to its input terminals must be low from dc to approximately 5 mhz. input capacitance may be added to improve transient performance or compensate for high source impedance. 2.further reduce input and/or output voltage ripple without sacrificing dynamic response. given the wide bandwidth of the vtm module, the source response is generally the limiting factor in the overall system response. anomalies in the response of the source will appear at the output of the vtm module multiplied by its k factor. 3.protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures. the v ? i chip? module input/output voltage ranges must not be exceeded. an internal overvoltage lockout function prevents operation outside of the normal operating input range. even during this condition, the powertrain is exposed to the applied voltage and power mosfets must withstand it. 13.0 capacitive filtering considerations for a sine amplitude converter? it is important to consider the impact of adding input and output capacitance to a sine amplitude converter on the system as a whole. both the capacitance value, and the effective impedance of the capacitor must be considered. a sine amplitude converter has a dc r out value which has already been discussed in section 11. the ac r out of the sac contains several terms: ? resonant tank impedance ? input lead inductance and internal capacitance ? output lead inductance and internal capacitance the values of these terms are shown in the behavioral model in section 11. it is important to note on which side of the transformer these impedances appear and how they reflect across the transformer given the k factor. the overall ac impedance varies from model to model but for most models it is dominated by dc r out value from dc to beyond 500 khz. the behavioral model in section 11 should be used to approximate the ac impedance of the specific model. any capacitors placed at the output of the vtm module reflect back to the input of the module by the square of the k factor (eq. 9) with the impedance of the module appearing in series. it is very important to keep this in mind when using a prm? regulator to power the vtm? current multiplier. most prm regulators have a limit on the maximum amount of capacitance that can be applied to the output. this capacitance includes both the prm output capacitance and the vtm output capacitance reflected back to the input. in prm remote sense applications, it is important to consider the reflected value of vtm module output capacitance when designing and compensating the prm module control loop. capacitance placed at the input of the vtm module appear to the load reflected by the k factor, with the impedance of the module in series. in step-down vtm module ratios, the effective capacitance is increased by the k factor. the effective esr of the capacitor is decreased by the square of the k factor, but the impedance of the module appears in series. still, in most step-down vtm modules an electrolytic capacitor placed at the input of the module will have a lower effective impedance compared to an electrolytic capacitor placed at the output. this is important to consider when placing capacitors at the output of the module. even though the capacitor may be placed at the output, the majority of the ac current will be sourced from the lower impedance, which in most cases will be the vtm module. this should be studied carefully in any system design using a vtm module. in most cases, it should be clear that electrolytic output capacitors are not necessary to design a stable, well-bypassed system.
rev. 2.2 5/2011 page 14 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm v in v out + C dc z in_eq1 z in_eq2 z out_eq1 z out_eq2 load vtm1 r o_1 vtm2 r o_2 vtmn r o_n z out_eqn z in_eqn figure 20 ? vtm? module array 14.0 current sharing the sac? topology bases its performance on efficient transfer of energy through a transformer without the need of closed loop control. for this reason, the transfer characteristic can be approximated by an ideal transformer with some resistive drop and positive temperature coefficient. this type of characteristic is close to the impedance characteristic of a dc power distribution system, both in behavior (ac dynamic) and absolute value (dc dynamic). when connected in an array with the same k factor, the vtm? module will inherently share the load current with parallel units, according to the equivalent impedance divider that the system implements from the power source to the point of load. some general recommendations to achieve matched array impedances: ? dedicate common copper planes within the pcb to deliver and return the current to the modules. ? provide the pcb layout as symmetric as possible. ? apply same input / output filters (if present) to each unit. for further details see an:016 using bcm? bus converters in high power arrays . 15.0 fuse selection in order to provide flexibility in configuring power systems v ? i chip? products are not internally fused. input line fusing of v ? i chip products is recommended at system level to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: ? current rating (usually greater than maximum vtm module current) ? maximum voltage rating (usually greater than the maximum possible input voltage) ? ambient temperature ? nominal melting i 2 t 16.0 reverse inrush current protection the vtm48eh015t050a00 provides reverse inrush protection which prevents reverse current flow until the input voltage is high enough to first establish current flow in the forward direction. in the event that there is a dc voltage present on the output before the vtm module is powered up, this feature protects sensitive loads from excessive dv/dt during power up as shown in figure 21. if a voltage is present at the output of the module which satisfies the condition v out > v in ? k after a successful power up the energy will be transferred from secondary to primary. the input to output ratio of the module will be maintained. the module will continue to operate in reverse as long as the input and output voltages are within the specified range. the vtm48eh015t050a00 has not been qualified for continuous reverse operation. vc v in supply tm pc v out v in v out supply abcd efg h a: v out supply > 0 v b: vc to -in > 12 v controller wakes-up, pc & tm pulled high, reverse inrush protection blocks v out supplying v in c: v in supply ramps up d: v in > v out /k, powertrain starts in normal mode e: v in supply ramps down f: v in > v out /k, powertrain transfers reverse energy g: v out ramps down, v in follows h: vc turns off pc im vc tm -out +out -in +in r v in r supply + _ vtm? current multiplier figure 21 ? reverse inrush protection
rev. 2.2 5/2011 page 15 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm inch mm notes: . dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. p roduct marking on top surface dxf and pdf files are available on vicorpower.com 4 17.1 mechanical drawing 17.2 recommended land pattern mm (inch) notes: 1. maintain 3.50 (0.138) dia. keep-out zone free of copper, all pcb layers. 2. (a) minimum recommended pitch is 24.00 (0.945) this provides 7.50 (0.295) component edge?o?dge spacing, and 0.50 (0.020) clearance between vicor heat sinks. (b) minimum recommended pitch is 25.50 (1.004). this provides 9.00 (0.354) component edge?o?dge spacing, and 2.00 (0.079) clearance between vicor heat sinks. 3. v? chip module land pattern shown for reference only, actual land pattern may differ. dimensions from edges of land pattern to push?in holes will be the same for all half size v? chip products. 4. rohs compliant per cst?001 latest revision. 5. unless otherwise specified: dimensions are mm (inches) tolerances are: x.x (x.xx) = ?.13 (0.01) x.xx (x.xxx) = ?.13 (0.005) 6. plated through holes for grounding clips (33855) shown for reference. heat sink orientation and device pitch will dictate final grounding solution. (no grounding clips) (with grounding clips) 17.3 recommended land pattern for push pin heat sink pc vc tm im bottom view 4 3 2 1 +out -out +in -in a b c d j k l m e f g h a1-b1, a2-b2 l1-m1, l2-m2 e1 f2 g1 h2 a3-d3, a4-d4 j3-m3, j4-m4 signal name designation +in ?in im tm vc pc +out ?out inch mm notes: . dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. p roduct marking on top surface dxf and pdf files are available on vicorpower.com 4
rev. 2.2 5/2011 page 16 of 16 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com 015 050a00 x eh 48 vtm vicor?s comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. all sales are subject to vicor?s terms and conditions of sale, which are available upon request. specifications are subject to change without notice. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. interested parties should contact vicor's intellectual property department. the products described on this data sheet are protected by the following u.s. patents numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; d496,906; d505,114; d506,438; d509,472; and for use under 6,975,098 and 6,984,965. warranty vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. this warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. vicor shall not be liable for collateral or consequential damage. this warranty is extended to the original purchaser only. except for the foregoing express warranty, vicor makes no warranty, express or implied, including, but not limited to, the warranty of merchantability or fitness for a particular purpose. vicor will repair or replace defective products in accordance with its own best judgement. for service under this warranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all reshipment charges if the product was defective within the terms of this warranty. information published by vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. per vicor terms and conditions of sale, the user of vicor components in life support applications assumes all risks of such use and indemnifies vicor against all damages. vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com

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