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? 2001 microchip technology inc. ds51140d-page 1 m mplab ? ice contents 1.0 introduction ................................................ 1 2.0 terminology ................................................. 1 3.0 processor modules .................................. 2 4.0 emulator-related issues......................... 4 5.0 device adapter issues .............................. 5 1.0 introduction the processor modules for mplab ice are interchangeable personality modules that allow mplab ice to be reconfigured for emulation of differ- ent picmicro ? microcontrollers (mcus). this modular- ity allows the emulation of many different devices by the addition of just a processor module and device adapter, which makes for a very cost effective multipro- cessor emulation system. the device adapters for mplab ice are interchange- able assemblies that allow the emulator system to interface to a target application system. device adapt- ers also have control logic that allows the target appli- cation to provide a clock source and power to the processor module. the device adapters support pic- micro mcus in dip, sdip, and plcc packages. transition sockets, used along with a device adapter, provide a method of accommodating all picmicro mcu packages, including soic, ssop, pqfp, and tqfp packages. 2.0 terminology a brief overview of the different components of the sys- tem is shown in the figure below. each component is discussed in the following subsections. figure 2-1: mplab ice emulator system 2.1 host to pod cable this is a standard parallel interface cable. mplab ice is tested with a 6-foot cable. a longer cable may work, but is not guaranteed. the cable connects to a parallel port on the pc. if a pc has a printer connected to an lpt device, it is recommended that an additional inter- face card be installed, rather than using a splitter or an a/b switch. 2.2 emulator pod the emulator pod contains emulator memory and con- trol logic. mplab ice 2000 contains a main board and an additional board for expanded trace memory and complex control logic. there are no field serviceable parts in the pod. for more information on the pod, see the mplab ice user?s guide (ds51159). the mplab ice processor module is inserted into the pod for operation. 2.3 processor module the processor module contains the emulator chip, logic and low-voltage circuitry. there are no field ser- viceable parts mounted on the printed circuit board housed within the processor module enclosure. host to pod cable emulator pod processor module flexible circuit logic probe connector device cable transition adapter socket processor module and device adapter specification mplab is a registered trademark of microchip technology inc. picmaster is a registered trademark of microchip technology inc.
mplab ? ice ds51140d-page 2 ? 2001 microchip technology inc. 2.4 flex circuit cable once the processor module is inserted into the emula- tor pod, the flex circuit cable extends the emulator sys- tem to the target application. this is a custom cable that is attached inside the processor module enclosure and can be replaced in the field by removing the end cap of the processor module enclosure. please, do not pull on the flex circuit cable to remove the processor module from the pod. use the fins of the processor module end cap to leverage the module from the pod. 2.5 device adapter the device adapter provides a common interface for the device being emulated. they are provided in stan- dard dip and plcc styles. the adapter also contains a special device that provides an oscillator clock to accurately emulate the oscillator characteristics of the picmicro mcu. 2.6 transition socket transition sockets are available in various styles to allow a common device adapter to be connected to one of the supported surface mount package styles. transition sockets are available for various pin counts and pitches for soic, qfp and other styles. for more information on transition sockets, see the mplab ice transition socket specification (ds51194). an emulator system consists of the following compo- nents which are ordered separately: an emulator pod (including the host-to-pod cable and power supply) a processor module (including the flex circuit cable) a device adapter an optional transition socket (for surface mount emulation) 3.0 processor modules processor modules are identified on the top of the assembly (e.g., pcm17xa0). to determine which pro- cessors are supported by a specific module, refer to the latest development systems ordering guide (ds30177) or product line card (ds00148). both can be found on our web site (www.microchip.com). a typical processor module contains a special bond- out version of a picmicro mcu, device buffers to con- trol data flow and control logic. it provides the means of configuring the mplab ice emulator for a specific pic- micro mcu family and handles low-voltage emulation when needed. 3.1 power the operating voltage for most of the control logic and buffering on the processor module is +5v and is supplied by the emulator pod. power to the emulator processor and some of its surrounding buffers is user selectable, and can be powered by the emulator pod (at +5v only) or the target application system (from 2.0v to 5.5v). this is software selectable and is config- urable through the mplab ide software. at no time will the emulator system directly power the target applica- tion system. always insert the processor module into the emulator pod before applying power to the pod. when connecting to a target application system, the user may notice a voltage level on the target application even though they have not yet applied power to the tar- get application circuit. this is normal, and is due to cur- rent leakage through v cc of the device adapter. the current leakage will typically be less than 20 ma. however, if the target application is using a voltage regulator, it should be noted that some regulators require the use of an external shunt diode between v in and v out for reverse-bias protection. refer to the manufacturer ? s data sheets for additional information. 3.1.1 emulator processor power supplied by emulator system if the emulator system is selected to power the emulator processor in the processor module, the emu- lator system can be operated without being connected to a target application. if the system is being connected to a target application, the power to the pod should be applied before applying power to the target application. note that the target application system ? s v cc will expe- rience a small current load (10 ma typical) when the emulator system is connected via a device adapter. this is because the target system must always power the clock chip in the processor module. 3.1.2 emulator processor power supplied by target application system when the mplab ide software is brought up, the emu- lator system is first initialized with the emulator system powering the emulator processor. the ? processor power supplied by target board ? option may then be selected using the power tab of the options>develop- ment mode dialog to power the processor module from the target board. when operating from external power, the processor module will typically represent a current load equivalent to the device being emulated (according to its data sheet) plus approximately 100 ma. keep in mind that the target application will affect the overall current load of the processor module, dependent upon the load placed upon the processor i/o. note: when removing the processor module, do not pull on the flex cable. use the tabs on the processor module or damage to the flex cable may occur.
? 2001 microchip technology inc. ds51140d-page 3 processor module and device adapter specification when the processor power is supplied by the target application system, an external clock (from the target board) may also be provided. mplab ide will not allow use of an external clock without the use of external power. 3.1.3 operating voltage of 4.6 to 5.5 volts if the target application system ? s operating voltage is between 4.55v (120 mv) and 5.5v, the processor module will consider this a standard voltage condition. in this mode the processor can run to its highest rated speed (as indicated in its data sheet). the recommended power-up sequence is: 1. apply power to the pc host. 2. apply power to the emulator pod and processor module assembly. 3. invoke mplab ide. 4. configure system for processor power supplied by target board through the power tab of the options/development mode dialog box. 5. at the error message, apply power to the target application circuit. then acknowledge the error. 6. issue a system reset (from the debug menu) before proceeding. 3.1.4 operating voltage of 2.0 to 4.6 volts if the target application system ? s operating voltage is between 2.0v and 4.55v (120 mv), the processor module will consider this a low voltage condition. in this mode the processor is limited to its rated speed at a given voltage level (as indicated in its data sheet). to minimize the amount of reverse current that the tar- get system is exposed to, the recommended power-up sequence is: 1. apply power to the pc host. 2. apply power to the emulator pod and processor module assembly. 3. invoke mplab ide. 4. configure system for processor power supplied by target board through the power tab of the options/development mode dialog box. 5. at the error message, apply power to the target application circuit. then acknowledge the error. 6. issue a system reset (from the debug menu) before proceeding. 7. select options > development mode and click the power tab. verify that the dialog says ? low voltage enabled. ? click cancel to close the dia- log. 3.2 operating frequency the processor modules will support the maximum frequency (except where noted in section 4.0) of the device under emulation. note that the maximum fre- quency of a picmicro mcu device is significantly lower when the operating voltage is less than 4.5v. the processor modules will support a minimum frequency of 32 khz. when operating at low frequen- cies, response to the screen may be slow. 3.3 clock options mplab ice allows internal and external clocking. when set to internal, the clock is supplied from the internal programmable clock, located in the emulator pod. when set to external, the oscillator on the target application system will be utilized. 3.3.1 clock source from emulator refer to the mplab ice user ? s guide (ds51159), ? chapter 3, using the on-board clock ? for configuring mplab ide to supply the clock source. 3.3.2 clock source from the target application if the target application is selected to provide the clock source, the target board must also be selected to power the emulator processor (see the mplab ice user ? s guide (ds51159), ? chapter 3. using a target board clock ? ). at low voltage, the maximum speed of the processor will be limited to the rated speed of the device under emulation. an oscillator circuit on the device adapter generates a clock to the processor module and buffers the clock cir- cuit on the target board. in this way, the mplab ice emulator closely matches the oscillator options of the actual device. all oscillator modes are supported (as documented in the device ? s data sheet) except as noted in section 4.0. the osc1 and osc2 inputs of the device adapter have a 5 pf to 10 pf load. note this when using a crystal in hs, xt, lp or lf modes, or an rc network in rc mode. the frequency of the emulated rc network may vary relative to the actual device due to emulator circuitry. if a specific frequency is important, adjust the rc values to achieve the desired frequency. another alternative would be to allow the emulator to provide the clock as described in section 3.3.1. 3.4 esd protection and electrical overstress all cmos chips are susceptible to electrostatic discharge (esd). in the case of the processor mod- ules, the pins of the cmos emulator are directly con- nected to the target connector, making the chip vulnerable to esd. note that esd can also induce
mplab ? ice ds51140d-page 4 ? 2001 microchip technology inc. latch-up in cmos chips, causing excessive current through the chip and possible damage. mplab ice has been designed to minimize potential damage by implementing over-current protection and transient suppressors. however, care should be given to mini- mizing esd conditions while using the system. during development, contention on an i/o pin is possi- ble (e.g., when an emulator pin is driving a ? 1 ? and the target board is driving a ? 0 ? ). prolonged contention may cause latch-up and damage to the emulator chip. one possible precaution is to use current limiting resistors (~100 ? ) during the development phase on bidirectional i/o pins. using limiting resistors can also help avoid damage to modules, device adapters and pods that occurs when a voltage source is accidentally connected to an i/o pin on the target board. 3.5 freeze mode the mplab ice system allows the option of ? freezing ? peripheral operation or allowing them to continue oper- ating when the processor is halted. this option is con- figured in the mplab ide. the freeze function is available on all processor modules except the pcm16xa0. this function is useful to halt an on-board timer while at a break point. note that at a break point and while sin- gle stepping, interrupts are disabled. 4.0 emulator-related issues the following general limitations apply to the mplab ice 2000 emulator. all configuration bit settings are enabled/disabled through options>development mode of mplab ide rather than through mpasm _ _config directive. the reset processor ( debug>run>reset ) func- tion in mplab ide will not currently wake the pro- cessor if it is in sleep mode. to wake the processor, you must use debug>system reset . do not single step into a sleep instruction. if you do step into a sleep instruction, you will need to select debug>system reset in order to wake up the processor module. initiating a master clear on the mclr pin will not reset the processor if you are in step or animate mode. debug > power on reset randomizes gprs, (i.e., sfr's are not set to por values). this can help in debugging. if your application works on the emulator but not the simulator, try using this fea- ture. device-specific limitations can be found in mplab ide by selecting options > development mode and clicking the details button.
? 2001 microchip technology inc. ds51140d-page 5 processor module and device adapter specification 5.0 device adapter issues this section details processor-specific considerations that have been made on device adapters. only adapt- ers with special considerations are listed. there will be a max of 10 ma of current draw from the users target system even when the emulator processor module is being powered by the emulator system, and running internal clock. this is due to components on the device adapter being powered by the user target board. 5.1 dva12xp080 this device adapter is intended for use with pic12c50x 8-pin dip devices. it has four mechanical switches that allow target pins gp2 to gp5 to be routed to the emulator silicon on the pcm16xa0 processor module or the oscillator chip on the device adapter, as shown in table 5-1. in addition, a 24c00 eeprom (u1) is connected to ra0 and ra1 of the emulator silicon to support the eeprom capabilities of the pic12ce51x family devices. for information on how to use eeprom memory, see the online device-specific limitations for the pcm16xa0, pic12ce518/519 devices by select- ing options > development mode and clicking the details button. 5.2 dva12xp081 this device adapter is intended for use with pic12c67x 8-pin dip devices. it has two mechanical switches that allow target pins gp4 and gp5 to be routed to the emulator silicon on the pcm12xa0 pro- cessor module or the oscillator device on the device adapter, as shown in table 5-2. 5.3 dva16xp140 this device adapter is intended for use with the pic16c505 14-pin dip device. it has four mechanical switches. two of the switches allow target pins rb4 and rb5 to be routed to the emulator silicon on the pcm16xa0 processor module or the oscillator device on the device adapter. the other two switches control the routing of rb3 and rc5 signals. rb3 can be a gen- eral-purpose input or mclr . rc5 can be a general purpose i/o or can drive the tocki input, as shown in table 5-3. 5.4 dva16xp182 this device adapter is intended for use with pic16c712/716 18-pin dip devices. it has a second oscillator device that allows timer1 oscillator input ranging from 32-40 khz. it has four mechanical switches. target pins rb1 and rb2 can be routed to the emulator silicon on the pcm16xe1 processor mod- ule or the timer1 oscillator device on the device adapter. target pin rb1 is routed to t1cki. target pin rb3 can be a general purpose input or ccp1, as shown in table 5-4. 5.5 dva16xp200 this device adapter is intended for use with pic16c770/771 20-pin dip devices. it has three mechanical switches that allow target pins ra6 and ra7 to be routed to the emulator silicon on the pcm16xm0 processor module or the oscillator device on the device adapter. target pin ra5 routed mclr of the emulator silicon on the pcm16xm0, as shown in table 5-5. target pins rb6 and rb7 can be routed (via software) to the emulator silicon of the pcm16xm0 or to a sec- ond oscillator supporting a timer1 oscillator input ranging from 32 to 40 khz. 5.6 dva16xp282, dva16xp401, dva16xl441, and dva16pq441 these device adapters are intended for use with pic- micro mcu devices supported by the pcm16xb0/b1, pcm16xe0/e1, pcm16xk0, pcm16xl0, and the pcm18xa0 processor modules. the device adapters have a second oscillator device that allows timer1 oscillator input ranging from 32 to 40 khz. for pcm16xb0/b1, pcm16xe0/e1, pcm16xk0 and pcm16xl0, configure jumper j1 per table 5-6. for pcm18xa0 leave the jumper on pins 1-2 ( off ); the timer1 oscillator enable/disable function is software configurable. 5.7 dva17xxxx0 these device adapters are intended for use with pic- micro mcu devices supported by the pcm17xa0 pro- cessor module. in all processors in ec mode, osc/4 is not supported. osc/4 in ec mode is supported in dva17xxxx1 device adapters. 5.8 emulating a .600 28-pin part when emulating a .600 wide, 28-pin device, an adapter will be needed to convert the standard .300 wide socket on the device adapters to the .600 wide socket on the target board. there are many adapters available for this purpose, such as digi-key part number a502-nd.
mplab ? ice ds51140d-page 6 ? 2001 microchip technology inc. table 5-1: dva12xp080 device adapter switch assignment desired function switch positions rb2 set s4 to rb2 . rb3 set s3 to rb3 . rb4 set s2 to rb4 . rb5 set s1 to rb5 . mclr set s3 to mclr . external oscillator input set s1 to osc1 and set s2 to osc2 . timer0 clock input set s4 to t0clk . table 5-2: dva12xp081 device adapter switch assignment desired function switch positions gp4 set s2 to gp4 . gp5 set s1 to gp5 . external oscillator input set s1 to osc1 and set s2 to osc2 . table 5-3: dva16xp140 device adapter switch assignment desired function switch positions rc5 set s4 to rc5 . rb3 set s3 to rb3 . rb4 set s2 to rb4 . rb5 set s1 to rb5 . mclr set s3 to mclr . external oscillator input set s1 to osc1 and set s2 to osc2 . timer0 clock input set s4 to tocki .
? 2001 microchip technology inc. ds51140d-page 7 processor module and device adapter specification table 5-4: dva16xp182 device adapter switch assignment desired function switch positions rb1 set s2-1 to position b . rb2 set s2-2 to position b . rb3 set s2-3 to position b . ccp1 set s2-3 to position a . timer1 clock input set s2-1 to position a and set s1 to position b . timer1 oscillator input set s2-1 to position a and set s2-2 to position a and set s1 to position a . table 5-5: dva16xp200 device adapter switch assignment desired function switch positions ra5 set s1 to ra5 . ra6 set s3 to ra6 . ra7 set s2 to ra7 . mclr set s1 to mclr . external oscillator input set s3 to osc1 and set s2 to osc2 . table 5-6: dva16xp282, dva16xp401, dva16xl441, and dva16pq441 jumper settings desired function switch positions timer1 oscillator input enabled short j1 pins 2-3 ( on ). timer1 oscillator input disabled short j1 pins 1-2 ( off ).
mplab ? ice ds51140d-page 8 ? 2001 microchip technology inc. notes:
? 2001 microchip technology inc. ds51140d-page 9 processor module and device adapter specification notes:
mplab ? ice ds51140d-page 10 ? 2001 microchip technology inc. notes:
? 2001 microchip technology inc. ds51140d-page 11 ? all rights reserved. copyright ? 2001, microchip technology incorporated, usa. information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. no rep- resentation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accu- racy or use of such information, or infringement of patents or other intellectual property rights arising from such use or oth- erwise. use of microchip ? s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. the microchip logo and name are registered trademarks of microchip technology inc. in the u.s.a. and other countries. all rights reserved. all other trademarks mentioned herein are the property of their respective companies. no licenses are conveyed, implicitly or otherwise, under any intellectual prop- erty rights. ? trademarks the microchip name, logo, pic, picmicro, picmaster, pic- start, pro mate, k ee l oq , seeval, mplab and the embedded control solutions company are registered trade- marks of microchip technology incorporated in the u.s.a. and other countries. total endurance, in-circuit serial programming (icsp), filter- lab, flexrom, fuzzylab, icepic, microid, mpasm, mplib, mplink, mxdev, picdem and migratable memory are trademarks of microchip technology incorporated in the u.s.a. serialized quick term programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2001, microchip technology incorporated, printed in the u.s.a., all rights reserved. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999. the company ? s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms and microperipheral products. in addition, microchip ? s quality system for the design and manufacture of development systems is iso 9001 certified.
information contained in this publication regarding device applications and the like is intended through suggestion only and ma y be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warrant y is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patent s or other intellectual property rights arising from such use or otherwise. use of microchip ? s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. the microchip logo and name are registered trademarks of microchip technology inc. in the u.s.a. and othe r countries. all rights reserved. all other trademarks mentioned herein are the property of their respective companies. ds51140d-page 12 ? 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