09/11/02 IRDCIP1001-B, 200khz to 300khz, 20a, 5v in to 12v in single phase synchronous buck converter using ip1001 overview in this document, table 1 and figure 1 are provided to enable engineers to easily evaluate the ip1001 in a single phase configuration that is capable of providing up to 20a in a lab environment without airflow. figures 3, 4, 5 and 6 and the complete bill of materials in table 2 are provided as a reference design to enable engineers to very quickly and easily design a single phase converter. in order to optimize this design to your specific requirements, refer to the ip1001 data sheet for guidelines on external component selection and user adjustable limits and specifications for the ip1001. custom designs may require layout modifications. demoboard quick start guide initial settings: z the output is set to 1.3v, but can be adjusted from 0.925v to 2.0v by setting sw1 according to the vid codes provided in table 1. the output voltage can be adjusted to allow up to 3.3v out by adding r3 & r4 with the dac set to 2v out . refer to equation 1 for r3 & r4 values. r4 should be removed for output voltages below 2v, and r3 should be set to zero ohms (see table 2). z the switching frequency is centered around 300khz with the freq pin floating. z the input voltage range can be extended below 5v in by populating the mini-boost circuit on the demo board. refer to irdcip1001-a reference design documentation for direction on changing the configuration of the demo board. procedure for connecting and powering up demoboard: 1. apply input voltage (5v - 12v) across v in and pgnd. the input voltage (v in ) pin and logic power pin (v dd ) are provided as separate inputs. for 5v in operation only, the v in and v dd pins can be connected together. for logic power (v dd ), connect 5v power source across +5v (tp1) and pgnd (tp2). 2. apply load across vout pad and pgnd pad. 3. the enable pin is controlled via switch 8 on sw1. this pin is supplied in low state. once pulled high the output is enabled. 4. adjust load accordingly. IRDCIP1001-B recommended operating conditions (refer to the ip1001 datasheet for maximum operating conditions) input voltage: 4.5 - 12v (v dd = 4.5v to 5.5v) output voltage: dac selectable between 0.925v - 2.0v (with extended operating range to 3.3v with r3 & r4) output current: up to 20a depending on duty factor (refer to load line curve in fig. 1). switching freq : 200khz or 300khz selectable. IRDCIP1001-B international rectifier ? 233 kansas street, el segundo, ca 90245 usa r eference d esign r eference d esign min max v in 4.5v 12v v out 0.925v 3.3v i out IRDCIP1001-B demoboa rd operatng conditions see fig.1
www.irf.com 2 IRDCIP1001-B table 1 - pwm ic voltage identification codes fig. 1 - load line curve * shutdown : upon receipt of the shutdown code (per vid code table above), both fets are turned off and the output is discharged as it enters uvp fault mode. for output voltages above the dac maximum setting of 2v, refer to equation 1 below to calculate the required resistor values for r3 & r4 (needed in order to achieve the extended output voltage range). 0 5 10 15 20 25 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 v in = 3.3v, 200khz v in = 5v to 12v 200khz/300kh z d4 d3 d2 d1 d0 output voltage (v) d4 d3 d2 d1 d0 output voltage (v) 000002.00 100001.275 000011.95 100011.250 000101.90 100101.225 000111.85 100111.200 001001.80 101001.175 001011.75 101011.150 001101.70 101101.125 001111.65 101111.100 010001.60 110001.075 010011.55 110011.050 010101.50 110101.025 010111.45 110111.000 011001.40 111000.975 011011.35 111010.950 011101.30 111100.925 0 1 1 1 1 shutdown* 1 1 1 1 1 shutdown* equation 1 : vout = v f x (1 + r3/r4) where v f is equal to the dac setting and r4 is recommended to be ~1k ?
www.irf.com 3 IRDCIP1001-B refer to the following application notes for detailed guidelines and suggestions when implementing ip0wir technology products: an-1028: recommended design, integration and rework guidelines for international rectifier?s ipowir technology bga packages this paper discusses the assembly considerations that need to be taken when mounting ipowir bga?s on printed circuit boards. this includes soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. an-1029: optimizing a pcb layout for an ipowir technology design this paper describes how to optimize the pcb layout design for both thermal and electrical performance. this includes placement, routing, and via interconnect suggestions. an-1030: applying ipowir products in your thermal environment this paper explains how to use the power loss and soa curves in the data sheet to validate if the operating conditions and thermal environment are within the safe operating area of the ipowir product. fig. 2 - typical efficiency vs. current 84% 86% 88% 90% 92% 94% 96% 0 5 10 15 20 output current (a) efficiency 5vin, 1.5vout, 300khz 12vin, 1.5vout, 300khz t a = 25c
www.irf.com 4 IRDCIP1001-B fig. 3 - reference design schematic c6 10uf c5 10uf c4 10uf c3 10uf l1 1.06uh 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 sw1 c16 0.1f c2 10uf c1 10uf r3 pgnd c11 470uf d1 10mq040n r2 r5 r4 c7 10uf c8 10uf c9 10uf c10 10uf r6 0 r1 0 +5v vos vo d1 d2 gnd d4 enable pgnd d0 d3 vsw vdd pgood vf sgnd vfs vin freq ilim vin vout pgnd tp3 tp4 tp5 tp2 tp1 ip1001 +5v r7 340k, 1% c12 470uf c13 470uf u1 25v 25v 25v 25v 25v 25v 25v 25v 25v 25v c14 470uf 6.3v 6.3v 6.3v 6.3v 5v-12v
www.irf.com 5 IRDCIP1001-B fig. 4 - component placement top layer fig. 5 - component placement bottom layer
www.irf.com 6 IRDCIP1001-B table 2 - reference design bill of materials adjusting the current limit ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: ++ 1 310 252 7105 technical assistance center (tac) fax : ++ 1 310 252 7903 use of this design for any application should be fully verified by the customer. international rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. 0 100 200 300 400 500 600 700 800 900 6 111621263136 typical current limit setting in amps current limit resistor rlim in kohms fig. 6 current limit adjustment using r lim IRDCIP1001-B (for operation 5v in to 12v in ) designator value part type footprint mfr. mfr. p/n c1 c2 c3 c4 c5 c6 c7 c8 c9 c10 10.0uf capacitor, 25v, 10%, x5r 1812 murata grm43-2x5r106k25a c11 c12 c13 c14 470uf capacitor, 6.3v, 20%, tantalum 7343 sanyo 6tpb470m c16 0.100uf capacitor, 50v, 10%, x7r 1206 novacap 1206b104k500n c15, c17, c18, c19, c20, c21 - not installed - - - d1 40v schottky diode, 40v, 2.1a d-64 international rectifier 10mq040n jp1, jp2, jp3 - not installed - - - jp1-1, jp2-1, jp3-1 - not installed - - - l1 1.06uh inductor, 16a, 20%, ferrite smt panasonic etqp6f1r1bfa l2 - not installed - - - r1 0 : resistor, 0 : jum p er 2716 isotek corp smt-r000 r2 - for <2vout, not installed for >2vout, resistor, 0 : jum p er smt - - r3 - for <2vout, resistor, 0 : jumper for >2vout see formula for value smt - - r4 - for <2vout, not installed for >2vout recommend 1k : see formula for detail smt - - r5 - for <2vout, resistor, 0 : jumper for >2vout, not installed 1206 panasonic erj-8gey0r00 r6 0 : resistor, 0 : jum p er 1206 - - r7 340k : resistor, 340k : , 1% 340k : sets for 20a limit. see ilim formula for other values 1206 rohm mcr18ezhf3403 r8, r9 - not installed - - - sw1 - 8-position dip switch smt c&k components sd08h0sk tp1 tp2 tp4 tp5 - test point - keystone 1502-2 tp3 - not installed - - - u1 - power block ssbga 14mmx14mm international rectifier ip1001 u2 - not installed - - -
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