dual full-bridge pwm motor driver the udn2916b, udn2916eb, and udn2916lb motor drivers are designed to drive both windings of a bipolar stepper motor or bidirectionally control two dc motors. both bridges are capable of sustaining 45 v and include internal pulse-width modulation (pwm) control of the output current to 750 ma. the outputs have been opti- mized for a low output saturation voltage drop (less than 1.8 v total source plus sink at 500 ma). for pwm current control, the maximum output current is deter- mined by the user?s selection of a reference voltage and sensing resistor. two logic-level inputs select output current limits of 0, 33, 67, or 100% of the maximum level. a phase input to each bridge determines load current direction. the bridges include both ground clamp and flyback diodes for protection against inductive transients. internally generated delays prevent cross-over currents when switching current direction. special power-up sequencing is not required. thermal protection circuitry disables the outputs if the chip temperature exceeds safe operating limits. the udn2916b is supplied in a 24-pin dual in-line plastic batwing package with a copper lead-frame and heat sinkable tabs for improved power dissipation capabilities. the udn2916eb is supplied in a 44- lead power plcc for surface mount applications. the udn2916lb is supplied in a 24-lead surface-mountable soic. their batwing construc- tion provides for maximum package power dissipation in the smallest possible construction. the udn2916b, udn2916eb, and udn2916lb are available for operation from ?20c to 85c. the udq2916b and udq2916lb are available for operation from ?40c to 105c. all packages are lead (pb) free, with 100% matte tin leadframe. features 750 ma continuous output current 45 v output sustaining voltage internal clamp diodes internal pwm current control low output saturation voltage internal thermal shutdown circuitry similar to dual pbl3717, uc3770 udn2916b (dip) 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 2 1 v cc 2 v bb 1 ground ground ground ground 02 i 12 i phase 2 v ref 2 2 rc 1 rc v ref 1 phase 1 11 i 2b out sense 2 2 e 2a out 1a out 1 e sense 1 1b out 01 i load supply logic supply dwg. pp-005 pwm 1 pwm 2 data sheet 29319.20l absolute maximum ratings at t j 150c motor supply voltage, v bb .................... 45 v output current, i out (peak) ........................................ +1.0 a (continuous) .......................... +750 ma logic supply voltage, v cc ................... 7.0 v logic input voltage range, v in ......................... -0.3 v to v cc +0.3 v output emitter voltage, v e .................. 1.5 v package power dissipation, p d ........................................................ see graph operating temperature range, t a ................................. -20c to +85c storage temperature range, t s ............................... -55c to +150c output current rating may be limited by duty cycle, ambient temperature, and heat sinking. under any set of conditions, do not exceed the specified peak current rating or a junction temperature of +150c. 2916
115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 2916 dual full-bridge motor driver 2 * pb-based variants are being phased out of the product line. the variants cited in this footnote are in production but have been determined to be last time buy. this classification indicates that sale of this device is currently restricted to existing customer applications. the variants should not be purchased for new design applications because obsolescence in the near future is probable. samples are no longer available. status change: october 31, 2006. deadline for receipt of last time buy orders: april 27, 2007. these variants inclu de: udn2916b, udq2916eb, udn2916eb, udq2916ebtr, udn2916ebtr, udn2916lb, udq2916lb, udq2916lbtr, and udn2916lbtr. part number pb-free * package packing ambient temperature (c) udn2916b-t yes 24-pin dip 15 per tube ?20 to 85 udq2916b-t yes 24-pin dip 15 per tube ?40 to 105 udn2916eb-t yes 44-lead plcc 17 per tube ?20 to 85 udn2916ebtr-t yes 44-lead plcc 450 per reel ?20 to 85 udn2916lb-t yes 24-lead soic 31 per tube ?20 to 85 udn2916lbtr-t yes 24-lead soic 1000 per reel ?20 to 85 UDQ2916LBTR-T yes 24-lead soic 1000 per reel ?40 to 105 selection guide
115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 2 9 1 6 du a l f u ll - br id g e m o t o r d r i v e r 3 v bb 24 23 22 21 20 19 18 17 16 15 14 13 g r o u n d g r o u n d 2b o u t sense 2 2 e 2a o u t 1a o u t 1 e sense 1 1b o u t 01 i load supply d w g . p p - 0 4 7 1 2 3 4 5 6 7 8 9 12 11 10 9 g r o u n d g r o u n d 02 i 12 i phase 2 v r e f 2 2 r c v c c 1 r c v r e f 1 phase 1 11 i logic supply pw m 2 pw m 1 1 2 2 1 v r e f 2 gnd gnd gnd gnd 6 5 4 3 2 1 44 43 42 41 40 7 8 9 10 11 12 13 14 15 16 17 29 30 39 38 37 36 35 34 33 32 31 28 27 26 25 24 23 22 21 20 19 18 dwg. pp-006a 1 2 pw m 1 pw m 2 logic supply o u t 1a e 1 sense 1 i 01 v re f 1 phase 1 1 r c 1 i 11 o u t 1b load supply e 2 o u t 2a i 02 sense 2 phase 2 2 r c 2 i 12 o u t 2b v c c v bb no connection no connection n c nc 50 7 5 10 0 125 150 5 1 0 al l o w able p a c k a ge power dissi p a tion in w a t t s tempe r a ture in c 4 3 2 25 d w g . g p -035b r = 6.0c/w suffix 'b ' , r = 40c/w suffix 'lb ' , r = 55c/w* suffix 'eb ' , r = 30c/w jt ja ja ja *measured on a single-layer board, with 1 sq. in. of 2 oz copper area. for additional information, refer to the allegro w eb site. udn2916eb (plcc) udn2916lb ( soi c ) pwm current-control circuitry truth table p ha s e o u t a o u t b h h l l l h copyright ? 1994, 2003, 2007 allegro microsystems, inc. v ref dwg . ep -00 7 b v bb sense one shot source disable r c ? + i 0 i 1 10 e o u t a o u t b 'b' package, channel 1 pin numbers shown. r c r s r t c c c t 24 20 k 40 k 10 k 21 1 23 22 14 20 17 15
2916 dual full-bridge motor driver www.allegromicro.com 3 limits characteristic symbol test conditions min. typ. max. units output drivers (out a or out b ) motor supply range v bb 10 ? 45 v output leakage current i cex v out = v bb ? < 1.0 50 a v out = 0 ? 115 northeast box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 2916 dua l fu ll -bridg e mo t o r d r i ve r 5 applications information pwm current control the udn2916b/eb/lb dual bridges are designed to drive both windings of a bipolar stepper motor. output current is sensed and controlled independently in each bridge by an external sense resistor (r s ), internal com- parator, and monostable multivibrator. when the bridge is turned on, current increases in the motor winding and it is sensed by the external sense resistor until the sense voltage (v sen s e ) reaches the level set at the comparator?s input: i trip = v r e f / 10 r s the comparator then triggers the monostable which turns off the source driver of the bridge. the actual load current peak will be slightly higher than the trip point (especially for low-inductance loads) because of the internal logic and switching delays. this delay (t d ) i s typically 2 s. after turn-o , the motor current decays, circulating through the ground-clamp diode and sink transistor. the source driver?s off time (and therefore the magnitude of the current decrease) is determined by the monostable?s external rc timing components, where t = r t o c t within the range of 20 k ? to 100 k ? a n d 100 pf to 1000 pf. the xed-o time should be short enough to keep the current chopping above the audible range (< 46 s) and long enough to properly regulate the current. be- cause only slow-decay current control is available, short o times (< 10 s) require additional e orts to ensure proper current regulation. factors that can negatively a ect the ability to properly regulate the current when using short o times include: higher motor-supply volt- age, light load, and longer than necessary blank time. when the source driver is re-enabled, the winding current (the sense voltage) is again allowed to rise to the comparator?s threshold. this cycle repeats itself, main- taining the average motor winding current at the desired l eve l . loads with high distributed capaci-tances may result in high turn-on current peaks. this peak (appear- ing across r s ) will attempt to trip the comparator, result- ing in erroneous current control or high-frequency oscillations. an external r c c c time delay should be used to further delay the action of the comparator. depending on load type, many applications will not require these external components (sense connected to e). pwm output current wave form load current paths + ? 0 d w g . w m - 00 3 - 1 a v p h a s e i o u t t d t o i t r i p d w g . e p - 00 6 - 1 r s b b v b r i d g e o n s o u r c e o f f a l l o f f
2916 dual full-bridge motor driver www.allegromicro.com 6 logic control of output current two logic level inputs (l 0 a nd i 1 ) allow digital selection of the motor winding current at 100%, 67%, 33%, or 0% of the maximum level per the table. the 0% output current condition turns off all drivers in the bridge and can be used as an output enable function. current-control truth table l 0 i 1 output current l l v r e f / 10 r s = i t r i p h l v r e f / 15 r s = 2/3 i t r i p l h v r e f / 3 0 r s = 1/3 i t r i p 0 h h these logic level inputs greatly enhance the implementation of p-controlled drive formats. during half-step operations, the l 0 a n d l 1 allow the p to control the motor at a constant torque between all positions in an eight-step typical application sequence. this is accomplished by digitally selecting 100% drive current when only one phase is on and 67% drive current when two phases are on. logic highs on both l 0 an d l 1 turn off all drivers to allow rapid current decay when switching phases. this helps to ensure proper motor operation at high step r a t e s. the logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for ?hold? condi- tions and/or increased current (and available torque) for start-up conditions. g e n e r a l the phase input to each bridge determines the direction motor winding current ows. an internally generated deadtime (approximately 2 s) prevents crossover currents that can occur when switching the phase input. all four drivers in the bridge output can be turned off between steps (l 0 = l 1 2. 4 v ) resulting internal output clamp and yback diodes. the in a fast current decay through the fast current decay is desirable in half-step and high-speed applications. the phase, l inputs oat high. 0 , an d i 1 varying the reference voltage (v r e f ) provides continuous control of the peak load current for micro-stepping applications. thermal protection circuitry turns off all drivers when the junction temperature reaches +170c. it is only intended to protect the device from failures due to excessive junction temperature and should not imply that output short circuits are permitted. the output drivers are re-enabled when the junction temperature cools to + 145c. the udn2916b/eb/lb output drivers are optimized for low output saturation voltages?less than 1.8 v total (source plus sink) at 500 ma. under normal operating conditions, when combined with the excellent thermal properties of the batwing package design, this allows continuous operation of both bridges simultaneously at 500 ma. from p v ref dwg. ep-008b1 v bb from p 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 2 v cc 2 v bb 1 v ref +5 v stepper motor r s r s r c r c r t c t c c c c + pwm 1 pwm 2 1 820 p f 56 k ? c t 820 pf 56 k ? r t
291 6 dua l fu ll -bridg e mo t or drive r www.allegromicro.com 7 cu rre nt s e ns i n g to minimize current sensing inaccuracies caused by groun d trace ir drops, each current-sensing resistor should have a separate return to the ground terminal of the device. for low - value sense resistors, the ir drops in the pcb can be significan t and should be taken into account. the use of sockets should b e a vo i d e d a s t h ei r c on tact r e s i s ta n ce ca n ca us e v a r iati ons i n t h e e ff ective value o f r s . generally, larger values of r s reduce the aforementioned effect s but can result in excessive heating and power loss in the sens e resistor. the selected value of r s should not cause the absolut e maximum voltage rating of 1.5 v, for the sense terminal, to b e exceeded. the recommended value of r s is in the range of : r s = 0.75 / i tr i p (max) 50% . if desired, the reference input voltage can be filtered by placin g a capacitor from refin to ground. the ground return for thi s capacitor as well as the bottom of any resistor divider use d should be independent of the high-current power-ground trace t o avoid changes in refin due to ir drops . t h ermal c o ns i d eratio n s f or reliable operation, it i s recommended that the maximu m junction temperature be kept below 110c to 125c. th e junction temperature can be measured best by attaching a thermocouple to the power tab or batwing of the device an d measuring the tab temperature, t tab . the junction temperatur e can then be approximated by using the formula : t j = t tab + (2 i loa d v f r j t ) , where v f can be chosen from the electrical specification tabl e for the given level of i loa d . the value for r j t i s a pprox imatel y 6 c/w for b o th packa g e s t y le s . the power dissipation of the batwing packages can be improve d 20% to 30% by adding a section of printed circuit board coppe r (typically 6 to 18 square centimeters) connected to the batwin g terminals of the device . the thermal performance in applications that run at high loa d currents, high duty cycles, or both can be improved by addin g external diodes from each output to ground in parallel with th e i n te r nal d i od e s . f a s t -r ec ov e ry ( 200 ns) diodes should be use d to minimize sw itching lo ss e s . loa d supp ly termi n a l the load s upply terminal, v bb, s hould be decoupled w ith a n electrolytic capacitor ( 47 f is recommended), placed as clos e to the device as is physically practical. to minimize the effect o f system ground ir drops on the logic and reference input signals , the system ground should have a low-resistance return to th e load supply voltage . fixed off-time selectio n with increasing values of t of f , switching losses decrease, low - level load current regulation improves, emi reduces, pw m frequency decreases, and ripple current increases. the value o f t of f can be chosen for optimization of these parameters. fo r applications where audible noise is a concern, typical values o f t of f s hould be cho s en in the range of 15 to 35 s . application note s
115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 291 6 dual full-bridge mo t or driver 8 udn2916b dimensions in inches (controlling dimensions) dimensions in millimeters (for reference only) notes : 1. webbed lead frame. leads 6, 7, 18, and 19 are internally one piece. 2. lead thickness is measured at seating plane or below. 3. lead spacing tolerance is non-cumulative. 4. exact body and lead configuration at vendor?s option within limits shown. 0.01 4 0.00 8 0.30 0 bsc dwg. ma-001-25a in 0.43 0 max 2 4 1 6 1 2 0.28 0 0.24 0 0.21 0 max 0.07 0 0.04 5 0.01 5 min 0.02 2 0.01 4 0.10 0 bsc 0.00 5 min 0.15 0 0.11 5 1 3 1.28 0 1.23 0 n ot e 1 7 0.35 5 0.20 4 7.6 2 bsc dwg. ma-001-25a mm 10.9 2 max 2 4 1 1 2 7.1 1 6.1 0 5.3 3 max 1.7 7 1.1 5 0.3 9 min 0.55 8 0.35 6 2.5 4 bsc 0.1 3 min 3.8 1 2.9 3 1 3 32.5 1 31.2 4 note 1 6 7
29 1 6 dual full-bridge mo t or driver www.allegromicro.com 9 udn2916eb dwg. ma-005-44a mm 17 . 6 5 17 . 4 0 0 . 5 1 min 4 . 5 7 4 . 2 0 17 . 6 5 17 . 4 0 16 . 6 6 2 16 . 5 1 0 1 . 2 7 bsc 0 . 8 1 2 0 . 6 6 1 1 4 4 0 . 5 3 3 0 . 3 3 1 i nd ex a r e a 2 2 8 2 9 3 9 4 0 6 7 1 7 1 8 16 . 6 6 2 16 . 5 1 0 8 . 1 0 7 . 3 9 8 . 1 0 7 . 3 9 1 8 2 8 dwg. ma-005-44a in 0 . 0 2 0 min 0 . 0 5 0 bsc 1 4 4 0 . 0 2 1 0 . 0 1 3 i nd ex a r e a 2 6 7 1 7 2 9 3 9 4 0 0 . 6 9 5 0 . 6 8 5 0 . 0 3 2 0 . 0 2 6 0 . 3 1 9 0 . 2 9 1 0 . 3 1 9 0 . 2 9 1 0 . 1 8 0 0 . 1 6 5 0 . 6 9 5 0 . 6 8 5 0 . 6 5 6 0 . 6 5 0 0 . 6 5 6 0 . 6 5 0 dimensions in millimeters (for reference only) dimensions in inches (controlling dimensions) otes : 1. mo-047ac except for terminal shoulder height. inte n ded to meet new jedec standard when that is approved. 2. webbed lead frame. leads 7-17 and 29-39 are internally one piece. 3. lead spacing tolerance is non-cumulative. 4. exact body and lead configuration at vendor?s option within limits shown.
115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 291 6 dual full-bridge mo t or driver 10 udn2916lb 0 t o 8 1 24 2 3 7.60 7.40 15.60 15.20 10.65 10.00 0.51 0.33 2.65 2.35 0 . 1 0 m i n . 0.32 0.23 1.27 b s c n ot e 1 n ot e 3 1.27 0.40 dwg. ma-008-25a m m 0 to 8 1 3 1 4 2 2 3 0.2992 0.2914 0.6141 0.5985 0.419 0.394 0.020 0.013 0.0926 0.1043 0.004 0 min . 0.0125 0.0091 dwg. ma-008-25a in 0.050 bs c n ot e 1 n ot e 3 0.050 0.016 allegro microsystems, inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. the information included herein is believed to be accurate and reliable. however, allegro microsystems, inc. assumes no responsibil- ity for its use; nor for any infringements of patents or other rights of third parties which may result from its use. dimensions in millimeters (controlling dimensions) dimensions in inches (for reference only) notes : 1. webbed lead frame. leads indicated are internally one piece. 2. lead spacing tolerance is non-cumulative. 3. exact body and lead configuration at vendor?s option within limits shown.
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