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| spicoder? 06 ur5hcspi-06 extremely low-power keyboard encoder & power management ic for h/pcs self-power management is a trademark of semtech corporation. semtech, spicoder and keycoder are registered trademarks of semtech corporation. all other trademarks belong to their respective companies. copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 1 hid & system management products, keycoder? family description features ? strongarm? handheld pcs windows? ce platforms web phones personal digital assistants (pdas) wearable computers internet appliances the spicoder? 06 ur5hcspi-06 keyboard encoder and power management ic is designed specifically for handheld pcs (h/pcs). the off-the-shelf spicoder? 06 works readily with cpus designed for windows? ce, saving oems significant development time and money as well as minimizing time-to-market for the new generations of handheld products. three main design features of the spicoder? 06 make it the ideal companion for the new generation of windows? ce-compatible, single-chip computers: low-power consumption; real estate-saving size; and special keyboard modes. extremely low power consumption (less than 2 a at 3v), a must for h/pcs, provides the host system with both power management and i/o flexibility, with almost no battery drainage. finally, special keyboard modes and built-in power management features allow the spicoder? 06 to operate in harmony with the power management modes of windows? ce, resulting in more user flexibility and longer battery life. the spicoder? 06 also offers programmable features for wake-up keys and general purpose i/o pins. special keyboard and power management modes for h/pcs, including programmable ?wake- up? keys scans, debounces, and encodes an 8 x 14 matrix provides gpio pins and controls discrete switches available in a small 44-pin qfp package spi-compatible keyboard encoder and power management ic compatible with windows? ce keyboard specification extremely low power consumption ? typically less than 2 a, between 3-5v offers overall system power management capabilities compatible with ?system-on silicon? cpus for h/pcs 111 12 22 33 23 44 34 pwr_ok nc0 osco osci vcc nc nc _reset _wku vx c7 _atn _ss sck mosi miso wuko sw0 c8 c9 c10 c11/_lid nc c12 c13 gio0 _iotest vss nc r7 r6 r5 r4 c6 c5 c4 c3 c2 c1 c0 r0 r1 r2 r3 qfp applications pin assignments preliminary
ordering code copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 2 keyboard scanner & keyboard state control r0-r8 spi communication channel c0-c13 keyboard matrix lid latch monitor wake-up keys only signal switch external to case switch system monitor input signals power management unit programmable i/o gio0 lid wuko xsw swo pwr_ok wkup iotest wku miso mosi sck ss atn ur5hcspi-06 package options pitch ta = -20 c to +85 c 44-pin plastic qfp 0.8 mm UR5HCSPI-06-FB block diagram functional description pin definitions copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 3 the spicoder? 06 consists functionally of five major sections as shown in the the block diagram. these are the keyboard scanner and state control, the programmable i/o, the spi communication channel, the system monitor and the power management unit. all sections communicate with each other and operate concurrently. mnemonic pin # type name and function vcc 38 i power supply: 3-5v vss 17 i ground vx 43 i tie to vcc osci 37 i oscillator input osco 36 o oscillator output _reset 41 i reset: apply 0v for orderly start up spi interface signals: miso 29 o master in, slave out mosi 30 i master out, slave in sck 31 i spi clock _ss 32 i slave select: if not used tie to vss _iotest 18 o wake-up control signals _wku 42 i r0-r4 8-12 i row data inputs r5-r7 13-15 i port provides internal pull-up resistors c0-c5 7-2 o column select outputs c6-c7 1,44 o c8-c9 26-25 o multi-function pins : c10 24 i/o c10 & ?wake-up keys only? imput c11/_lid 23 i/o c11 & lid latch detect input column select outputs c12 21 i/o c12 c13 20 i/o c13 miscellaneous functions: gio0 19 i/o programmable i/o wuko 28 i external discrete switch swo 27 i discrete switch power management pins: _atn 33 o cpu attention output _pwr_ok 34 i power ok input nc 16, 22 no connects : these pins are unused ,39, 40 nc0 35 nc0 should be tied to vss or gnd note: an underscore before a pin mnemonic denotes an active low signal. copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 4 pin descriptions vcc and vss vcc and vss are the power supply and ground pins. the spicoder? 06 operates from a 3-5 volt power supply. to prevent noise problems, provide bypass capacitors and place them as close as possible to the ic with the power supply. vx, where available, should be tied to vcc. osci and osco osci and osco provide the input and output connections for the on- chip oscillator. the oscillator can be driven by any of the following circuits: - crystal - ceramic resonator - external clock signal the frequency of the on-chip oscillator is 2.00 mhz. _reset a logic zero on the _reset pin forces the spicoder? 06 into a known start-up state. the reset signal can be supplied by any of the following circuits: - rc - voltage monitor - master system reset mosi, miso, sck, _ss, _atn these five signals implement the spi interface. the device acts as a slave on the spi bus. the _ss (slave select) pin should be tied to ground if not used by the spi master. the _atn pin is asserted low each time the ur5hcspi-06 has a packet ready for delivery. for a more detailed description, refer to the spi communication channel section of this document. _iotest and _wku ?input output test? and ?wake up? pins control the stop mode exit of the device. the designer can connect any number of active low signals to these two pins through a 17k ? resistor, in order to force the device to exit the stop mode. a sample circuit is shown in this document. all the signals are ?wire-anded.? when any one of these signals is not active, it should be floating (i.e., these signals should be driven from ?open-collector? or ?open-drain? outputs). r0 - r7 the r0-r7 pins are connected to the rows of the scanned matrix. each pin provides an internal pull- up resistor, eliminating the need for external components. c0 - c9 c0 to c9 are bi-directional pins connected to the columns of the scanned matrix. when a column is selected, the pin outputs an active low signal. when the column is de-selected, the pin turns into high-impedance. c10 / wuko the c10 / wuko pin acts alternatively as column scan output and as an input. as an input, the pin detects the ?wake-up keys only? signal, typically provided by the host cpu to indicate that the user has turned the unit off. when the device detects an active high state on this pin, it feeds this information into the ?keyboard state control? unit, in order to disable the keyboard and enable the programmed wake-up keys. c11 / _lid the c11 / _lid pin acts in a similar manner to the c10 / wuko. this pin is typically connected to the lid latch through a 150k ? resistor, in order to detect physical closing of the device cover. when the pin detects an active low state in this input, it feeds this information into the ?keyboard state control? unit, in order to disable keys inside the case and enable only switches located physically on the outer body of the h/pc unit. pin descriptions (cont?d) windows? ce keyboard copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 5 the spicoder? 06 offers pins c12, c13 and gio0. c12 and c13 c12 and c13 are used as additional column pins in order to accommodate larger-size keyboards, such as the fujitsu fkb1406 palmtop keyboard. gio0 gio0 is a programmable general- purpose input/output switch; it can also be used as a wake-up signal. the general-purpose i/o pin section of this document explains the use of gio0. xsw the xsw pin is dedicated to an external switch. this pin is handled differently than the rest of the switch matrix and is intended to be connected to a switch physically located on the outside of the unit. sw0 the sw0 pin is a dedicated input pin for a switch. pwr_ok the pwr_ok pin is an active low pin that monitors the battery status of the unit. when the spicoder? 06 detects a transition from high to low on this pin, it immediately enters the stop mode and remains in that state until the batteries are replaced and the signal is deasserted. the following illustration shows a typical implementation of a windows? ce keyboard. windows? ce does not support the following keyboard keys typically found on desktop and laptop keyboards: insert scroll lock pause num lock function keys (f1-f12) print screen if the keyboard implements the windows key, the following key combinations are supported in the windows? ce environment: key combination result windows open start menu windows+k open keyboard tool windows+i open stylus tool windows+c open control panel windows+e explore the h/pc windows+r display the run dialog box windows+h open windows? ce help ctrl+windows+a select all on desktop 1 ! esc 3 # 2 @ 5 % 4 $ 7 & 6 ^ 9 ( 8 * - _ 0 ) e w t r u y o i p q f d h g k j l s a v c n b m x z tab shift ctrl shift enter = + \ | ' " ; : . > , < / ? ` ~ ] } [ { power alt ?ghost? keys keyboard scanner copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 6 the encoder scans a keyboard organized as an 8 row by 14 column matrix for a maximum of 112 keys. smaller size matrixes can also be accommodated by simply leaving unused pins open. the spicoder? 06 provides internal pull-ups for the row input pins. when active, the encoder selects one of the column lines (c0-c13) every 512 s and then reads the row data lines (r0-r7). a key closure is detected as a zero in the corresponding position of the matrix. a complete scan cycle for the entire keyboard takes approximately 9.2 ms. each key found pressed is debounced for a period of 20 ms. once the key is verified, the corresponding key code(s) are loaded into the transmit buffer of the spi communication channel. n-key rollover in this mode, the code(s) corresponding to each key press are transmitted to the host system as soon as that key is debounced, independent of the release of other keys. when a key is released, the corresponding break code is transmitted to the host system. several keys that can be held pressed at the same time. however, if two or more key closures occur within a time interval of less than 5 ms, an error flag is set and those key presses are not processed. this feature protects against the effects of accidental key presses. data command buffer the spicoder? 06 implements a data buffer, which contains the key code/command bytes waiting to be transmitted to the host. if the data buffer is full, the whole buffer is cleared and an "initialize" command is sent to the host. at the same time, the keyboard is disabled until the "initialize" or "initialize complete" command from the host is received. power management unit power management is covered in the next section, keyboard states. in most keyboard subsystems, the power consumption is largely determined by the use of the leds. however, the spicoder? 06 does not provide led ouput. a related ic, the spicoder? sa01 ur5hcspi-sa01, does provide led output and uses two modes of operation to minimize power drain; for more information, see the data sheets for that ic. in any scanned contact switch matrix, whenever three keys defining a rectangle on the switch matrix are pressed at the same time, a fourth key positioned on the fourth corner of the rectangle is sensed as being pressed. this is known as the ?ghost? or ?phantom? key problem. figure 1 : ?ghost? or ?phantom? key problem although the problem cannot be totally eliminated without using external hardware, there are methods to neutralize its negative effects for most practical applications. keys that are intended to be used in combinations should be placed in the same row or column of the matrix, whenever possible. shift keys (shift, alt, ctrl, window) should not reside in the same row (or column) as any other keys. the spicoder? 06 has built-in mechanisms to detect the presence of ?ghost? keys. actual key presses ?ghost? key copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 7 keyboard states these states of operation refer only to the keyboard functionality and, although they are related to power states, they are also independent of them. "send all keys" entry conditions: power on reset, soft reset, pwr_ok =1, {(lid=1) and (wuko=0)} exit conditions: pwr_ok = 0 -> "send no keys"(wuko=1) and (key press) -> "send wake-up keys only"(lid = 0) and (wuko=0) and (key press) -> "send xsw key only" description: this is the spicoder? 06?s normal state of operation, accepting and transmitting every key press to the system. this state is entered after the power-on and is sustained while the unit is being used. ?send wake-up keys only? entry conditions: (wuko=1) and (key or switch press) exit conditions: soft reset -> ?send all keys?pwr_ok = 0 -> ?send no keys? description: this state is entered when the user turns the unit off. a signal line driven by the host notifies the spicoder? 06 about this state transition. while in this state, the spicoder? 06 transmits only keys programmed to be wake-up keys to the system. it is not necessary for the spicoder? 06 to detect this transition in real time, since it does not affect any operation besides buffering keystrokes. send all keys send wake up keys only send no keys pwr_ok pwr_ok pwr_ok = 0 soft reset (pwr_ok =1) and (wuko=0) and (lid=1) and key press (pwr_ok =1) and key press and (wuko = 1) wuko =1 and key press send xsw key only (lid = 0) and (wuk0=0) and key press (lid = 1) and (wuko=0) and key press wuko=1 and key press pwr_ok (pwr_ok =1) and (lid = 0) and (wuko=0) and key press 3. while in this state all interrupts are disabled. the spicoder? 06 exits this state on the next interrupt event that detects the pwr_ok line has been de-asserted. e ?send xsw key only" entry condition: (lid=0) and (wuko=0) and (key press) exit condition: (lid=1) and (wuko=0) and (key press) -> ?send all keys?pwr_ok = 0 -> ?send no keys? (wuko = 1) and (key press) -> ?send wake up keys only? description: this state is entered upon closing the lid of the device. while in this state, the spicoder? 06 transmits only the xsw key, which is located outside the unit. this feature is designed to accommodate buttons on the outside of the box, such as a microphone button, that need to be used while the lid is closed. ?send no keys" entry conditions: pwr_ok transition from high to low exit conditions: (pwr_ok = 1) and (matrix key pressed or switch or _wkup) description: this state is entered when a pwr_ok signal is asserted (transition high to low), indicating a critically low level of battery voltage. the pwr_ok signal causes an interrupt to the spicoder? 06, which guarantees that the transition is performed in real time. while in this state, the spicoder? 06 performs as follows: 1. the spicoder? 06 enters the stop mode for maximum energy conservation. 2. stop mode time-out entry is shortened to further conserve energy. figure 2: the ur5hcspi-06 implements four modes of keyboard and switch operation. key codes general purpose i/o pin copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 8 key codes range from 0x01 to 0x73 and are arranged as follows: make code = column_number * 8 + row_number + 1 break code = make code or 0x80 discrete switches transmit the following codes: xsw = 0x71 sw0 = 0x72 gio0 = 0x73 pin configurations when prototyping, caution should be taken to ensure that programming of the gio0 pin does not conflict with the circuit implemented. a series protection resistor is recommended to be used for protection over improper programming of the pin. after a power-on or soft reset, gio0 defaults to the input state. the drawing to the right illustrates the suggested interface to the general purpose input/output pin. the spicoder? 06 has a general purpose i/o pin, gio0, that can be programmed as input, output, or debounced switch input. the programmable i/o pin can be configured to the desired mode through a command from the system. after the i/o pin is configured, the host system can read data from it or write data to it. if the pin is configured as a debounced switch input, it returns scan codes. input mode while in the input mode, the gio0 pin detects input signals and reports the input status to the system as required. output mode in the output mode, the spicoder? 06 controls the output signal level according to the system command. when the pin is set at output mode, the default output is low. debounced switch input mode in switch input mode, the spicoder? 06 generates an individual make key code when the switch closes (pin goes low), and a break key code when the switch returns to open (pin goes to high). the switches generate key codes outside of those generated by the keyboard matrix, from 0x71 - 0x73. when the switch is closed, the spicoder? 06 does not fall asleep. input gix circuit determined by the specific application output gix circuit determined by the specific application led gix switch gix wake-up interrupt i _wku _iotest 15k 150k series protection resistor figure 3: suggested interface to the general purpose input/output pin copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 9 spi communication channel spi data transfers can be performed at a maximum clock rate of 500 khz. when the spicoder? 06 asserts the _atn signal to the host master, the data has already been loaded into the data register waiting for the clocks from the master. the slave select (ss) line can be tied permanently to ground if the spicoder? 06 is the only slave device on the spi bus. one _atn signal is used per each byte transfer. if the host fails to provide clock signals for successive bytes in the data packet within 120 ms, the transmission is aborted and a new session is initiated by asserting a new atn signal. in this case, the whole packet is re-transmitted. if the spi transmission fails 20 times consecutively, the synchronization between the master and slave may be lost. in this case, the spicoder? 06 enters the reset state. the spicoder? 06 implements the spi communication protocol according to the following diagram: cpol = 0 ---------- sck line idles in low state cpha = 1 ---------- ss line is an output enable control figure 5: transmitting data waveforms figure 6: receiving data waveforms figure 4: spi communication protocol when the host sends commands to the keyboard, the spicoder? 06 requires that the minimum and maximum intervals between two successive bytes be 200 s and 5 ms respectively. sck (cpol=0) _ss data output (cpha=1) sample input ? msb bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 lsb _atn signal data/command buffer power management unit copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 10 the spicoder? 06 implements a data buffer that contains the key code/command bytes waiting to be transmitted to the host. if the data buffer is full, the whole buffer is cleared and an "initialize" command is sent to the host. at the same time, the keyboard is disabled until the "initialize" or "initialize complete" command from the host is received. the spicoder? 06 supports two modes of operation. the following table lists the typical and maximum supply current (no dc loads) for each mode at 3.3 volts (+/- 10%). current typical max unit description run 1.5 1 3.0 ma entered only while data/commands are in process stop 2.0 20 a entered after 125 ms of inactivity while the spicoder? 06 is in the stop mode, an active low wake-up output from the master must be connected to the edge-sensitive _wku pin of the spicoder? 06. this signal is used to wake up the spicoder? 06 in order to receive data from the master host. the master host must wait a minimum of 5 ms prior to providing clocks to the spicoder? 06. the spicoder? 06 enters the stop mode after a 125 ms period of keypad and/or host communications inactivity, or any time the pwr_ok line is asserted low by the host. note that while one or more keys are held pressed, the spicoder? 06 does not enter the stop mode until every key is released. stop run - keyboard - switch - input transaction - system wake-up - after 125 ms of inactivity after reset or 125 ms of inactivity while processing current task figure 7: the power states of the spicoder? 06 lrc calculation commands from the spicoder? 06 to the host copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 11 resend request copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 12 commands from the host to the spicoder? 06 commands from the host - summary command name code description initialize 0xao causes the spicoder? 06 to enter the power-on state initialization complete 0xa1 issued as a response to the ?initialize request? heartbeat request 0xa2 the spicoder? 06 responds with ?heartbeat response? identification request 0xf2 the spicoder? 06 responds with ?identification response? resend request 0xa5 issued upon error during the reception of a packet input/output mode modify 0xa7 the spicoder? 06 modifies or reports the status of the gio0 pin output data to i/o pin 0xa8 the spicoder? 06 outputs a signal to the gio0 pin set wake-up keys 0xa9 defines which keys are ?wake-up? keys each command to spicoder? 06 is composed of a sequence of codes. all commands start with copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 13 commands from the host to the spicoder? 06 (cont?d) i/o mode modify copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 14 key map for the fujitsu fkb1406 columns (c0?c13) 012345678910111213 lalt ` lctrl fn esc 1290- + bksp f1 f2 f9 f10 nmlk bk \ lsft del t y u i enter rshift pad 4 pad 5 pgdn tab q w e r o p [ ] pad 6 ins pause scrlk z caplk k l ; ? pad 2 pad 3 prtscr sysreq pgup asdfghj/ pad 1 / home x c v b n m , . spc pad 0 345678prog f3 f4 f5 f6 f7 f8 end rows (r0?r6) esc f2 1 ! f2 2 @ f3 3 # f4 4 $ f5 5 % f6 6 ^ f7 7 & f8 8 * f9 9 ( f10 0 ) num lk - _ bk = + qwe rt yu i op asdf ghj kl z xcvbnm ~ < , . >? / : ; prt scr " ' sys req { pause scr lk ins end pgdn pgup home enter : ; ctrl alt fn shift del cap lock [ ] } 0 1 23 45 6 * 9 8 7 _ . / + prog ` shift 0 1 2 3 4 5 6 keyboard layout for fujitsu fkb1406 copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 15 sample configuration UR5HCSPI-06-FB alternatively a 2mhz cmos signal can be tied directly to osc1 tied to gnd if not used attention signal wake up signal row inputs column outputs to switch matrix power ok signal discrete switches slave select ceramic resonator circuit with built in capacitors, like avx pbrc-2.00br alternatively an rc circuit or master reset signal can be used power ok signal tie to vcc or gnd if not used vcc 1.5m ? 1.5m ? 15k ? UR5HCSPI-06-FB 7 6 5 4 8 2 1 44 26 25 24 37 36 38 3 41 29 30 31 32 33 17 35 42 18 23 34 19 20 21 27 28 9 10 11 12 13 14 15 43 c0 c1 c2 c3 r0 c5 c6 c7 c8 c9 c10/wuko osci osco vcc c4 reset miso mosi sck ss atn vss nc0 wku iotest c11/lid pwr_ok gio0 col13 col12 sw0 xsw r1 r2 r3 r4 r5 r6 r7 vx 1m ? 2mhz tc54c4302ecb vout vin gnd 150k ? 15k ? 15k ? sck mosi miso _wkup _atn pwr_ok _lid wuko copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 16 spicoder? 06 bill of materials UR5HCSPI-06-FB quantity manufacture part# description 3 generic 15k ? 15 k ? resistor 1 generic 150k ? 150 k ? resistor 1 generic 1m ? 1 m ? resistor 2 generic 1.5k ? 1.5 k ? resistors 1 microchip tc54vc4302ecb713 ic volt detector cmos 4.3v sot23, for 5v operation tc54vc2702ecb713 ic volt detector cmos 2.7v sot23, for 3.3v operation 1 avx pbrc-2.00br 2.00 mhz ceramic resonator with built in load capacitors, smt implementation notes for the spicoder? 06 copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 17 the following notes pertain to the suggested schematic found on a previous page. the built-in oscillator on the spicoder? 06 requires the attachment of a 2.00 mhz ceramic resonator with built-in load capacitors. you can use either an avx, part number pbrc-2.00 br; or a murata part number cstcc2.00mg ceramic resonator. it may also be possible to operate with the 2.00 mhz crystal, albeit with reduced performance. due to their high q, the crystal oscillator circuits start up slowly. since the spicoder? 06 constantly switches the clock on and off, the ceramic resonator is better (it starts up much quicker than the crystal). resonators are also less expensive than crystals. also, if a crystal is used, two load capacitors (33pf to 47pf) should be added, a capacitor between each side of the crystal and ground. in both cases, using ceramic resonator with built-in load capacitors, or crystal with external load capacitors, a feedback resistor of 1 megaohm should be connected between osci and osco. troubleshoot the circuit by looking at the output pin of the oscillator. if the voltage is half-way between supply and ground (while the oscillator should be running) --- the problem is with the load caps / crystal. if the voltage is all the way at supply or ground (while the oscillator should be running) --- there are shorts on the pcb. note: when the oscillator is intentionally turned off, the voltage on the output pin of the oscillator is high (at the supply rail). copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 18 mechanicals for the UR5HCSPI-06-FB detail a m q w k x t r c datum plane detail c l b a l b v d a s c e g m m h seating plane h datum plane a,b,d 0.20 (0.008) c a-b s d s m 0.05 (0.002) a-b 0.20 (0.008) h a-b s d s m 0.20 (0.008) h a-b s d s m 0.20 (0.008) c a-b s d s m 0.05 (0.002) a-b 0.01 (0.004) b c d e f g h j k l m n q r s t u v x 9.90 10.10 0.390 0.398 2.10 2.45 0.083 0.096 0.30 0.45 0.012 0.018 2.00 2.10 0.079 0.083 0.30 0.40 0.012 0.016 0.80 bsc 0.031 bsc 0.25 0.010 0.13 - 0.005 0.65 - 0.026 - 5 10 5 10 0.13 0.17 0.005 0.007 13.45 0.530 0.13 0.005 0 0 0.510 0.40 0.016 min max min max millimeters inches 0 7 0 7 0.13 .30 0.005 0.012 dim 0 0 0 0 0 0 0 jn f base metal d 0.20 (0.008) c a-b s d s m section b-b a 9.90 10.10 0.390 0.398 0.23 0.009 0.037 0.95 8.00 ref 0.315 ref 12.95 0.510 0 0 0 w 12.95 1.6 ref 13.45 0.530 0.063 ref notes 1. dimensioning and tolerancing per ansi y14.5-m, 1982 2. controlling dimension: millimeter 3. datum plane "h" is located at the bottom of the lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums -a-, -b-, and -d- to be determined at datum plane -h-. 5. dimensions s and v to be determined at seating plane -c-. 6. dimensions a and b do not include mold protusion. allowable protusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane -h-. 7. dimension d does not include danbar protrusion. allowable danbar protrusion is 0.08 (0.003) total in excess of the d dimension at maximum material condition. danbar cannot be located on the lower radius or the foot. -- - - - b detail a detail c 1 12 22 11 34 44 33 23 h copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 19 electrical specifications absolute maximum ratings ratings symbol value unit supply voltage vdd -0.3 to +7.0 v input voltage vin vss -0.3 to vdd +0.3 v current drain per pin i 25 ma (not including vss or vdd) operating temperature ta t low to t high c ur5hcspi-06 -40 to +85 storage temperature range tstg - -65 to +150 c esd rating (human body model) v esd tbd kv thermal characteristics characteristic symbol value unit thermal resistance tja c per w plastic 60 dc electrical characteristics (vdd=3.3 vdc +/-10%, vss=0 vdc, temperature range=t low to t high unless otherwise noted) characteristic symbol min typ max unit output voltage (i load<10a) vol 0.1 v voh vdd?0.1 output high voltage (i load=0.8ma) voh vdd?0.8 v output low voltage (i load=1.6ma) vol: 0.4 v input high voltage vih 0.7xvdd vdd v input low voltage vil vss 0.2xvdd v user mode current ipp 5 10 ma data retention mode (0 to 70c) vrm 2.0 v supply current (run) idd 1.53 3.0 ma (wait) 0.711 1.0 ma (stop) 2.0 20 a i/o ports hi-z leakage current iil +/-10 a input current iin +/- 1 a i/o port capacitance cio 8 12 pf control timing (vdd=3.3 vdc +/-10%, vss=0 vdc, temperature range=t low to t high unless otherwise noted) characteristic symbol min max unit frequency of operation crystal option fosc 2.0 mhz external clock option fosc 2.0 mhz cycle time tcyc 1000 ns crystal oscillator startup time toxov 100 ms stop recovery startup time tilch 100 ms reset pulse width trl 8 tcyc interrupt pulse width low tlih 250 ns interrupt pulse period tilil * tcyc osci pulse width toh, tol 200 ns *the minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine pl us 21 tcyc. copyright ?1997-2002 semtech corporation doc5-spi-06-ds-106 www.semtech.com 20 for sales information and product literature, contact: semtech corporation human interface device (hid) and system management division 200 flynn road camarillo, ca 93012-8790 sales@semtech.com http://www.semtech.com/ (805)498-2111 telephone (805)498-3804 fax copyright ?1997-2002 semtech corporation. all rights reserved. self-power management is a trademark of semtech corporation. semtech, keycoder, and spicoder are registered trademarks of semtech corporation. all other trademarks belong to their respective companies. intellectual property disclaimer this specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. a license is hereby granted to reproduce and distribute this specification for internal use only. no other license, expressed or implied to any other intellectual property rights is granted or intended hereby. authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights. |
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