jmicron/JMD330 JMD330 serial ata bridge chip overview the jmicron JMD330 bridge is a single chip soluti on for serial and parallel ata translation. it includes the serial ata phy, link, transport, and parallel ata (appli cation layer) controller. the main applications are for legacy ide stor age devices connecting to newer chipse t supporting serial ata, such as the ich5 south bridge of intel chipset. the serial ata physical, link, and transport layer ar e compliance to serial ata generation 1, which supports a 1.5gbps data rate. the application layer supports both the ata register command set and packet command set, which could drive both the hard disk drive and atapi optical storage such as cr-rom, cd-rw, dvd-rom, dvd-rw, etc. this chip is designed by 0.18u m cmos technology and 64-pin tqfp or qfn package. features ? 0.18um cmos technology. ? compliance with gen1i/gen1m of seri al ata ii electrical specification 2.6. ? 1.8v and 3.3v power system. ? 25mhz external reference clock. ? 64-pin tqfp and qfn packages. ? support ata/atapi-7 specification. ? ata/atapi pio mode 0, 1, 2, 3, 4. ? ata/atapi multi-word dma mode 0, 1, 2. ? ata/atapi ultra dma mode 0, 1, 2, 3, 4, 5, 6, 7. ? ata/atapi packet command feature set. ? ata/atapi lba48 addressing mode associated with 2-byte sector count. ? serial ata power saving modes. ? serial ata hot-plug. ? sata ii asynchronous signal recovery support. www.datasheet.co.kr datasheet pdf - http://www..net/
jmicron/JMD330 functional block diagram application product information name description JMD330 serial ata bridge chip design kit contact information 1 JMD330 data sheet department email 2 JMD330 design guide sales sales@jmicron.com 3 application evb tech. support fae@jmicron.com www.datasheet.co.kr datasheet pdf - http://www..net/
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