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lp3878-adj micropower 800ma low noise "ceramic stable" adjustable voltage regulator for 1v to 5v applications general description the lp3878-adj is an 800 ma adjustable output voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1.0v. using an optimized vip ? (vertically integrated pnp) pro- cess, the lp3878-adj delivers superior performance: ground pin current: typically 5.5 ma @ 800 ma load, and 180 a @ 100 a load. low power shutdown: the lp3878-adj draws less than 10 a quiescent current when shutdown pin is pulled low. precision output: guaranteed output voltage accuracy is 1% at room temperature. low noise: broadband output noise is only 18 v (typical) with 10 nf bypass capacitor. features n 1.0v to 5.5v output n designed for use with low esr ceramic capacitors n very low output noise n 8 lead psop and llp surface mount package n < 10 a quiescent current in shutdown n low ground pin current at all loads n over-temperature/over-current protection n -40?c to +125?c operating junction temperature range applications n asic power supplies in: - desktops, notebooks and graphic cards - set top boxes, printers and copiers n dsp and fpga power supplies n smps post-regulator n medical instrumentation basic application circuit 20120903 *capacitance values shown are minimum required to assure stability. larger output capacitor provides improved dynamic response. output capacitor must meet esr requirements (see application information). **the shutdown pin must be actively terminated (see application information). tie to input (pin 4) if not used. vip ? is a trademark of national semiconductor corporation. may 2005 lp3878-adj micropower 800ma low noise "ceramic stable" adjustable voltage regulator for 1v to 5v applications ? 2005 national semiconductor corporation ds201209 www.national.com
connection diagrams 8 lead psop package (mra) 8 lead llp surface mount package (sd) 20120930 top view see ns package number mra08a 20120950 top view see ns package number sdc08a ordering information table 1. package marking and ordering information output voltage grade order information supplied as: adj std LP3878MR-ADJ 95 units per rail adj std lp3878mrx-adj 2500 units on tape and reel adj std lp3878sd-adj 1000 units on tape and reel adj std lp3878sdx-adj 4500 units on tape and reel pin description pin name function 1 bypass the capacitor connected between bypass and ground lowers output noise voltage level and is required for loop stability. 2 n/c do not connect. this pin is used for post package test and must be left floating. 3 ground device ground. 4 input input source voltage. 5 output regulated output voltage. 6 adj provides feedback to error amplifier from the resistive divider that sets the output voltage. 7 n/c no internal connection. 8 shutdown output is enabled above turn-on threshold voltage. pull down to turn off regulator output. psop, llp dap substrate ground the exposed die attach pad should be connected to a thermal pad at ground potential. for additional information on using national semiconductor?s non pull back llp package, please refer to llp application note an-1187 lp3878-adj www.national.com 2
absolute maximum ratings (note 1) if military/aerospace specified devices are required, please contact the national semiconductor sales office/ distributors for availability and specifications. storage temperature range ?65?c to +150?c operating junction temperature range -40?c to +125?c lead temperature (soldering, 5 seconds) 260?c esd rating (note 2) 2 kv shutdown pin 1kv power dissipation (note 3) internally limited input supply voltage (survival) ?0.3v to +16v input supply voltage (typical operating) 2.5v to +16v adj pin ?0.3v to +6v output voltage (survival) (note 4) ?0.3v to +6v i out (survival) short circuit protected input-output voltage (survival) (note 5) ?0.3v to +16v electrical characteristics limits in standard typeface are for t j = 25?c, and limits in boldface type apply over the temperature range of -40?c to 125?c. limits are guaranteed through design, testing, or correlation. the limits are used to calculate national?s average outgoing quality level (aoql). unless otherwise specified: v in = 3.0v, v out = 1v, i l = 1 ma, c out = 10 f, c in = 4.7 f, v s/d = 2v, c bypass =10nf. symbol parameter conditions min typical max units v adj adjust pin voltage 0.99 1.00 1.01 v 1ma i l 800 ma 3.0v v in 6v 0.98 0.97 1.00 1.02 1.03 output voltage line regulation 3.0v v in 16v 0.007 0.014 %/v 0.032 v in (min) minimum input voltage required to maintain output regulation i l = 800 ma v out v out(nom) -1% 2.5 3.1 v i l = 800 ma v out v out(nom) -1% 0 t j 125?c 2.5 2.8 i l = 750 ma v out v out(nom) -1% 2.5 3.0 v do dropout voltage (note 6) v out = 3.8v i l = 100 a 1 2 3 mv i l = 200 ma 150 200 300 i l = 800 ma 475 600 1100 i gnd ground pin current i l = 100 a 180 200 a 225 i l = 200 ma 1.5 2 ma 3.5 i l = 800 ma 5.5 8.5 15 i o (pk) peak output current v out v out(nom) ?5% 1200 ma i o (max) short circuit current r l = 0 (steady state) 1300 e n output noise voltage (rms) bw = 100 hz to 100 khz c bypass =10nf 18 v(rms) ripple rejection f=1khz 60 db i adj adj pin bias current (sourcing) i l = 800 ma 200 na lp3878-adj www.national.com 3
electrical characteristics (continued) limits in standard typeface are for t j = 25?c, and limits in boldface type apply over the temperature range of -40?c to 125?c. limits are guaranteed through design, testing, or correlation. the limits are used to calculate national?s average outgoing quality level (aoql). unless otherwise specified: v in = 3.0v, v out = 1v, i l = 1 ma, c out = 10 f, c in = 4.7 f, v s/d = 2v, c bypass =10nf. symbol parameter conditions min typical max units shutdown input v s/d s/d input voltage v h = output on 1.4 1.6 v v l = output off i in 10 a 0.04 0.20 v out 10 mv i in 50 a 0.6 i s/d s/d input current v s/d = 0 0.02 ?1 a v s/d =5v 5 15 note 1: absolute maximum ratings indicate limits beyond which damage to the component may occur. electrical specifications do not apply when operating the device outside of its rated operating conditions. note 2: esd testing was performed using human body model, a 100 pf capacitor discharged through a 1.5 k ? resistor. note 3: the maximum allowable power dissipation is a function of the maximum junction temperature, t j (max), the junction-to-ambient thermal resistance, j?a , and the ambient temperature, t a . the maximum allowable power dissipation at any ambient temperature is calculated using: the value of j?a for the llp (sd) and psop (mra) packages are specifically dependent on pcb trace area, trace material, and the number of layers and thermal vias. if a four layer board is used with maximum vias from the ic center to the heat dissipating copper layers, values of j?a which can be obtained are approximately 60?c/w for the psop-8 and 40?c/w for the llp-8 package. for improved thermal resistance and power dissipation for the llp package, refer to applicatio n note an-1187. exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. note 4: if used in a dual-supply system where the regulator load is returned to a negative supply, the lp3878-adj output must be diode-clamped to ground. note 5: the output pnp structure contains a diode between the v in and v out terminals that is normally reverse-biased. forcing the output above the input will turn on this diode and may induce a latch-up mode which can damage the part (see application hints). note 6: dropout voltage spec applies only if v in is sufficient so that it does not limit regulator operation. lp3878-adj www.national.com 4
typical performance characteristics unless otherwise specified: v in = 3.3v, v out = 1v, i l = 1 ma, c in = 4.7 f, c out = 10 f, v s/d = 2v, c byp = 10 nf, t j = 25?c. i gnd vs temperature minimum v in over temperature 20120920 20120921 i gnd vs i load v out vs temperature 20120922 20120959 minimum v in vs v out minimum v in vs v out 20120951 20120952 lp3878-adj www.national.com 5
typical performance characteristics unless otherwise specified: v in = 3.3v, v out = 1v, i l = 1 ma, c in = 4.7 f, c out = 10 f, v s/d = 2v, c byp = 10 nf, t j = 25?c. (continued) minimum v in vs v out ripple rejection 20120953 20120954 ripple rejection line transient response 20120958 20120931 line transient response line transient response 20120933 20120932 lp3878-adj www.national.com 6
typical performance characteristics unless otherwise specified: v in = 3.3v, v out = 1v, i l = 1 ma, c in = 4.7 f, c out = 10 f, v s/d = 2v, c byp = 10 nf, t j = 25?c. (continued) line transient response line transient response 20120935 20120936 line transient response line transient response 20120934 20120937 line transient response line transient response 20120939 20120940 lp3878-adj www.national.com 7
typical performance characteristics unless otherwise specified: v in = 3.3v, v out = 1v, i l = 1 ma, c in = 4.7 f, c out = 10 f, v s/d = 2v, c byp = 10 nf, t j = 25?c. (continued) line transient response line transient response 20120942 20120941 load transient response load transient response 20120945 20120943 load transient response load transient response 20120946 20120944 lp3878-adj www.national.com 8
typical performance characteristics unless otherwise specified: v in = 3.3v, v out = 1v, i l = 1 ma, c in = 4.7 f, c out = 10 f, v s/d = 2v, c byp = 10 nf, t j = 25?c. (continued) turn-on characteristics turn-off characteristics 20120955 20120956 lp3878-adj www.national.com 9
block diagram 20120901 application information package information the lp3878-adj is offered in the 8 lead psop or llp surface mount packages to allow for increased power dissi- pation compared to the so-8 and mini so-8. for details on thermal performance as well as mounting and soldering specifications, refer to application note an-1187. external capacitors like any low-dropout regulator, the lp3878-adj requires external capacitors for regulator stability. these capacitors must be correctly selected for good performance. input capacitor: a capacitor whose value is at least 4.7 f ( 20%) is required between the lp3878-adj input and ground. a good quality x5r / x7r ceramic capacitor should be used. capacitor tolerance and temperature variation must be con- sidered when selecting a capacitor (see capacitor charac- teristics section) to assure the minimum requirement of input capacitance is met over all operating conditions. the input capacitor must be located not more than 0.5" from the input pin and returned to a clean analog ground. any good quality ceramic or tantalum capacitor may be used, assuming the minimum input capacitance requirement is met. output capacitor: the lp3878-adj requires a ce- ramic output capacitor whose size is at least 10 f ( 20%). a good quality x5r / x7r ceramic capacitor should be used. capacitance tolerance and temperature characteristics must be considered when selecting an output capacitor. the lp3878-adj is designed specifically to work with ce- ramic output capacitors, utilizing circuitry which allows the regulator to be stable across the entire range of output current with an ultra low esr output capacitor. the output capacitor selected must meet the requirement for minimum amount of capacitance and also have an esr (equivalent series resistance) value which is within the stable range. a curve is provided which shows the stable esr range as a function of load current (see figure 1 ). important: the output capacitor must maintain its esr within the stable region over the full operating temperature range of the application to assure stability. the output capacitor esr forms a zero which is required to add phase lead near the loop gain crossover frequency, typically in the range of 50khz to 200 khz. the esr at lower frequencies is of no importance. some capacitor manufac- turers list esr at low frequencies only, and some give a formula for dissipation factor which can be used to calculate a value for a term referred to as esr. however, since the df formula is usually at a much lower frequency than the range listed above, it will give an unrealistically high value. if good quality x5r or x7r ceramic capacitors are used, the actual esr in the 50 khz to 200 khz range will not exceed 25 milli ohms. if these are used as output capacitors for the lp3878-adj, the regulator stability requirements are satis- fied. 20120938 figure 1. stable region for output capacitor esr lp3878-adj www.national.com 10
application information (continued) it is important to remember that capacitor tolerance and variation with temperature must be taken into consideration when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. (see capacitor character- istics section). the output capacitor must be located not more than 0.5" from the output pin and returned to a clean analog ground. noise bypass capacitor: the 10 nf capacitor on the bypass pin significantly reduces noise on the regulator out- put and is required for loop stability. however, the capacitor is connected directly to a high-impedance circuit in the band- gap reference. because this circuit has only a few microamperes flowing in it, any significant loading on this node will cause a change in the regulated output voltage. for this reason, dc leakage current through the noise bypass capacitor must never ex- ceed 100 na, and should be kept as low as possible for best output voltage accuracy. the types of capacitors best suited for the noise bypass capacitor are ceramic and film. high-quality ceramic capaci- tors with either npo or cog dielectric typically have very low leakage. 10 nf polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current. feedforward capacitor the feedforward capacitor designated c ff in the basic ap- plication circuit is required to increase phase margin and assure loop stability. improved phase margin also gives better transient response to changes in load or input voltage, and faster settling time on the output voltage when transients occur. c ff forms both a pole and zero in the loop gain, the zero providing beneficial phase lead (which increases phase margin) and the pole adding undesirable phase lag (which should be minimized). the zero frequency is determined both by the value of c ff and r1: fz=1/(2x xc ff x r1) the pole frequency resulting from c ff is determined by the value of c ff and the parallel combination of r1 and r2: fp=1/(2x xc ff x (r1 // r2)) at higher output voltages where r1 is much greater than r2, the value of r2 primarily determines the value of the parallel combination of r1 // r2. this puts the pole at a much higher frequency than the zero. as the regulated output voltage is reduced (and the value of r1 decreases), the parallel effect of r2 diminishes and the two equations become equal (at which point the pole and zero cancel out). because the pole frequency gets closer to the zero at lower output voltages, the beneficial effects of c ff are increased if the frequency range of the zero is shifted slightly higher for applications with low vout (because then the pole adds less phase lag at the loop?s crossover frequency). c ff should be selected to place the pole zero pair at a frequency where the net phase lead added to the loop at the crossover frequency is maximized. the following design guidelines were obtained from bench testing to optimize phase margin, transient response, and settling time: for vout 2.5v: c ff should be selected to set the zero frequency in the range of about 50 khz to 200 khz. for vout > 2.5v: c ff should be selected to set the zero frequency in the range of about 20 khz to 100 khz. capacitor characteristics ceramic: the lp3878-adj was designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the 10 f range, ceramics are the least expensive and also have the lowest esr values (which makes them best for eliminating high-frequency noise). the esr of a typical 10 f ceramic capacitor is in the range of 5 m ? to 10 m ? , which meets the esr limits required for stability by the lp3878-adj. one disadvantage of ceramic capacitors is that their capaci- tance can vary with temperature. many large value ceramic capacitors ( 2.2 f) are manufactured with the z5u or y5v temperature characteristic, which results in the capacitance dropping by more than 50% as the temperature goes from 25?c to 85?c. another significant problem with z5u and y5v dielectric devices is that the capacitance drops severely with applied voltage. a typical z5u or y5v capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. for these reasons, x7r and x5r type ceramic capaci- tors must be used on the input and output of the lp3878-adj . shutdown input operation the lp3878-adj is shut off by pulling the shutdown input low, and turned on by pulling it high. if this feature is not to be used, the shutdown input should be tied to v in to keep the regulator output on at all times. to assure proper operation, the signal source used to drive the shutdown input must be able to swing above and below the specified turn-on/turn-off voltage thresholds listed in the electrical characteristics section under v on/off . reverse input-output voltage the pnp power transistor used as the pass element in the lp3878-adj has an inherent diode connected between the regulator output and input. during normal operation (where the input voltage is higher than the output) this diode is reverse-biased. however, if the output is pulled above the input, this diode will turn on and current will flow into the regulator output. in such cases, a parasitic scr can latch which will allow a high current to flow into v in (and out the ground pin), which can damage the part. in any application where the output may be pulled above the input, an external schottky diode must be connected from v in to v out (cathode on v in , anode on v out ), to limit the reverse voltage across the lp3878-adj to 0.3v (see abso- lute maximum ratings). setting the output voltage the output voltage is set using resistors r1 and r2 (see basic application circuit). the formula for output voltage is: v out =v adj x(1+(r 1 /r 2 )) r2 must be less than 5 k ? to ensure loop stability. to prevent voltage errors, r1 and r2 must be located near the lp3878-adj and connected via traces with no other currents flowing in them (kelvin connect). the bottom of the r1/r2 divider must be connected directly to the lp3878- adj ground pin. lp3878-adj www.national.com 11
physical dimensions inches (millimeters) unless otherwise noted 8 lead llp surface mount packagepackage ns package number sdc08a 8-lead psop package (psop-8) ns package number mra08a lp3878-adj www.national.com 12
notes national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the right at any time without notice to change said circuitry and specifications. for the most current product information visit us at www.national.com. life support policy national?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president and general counsel of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. banned substance compliance national semiconductor manufactures products and uses packing materials that meet the provisions of the customer products stewardship specification (csp-9-111c2) and the banned substances and materials of interest specification (csp-9-111s2) and contain no ??banned substances?? as defined in csp-9-111s2. leadfree products are rohs compliant. national semiconductor americas customer support center email: new.feedback@nsc.com tel: 1-800-272-9959 national semiconductor europe customer support center fax: +49 (0) 180-530 85 86 email: europe.support@nsc.com deutsch tel: +49 (0) 69 9508 6208 english tel: +44 (0) 870 24 0 2171 fran?ais tel: +33 (0) 1 41 91 8790 national semiconductor asia pacific customer support center email: ap.support@nsc.com national semiconductor japan customer support center fax: 81-3-5639-7507 email: jpn.feedback@nsc.com tel: 81-3-5639-7560 www.national.com lp3878-adj micropower 800ma low noise "ceramic stable" adjustable voltage regulator for 1v to 5v applications

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