View SMP9410_3138629.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

characteristics subject to change without notice 2056 2.0 10/04/02 SMP9410 summit microelectronics, inc. ?summit microelectronics, inc., 2002 ? 300 orchard city dr., #131 campbell, ca 95008 phone 408-378-6461 fax 408-378-6 586 www.summitmicro.com preliminary information 1 see last page four programmable 10-bit nonvolatile dacs inl 1lsb, dnl 1lsb, 1024 steps each power on recall at any value parallel or independent operation of dacs excellent temperature stability - 15ppm/ 0 c industrial temperature range 1.25v precision voltage reference i 2 c serial bus interface very small qfn package 5mm square applications laser bias/modulation current adjustment power supply trimming/margining potentiometer replacement quad 10-bit nonvolatile dacpot tm features introduction the SMP9410 is a quad 10 bit (1024 steps) non volatile d-to- a converter or dacpot tm . the device will recall any analog voltage on power up, making it ideal for high accuracy and temperature stable calibration purposes and can operate from a single +2.7v to +5.5v supply. internal precision buffers swing rail-to-rail with an input voltage range from ground to the positive supply. the part integrates four 10-bit dacs and associated cir- cuits: an enhanced unity gain operational amplifier output, a 10-bit volatile data latch, a 10-bit nonvolatile data register, and i 2 c bus industry standard 2-wire serial interface. the SMP9410 is available in a very small 5mm square quad flat package with no leads (qfn) for small form factor designs. programming of configuration, control and calibration val- ues by the user can be simplified with the interface adapter and windows gui software obtainable from summit micro- electronics. functional block diagram note: pin numbers are for the qfn. gnd v dd 24 25 19 v out 0 scl 5 cs 6 2056 bd a1 a2 28 sda 4 10-bit dac volatile control register non- volatile register v ref h0 13 14 v ref l0 SMP9410 v out 1 v ref h1 v ref l1 17 11 12 mute# 23 1.25v ref 20 precision reference 16 v out 2 10-bit dac volatile control register non- volatile register v ref h2 9 10 v ref l2 v out 3 v ref h3 v ref l3 15 7 8 configuration register volatile control register non- volatile register volatile control register non- volatile register mute#_ch 22 10-bit dac 10-bit dac interface & control logic 2 a0 3 100k 3 plcs 100k 100k 100k 100k v dd
2 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 pin configuration nc nc 1.25v ref nc v out 0 nc v out 1 v out 2 nc v out 3 nc nc nc a2 nc nc a1 a0 nc sda scl cs nc nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 36 35 34 33 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 37 2056 pcon-f vrefh3 v ref l3 v ref h2 v ref l2 v ref h1 v ref l1 v ref h0 v ref l0 nc nc nc nc nc nc nc nc nc nc gnd v dd mute# mute#_ch nc nc qfn tqfp introduction the device has four 10-bit digital to analog converters that are comprised of a resistor network that converts a digital input into an equivalent analog output voltage in proportion to the applied reference voltages. the voltage differential between each v ref l and v ref h input pair sets the range and full-scale output voltage for their respective dac. each dac has a 10-bit nonvolatile register that can hold a ?set-and-forget? value that can be recalled whenever the device is powered-on. each dac has a 10-bit volatile register that holds the current digital value. the register can be set to any value by the serial interface; commanded to load the zero scale value, full scale value or mid-scale value; or can recall a preset value stored in a nonvolatile register. the device also has a nonvolatile configuration register that is accessible over the 2-wire bus. the configuration register is used to select the device type identifier and the dac power-on state. the device uses the industry standard i 2 c 2-wire serial protocol. the bus is designed for two-way, two-line serial communication between different integrated circuits. the two lines are the scl (serial clock) and sda (serial data). both lines should be pulled up to the positive supply through a resistor. the protocol defines devices as being either masters or slaves. the SMP9410 will always be a slave because it does not initiate any communications or provide a clock output. device operation top view a1 a0 sda scl cs v ref h3 nc 1.25v ref v out 0 v out 1 v out 2 v out 3 2056 pcon-l v ref l3 v ref h2 v ref l2 v ref h1 v ref l1 v ref h0 v ref l0 a2 gnd v dd mute# mute#_ch 1 2 3 4 5 6 7 8 9 10 11 12 13 14 21 20 19 18 17 16 15 28 27 26 25 24 23 22 nc nc nc nc
3 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 note: pin numbers are from lpcc. pin descriptions # n i pe p y te m a n n i pn o i t p i r c s e d n i p 7 2 , 6 2 , 1 2 , 8 1 , 1c nc nd e t c e n n o c t o n e r a s n i p c n . t c e n n o c o n 8 2 , 2 , 3i2 a , 1 a , 0 a w o l r o h g i h m e h t g n i t t e s . c i g o l e c a f r e t n i l a i r e s e h t r o f s t u p n i s s e r d d a e h t l a i r e s e h t n i h t i w d e n i a t n o c s i t a h t s s e r d d a s u b s ? e c i v e d e h t e n i m r e t e d l l i w 0 0 1 l a n r e t n i e v a h s n i p e s e h t . m a e r t s a t a d s u bk v o t s r o t s i s e r p u - l l u p d d 4o / ia d s . e c i v e d e h t f o t u o d n a n i a t a d r e f s n a r t o t d e s u n i p l a n o i t c e r i d i b e h t 5il c s n i p s i h t . t u o d n a n i a t a d e h t k c o l c o t d e s u s i t i . k c o l c e c a f r e t n i l a i r e s e h t k 0 0 1 l a n r e t n i n a s a h v o t r o t s i s e r p u - l l u p d d 6is c ) d e t c e l e s = h i v ( t u p n i t c e l e s p i h ck k 0 0 1 l a n r e t n i n a s a h n i p s i h t p u - l l u p v o t r o t s i s e r d d 7 , 9 , 1 1 , 3 1i v f e r v , 0 h f e r , 1 h v f e r v , 2 h f e r 3 h v . s t u p n i e c n e r e f e r e g a t l o v e h t f o r e h g i h e h t f e r s s e l r o o t l a u q e e b t s u m h v n a h t d d v n a h t r e t a e r g d n a f e r . l 8 , 0 1 , 2 1 , 4 1i v f e r v , 0 l f e r , 1 l v f e r v , 2 l f e r 3 l v . s t u p n i e c n e r e f e r e g a t l o v e h t f o r e w o l e h t f e r r e t a e r g r o o t l a u q e e b t s u m l v n a h t s s e l d n a d n u o r g n a h t f e r . h 6 1 , 5 1 , 7 1 , 9 1o v t u o v , 0 t u o , 1 v t u o v , 2 t u o 3 t a h t r e w o l l o f n i a g - y t i n u a y b d e r e f f u b s i t i . s c a d e h t f o t u p t u o e g a t l o v e h t . s / v 1 o t p u w e l s n a c 0 2ov 5 2 . 1 f e r . e g a t l o v e c n e r e f e r t u p t u o v 5 2 . 1 a 2 2ih c _ # e t u m v e h t s t e s t u p n i e c i o h c _ # e t u m e h t t u o w o l d e t r e s s a s i # e t u m n e h w s l e v e l v = h g i h # h c _ e t u m ( f e r v = w o l # h c _ e t u m , h f e r n a s a h n i p s i h t . ) l 0 0 1 l a n r e t n ik v o t r o t s i s e r p u - l l u p d d 3 2i# e t u m , l e v e l l f e r v r o h f e r v e h t r e h t i e o t l a u q e e b o t s l e v e l t u o v e h t s e c r o f l a n r e t n i n a s a h n i p s i h t . ) e t u m = l i v ( h c _ # e t u m f o e u l a v e h t o t g n i d r o c c a k 0 0 1 v o t r o t s i s e r p u - l l u p d d 4 2r w pv d d . t u p n i y l p p u s r e w o p 5 2r w pd n g. n r u t e r y l p p u s r e w o p
4 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 temperature under bias ......................... ?55c to 125c storage temperature .............................. ?65c to 150c terminal voltage with respect to gnd: v dd ................................ ?0.3v to 6.0v all others ....................... ?0.3v to 6.0v output short circuit current ??????.???.100ma lead solder temperature (10 secs).....................300 c junction temperature.........................................150c esd rating per jedec????????..???..2000v latch-up testing per jedec?????..?......+/- 100ma note * - the device is not guaranteed to function outside its operating rating. stresses listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions outside those listed in the operational sections of this specification is not implied. exposure to any absolute maximum rating for extended periods may affect device performance and reliability. dc operating characteristics ( over recommended operating conditions; voltages are relative to gnd ) 2056 elect tablea temperature ........................................... ?40c to 85c voltage .................................................... 2.7v to 5.5v package thermal resistance j a 48 pin tqfp = 80c/w, 28 pin qfn= 80c/w j c 48 pin tqfp = 40c/w, 28 pin qfn= 32c/w moisture classification level 1 (msl 1) per j-std- 020 reliability characteristics data retention?????????..??..?..100 years endurance?????????...???.100,000 cycles absolute maximum ratings* recommended operating conditions l o b m y sr e t e m a r a pn o i t i d n o c. n i m. p y t. x a ms t i n u r e w o p i d d t n e r r u c y l p p u s r e w o p v e t i r w v n d d v 5 . 5 =3a m v e t i r w v n d d v 7 . 2 =3a m t n e c s e i u q r o y b d n a t s v d d t n e r r u c g n i d u l c x e ; v 5 . 5 = s c a d h g u o r h t 1a m v d d t n e r r u c g n i d u l c x e ; v 7 . 2 = s c a d h g u o r h t 1a m n w o d r e w o p v d d t n e r r u c l a t o t ; v 5 . 5 = s c a d g n i d u l c n i 1a m v d d t n e r r u c l a t o t ; v 7 . 2 = s c a d g n i d u l c n i 1a m v d d e g a t l o v y l p p u s7 . 25 . 5v v h i , # e t u m , s c , l c s , a d s 2 a , 1 a , 0 a , h c _ # e t u m 7 . 0 v d d v v l i 3 . 0 v d d v v l o a d si l o a m 3 =4 . 0v i i l e g a k a e l t u p n iv n i o t 0 =v d d 0 0 1a i o l e g a k a e l t u p t u o v t u o h g i h n i n w o d d e r e w o p e d o m e c n a d e p m i 0 1a w d n e e c n a r u d n e e t i r ws n o i t a r e p o e r o t s v n f o r e b m u n1 0 1 6 s e r o t s v n t r d n o i t n e t e r a t a dd v nn o i t n e t e r a t a0 0 1s r a e y
5 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 2056 elect tableb l o b m y sr e t e m a r a pn o i t i d n o c. n i m. p y t. x a ms t i n u e c n a m r o f r e p c i t a t s nn o i t u l o s e r0 1s t i b l n iy c a r u c c a e v i t a l e rv f e r v , v 5 = h f e r v 0 = l2 C1 2 b s l l n dy t i r a e n i l n o n l a i t n e r e f f i d v f e r v , v 5 = h f e r v 0 = l c i n o t o n o m d e e t n a r a u g 1 C5 . 0 1b s l e s z vr o r r e e l a c s o r e z0 0 0 = a t a d x e h 05 1v m s f ve g a t l o v e l a c s l l u ff f 3 = a t a d x e h v f e r h b s l 1 C v v c t e r u t a r e p m e t e l a c s l l u f t n e i c i f f e o c 5 1 m p p r o r r e t e s f f o2 . 0 C2 . 0 +s f v % r o r r e n i a g5 . 0 C5 . 0 +% e c n a m r o f r e p g n i h c t a m r o r r e g n i h c t a m y t i r a e n i l 1 b s l t u p t u o g o l a n a i t u o e l a c s f l a h @ t n e r r u c t u p t u o 0 0 2 = a t a d x e h , ? v t u o = , b s l 3 v f e r h x v = d d v 5 = 5 2 . 0 -5 2 . 0 +a m g e r d le l a c s f l a h @ n o i t a l u g e r d a o l0 0 2 = a t a d x e h k 1 = l r , ? o t 13 b s l c l d a o l e v i t i c a p a cn o i t a l l i c s o o n0 0 5f p s c i t s i r e t c a r a h c c i m a n y d w bh t d i w d n a b b d 3 Ck 0 1 = r ? 0 0 1z h k d h tn o i t r o t s i d c i n o m r a h l a t o tv 1 = a v s m r z h k 1 = f ,8 0 . 0% n o i t a l o s i l e n n a h c - o t - l e n n a h c v , z h k 1 = f n i v m 0 0 1 = p p v n o f e r h 0 6 Cb d k l a t - s s o r c l a t i g i d 0 6 Cb d s e g a t l o v e c n e r e f e r v f e r hv f e r v > h f e r lv d d v v f e r lv f e r v < l f e r hd n gv v 5 2 . 1 f e r 2 . 15 2 . 13 . 1v dc operating characteristics (continued) ( over recommended operating conditions; voltages are relative to gnd )
6 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 note (1) these values are guaranteed by design. refer to the timing diagram in figure 4. table 1. data/clock timing 2056 table01 ac operating characteristics ( over recommended operating conditions ) l o b m y sr e t e m a r a ps n o i t i d n o c. n i m. x a ms t i n u f l c s y c n e u q e r f k c o l c l c s 00 0 1z h k t w o l d o i r e p w o l k c o l c 7 . 4s t h g i h d o i r e p h g i h k c o l c 0 . 4s t f u b ) 1 ( e m i t e e r f s u bn o i s s i m s n a r t w e n e r o f e b7 . 4s t a t s : u s e m i t p u t e s n o i t i d n o c t r a t s 7 . 4s t a t s : d h e m i t d l o h n o i t i d n o c t r a t s 0 . 4s t o t s : u s e m i t p u t e s n o i t i d n o c p o t s 7 . 4s t a a t u p t u o d i l a v o t e g d e k c o l c) n e l c y c ( a d s d i l a v o t w o l l c s3 . 05 . 3s t h d e m i t d l o h t u o a t a de g n a h c a d s o t ) 1 + n e l c y c ( w o l l c s3 . 0s t r ) 1 ( e m i t e s i r a d s d n a l c s 0 0 0 1s n t f ) 1 ( e m i t l l a f a d s d n a l c s 0 0 3s n t t a d : u s e m i t p u t e s n i a t a d 0 5 2s n t t a d : d h e m i t d l o h n i a t a d 0s n i t) 1 ( a d s d n a l c s r e t l i f e s i o nn o i s s e r p p u s e s i o n0 0 1s n t r w e m i t e l c y c e t i r w 5s m
7 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 pin 9, 5v pin 7, 10v pin5, reserved pin3, gnd pin 1, gnd pin 10, reserved pin 8, reserved pin 6, reserved pin 4, sda pin 2, scl top view of straight 0.1" 0.1" closed side connector smx3200 interface positive supply negative supply v dd gnd 9 7 5 3 1 10 8 6 4 2 SMP9410 2056 fig06 c1 0.01f development hardware & software figure 1. smx3200 programmer connections for the SMP9410. programming connection the end user can obtain the summit smx3200 program- ming system for device prototype development. the smx3200 system consists of a programming dongle, cable and windows gui software. it can be ordered on the website or from a local representative. the latest revisions of all software and an application brief describing the smx3200 is available from the website ( www.summitmicro.com ). the smx3200 programming dongle/cable interfaces di- rectly between a pc?s parallel port and the target applica- tion. the device is then configured on-screen via an intuitive graphical user interface employing drop-down menus. the windows gui software will generate the data and send it in i2c serial bus format so that it can be directly downloaded to the SMP9410 via the programming dongle and cable. an example of the connection interface is shown in figure 1.when design prototyping is complete, the software can generate a hex data file that should be transmitted to summit for approval. applications information figure 2. applications schematic. additional bypass capacitors may be needed in noisy environments. the v ref h and v ref l pins can be tied to v dd or gnd or as specified in the pin descriptions. for optimum performance, all capacitors should be placed as close as possible to the SMP9410 pins mute# v refl 3 v out 3 v refh 3 v refl 2 v out 2 v refh 2 v refl 1 v out 1 v refh 1 v refl 0 v out 0 v refh 0 0.01 f v dd f optional a0 a1 a2 optional address biasing sda scl 4 5 28 2 3 cs 6 mute#_ch 23 22 +5v gnd common gnd v0 v1 v2 v3 SMP9410 19 17 16 15 13 11 9 7 14 12 10 8 24 25 sda scl cs user options 1.25v ref 20 28 lead qfn pin numbering 0.1 f 0.01 f 0.01 f 0.01 f 0.01 f summit will then assign a unique customer id to the hex code and program production devices before the final electrical test operations. this will ensure proper device operation in the end application. sda scl
8 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 accessing the dacs data transfers are initiated when a master issues a start condition, which is a high to low transition on sda while scl is high (see figure 3). the start is immediately followed by an eight bit transmission: bits 7 through 1 comprise the device type identifier and device bus address; bit 0 is the read/write bit indicating the action to follow. if the intended device receives the byte and recognizes its address it will return an acknowledge during the 9 th clock cycle. some data transfers will be concluded with a stop condition, which is a low to high transition on sda while scl is high. note: a stop condition must be performed for all nonvolatile write operations. timing for all i 2 c opera- tions are summarized in figure 4 and table 1. the default device type identifier for addressing dacs is 0101 bin . in order to accommodate more than eight devices on a single bus the device type identifier can be modified by the end user by writing to the configuration registers. (see table 2). a0, a1 and a2 are the address inputs. when addressing the nonvolatile or configuration registers, theaddress inputs distinguish which one of eight possible devices sharing the common bus is being addressed. setting them high or low will determine the device?s bus address that is contained within the serial bus data stream. figure 3. start and stop timing figure 4. i 2 c data/clock timing 2056 fig01 scl sda in start condition stop condition t f t r t low t high t hd:sta t su:sta t buf t dh t hd:dat t su:dat t su:sto scl sda in sda out t aa 2056 fig02 command structure the command structure is illustrated in table 2. of special note is the ability to write individually to any of the four dacs, or to all of them. the first five commands are three bytes in length and can either be volatile or nonvolatile dac writes. applications information (continued)
9 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 c 2 c 4 a c k a c k s t o p master sda slave 1 0 0 1 r/ w a 2 a 1 a 0 optional 2056 fig05 1 c 7 c 6 c 5 c 3 c 1 c 0 configuration data byte a c k master sda slave 0 1 0 1 r/ w 1 a 2 a 1 a 0 2056 fig04 dac s t o p d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 a c k x x x x 1 0 0 1 data from master data to master n a c k d 9 d 8 a c k x x x x x x a c k d 9 d 8 a c k a c k s t o p master sda slave 0 1 0 1 r/ w 0 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 x a 2 a 1 a 0 1 0 0 1 nonvolatile write only x 2056 fig03 command data byte ack and nack a device that is receiving data will respond with an acknowl- edge by pulling the sda line low (ack) after each byte is transmitted. the transmitting device will recognize this and continue to transmit. when the master has received the data it expects it will hold the sda line high (nack) and the transmitting device will end transmission. sequence the sequence is to issue a start, followed by the device type and bus address with the read/write bit set to zero. the device will respond with an acknowledge and the master will then issue the command and follow-on data. in figure 5 the write is to dac1 where the command = 1001 bin ; d9 and d8 are the msbs of the dac value being written. the device will then respond with an acknowledge followed by the master writing the last eight bits. if no stop is generated after the device acknowledge the write is only to the register. if the device acknowledge is followed by a stop the data is written to both the dac register and to the nonvolatile register. reading the device reading the dacs requires setting the r/w bit to one. then the host supplies clocks and the device will output data as shown in figure 6. configuration register the SMP9410 can be configured by the end user or by summit prior to shipment (see programming information). reading the configuration register can also be performed if it has not already been locked. see figure 7. there is one configuration register and it is accessed through the serial interface using 1001 bin as the device type address, conse- quently the dac address should never be set to 1001 bin . the register is shown in table 3. figure 5. dac1 write operation (see table 2) figure 6. read dacs applications information (continued) figure 7. configuration register (see table 3)
10 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 table 3. configuration register 2056 table03 * note: never set the programmable device type identifier for dac addressing to 1001 bin . the slave address for the configuration register is 1001 bin , and a collision will occur on the i 2 c bus. note: all parts are normally shipped with the configuration register locked with setting 5fh (01011111). unlocked user configurable parts are available on a special order basis. contact summit. b s m 7 c 6 c5 c4 c3 c2 c1 c b s l 0 c n o i t c n u f xxxx x xx 0 e l b i s s e c c a r e t s i g e r n o i t a r u g i f n o c xx 1 d e k c o l r e t s i g e r n o i t a r u g i f n o c 00 x s 0 l l a o t t e s s c a d : l l a c e r n o r e w o p 01 s 1 l l a o t t e s s c a d : l l a c e r n o r e w o p 10 e l a c s d i m o t t e s s c a d : l l a c e r n o r e w o p 11 r e t s i g e r v n o t t e s s c a d : l l a c e r n o r e w o p 0 xx v n w o d r e w o p t a t u o e c n a d e p m i w o l = 1 v n w o d r e w o p t a t u o e c n a d e p m i h g i h = * 3 a d p* 2 a d p* 1 a d p* 0 a d p x r e i f i t n e d i e p y t e c i v e d e l b a m m a r g o r p g n i s s e r d d a c a d r o f applications information (continued) table 2. command structure 2056 table02 b s m 7 d 6 d5 d4 d3 d2 d1 d b s l 0 d d n a m m o cn o i t c n u f 1000 xx 9 d8 d 0 c a d e t i r w , p o t s o n h t i w e l i t a l o v p o t s h t i w e l i t a l o v n o n 10 0 1 xx 9 d8 d 1 c a d e t i r w 10 10 xx 9 d8 d 2 c a d e t i r w 10 1 1 xx 9 d8 d 3 c a d e t i r w 1110 xx 9 d8 d s c a d l l a e t i r w 1111 x 000 e l l a c e r 2 0 c a d o t e l l a c e r 2 s c a d o t 1111 x 001 e l l a c e r 2 1 c a d o t 1111 x 010 e l l a c e r 2 2 c a d o t 1111 x 011 e l l a c e r 2 3 c a d o t 1111 x 1 xx e l l a c e r 2 s c a d l l a o t 110 1 x 000 0 c a d d p s c a d n w o d r e w o p ) 3 e l b a t e e s ( 110 1 x 001 1 c a d d p 110 1 x 010 2 c a d d p 110 1 x 011 3 c a d d p 110 1 x 1 xx s c a d l l a d p 1100 xxxx s c a d l l a u ps c a d l l a p u r e w o p
11 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 packages a b pin 1 indicator inches ( millim eters ) 0.002 - 0.006 ( 0.05-0.15 ) max. 0.047 ( 1.2 ) 0.037 - 0.041 0.95 - 1.05 0.018 - 0.030 ( 0.45 - 0.75 ) 0.039 ( 1.00 ) 0.02 ( 0.5 ) bsc 0.007 - 0.011 ( 0.17 - 0.27 ) detail "a" detail "b" ( b ) ( a ) ( a ) 0.354 ( 9.00 ) bsc 0.276 ( 7.00 ) bsc ( b ) 48 pin tqfp package 0 o min to 7 o max ref jedec ms-026 ref
12 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 28 pin qfn package packages (continued)
13 SMP9410 summit microelectronics, inc. preliminary information 2056 2.0 10/04/02 notice note 1 - this is a preliminary information data sheet that describes a summit product currently in pre-production with limited characterization.. summit microelectronics, inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. summit microelectronics, inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user?s specific application. while the information in this publication has been carefully checked, summit microelectronics, inc. shall not be liable for any damages arising as a result of any error or omission. summit microelectronics, inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. products are not authorized for use in such applications unless summit microelectronics, inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of summit microelectronics, inc. is adequately protected under the circumstances. ? copyright 2002 summit microelectronics, inc. power management for communications? revision 2.0 - this document supersedes all previous versions. i 2 c is a trademark of philips corporation. ordering information part marking SMP9410 n base part number package n = qfn f = tqfp 2056 tree summit SMP9410f ayyww pin 1 annn summit part number date code (yyw w ) part number suffix product tracking code (summ it use) lot tracking code (summit use) drawing not to scale xx status tracking code (blank, ms, es, 01, 02,...) (summit use) SMP9410n ayyww pin 1 annn summit part number date code (yyww) part number suffix product tracking code (summit use) lot tracking code (summit use) drawing not to scale xx status tracking code (blank, ms, es, 01, 02,...) (summit use) summit 28 pin qfn package top view 48 pin tqfp package top view

▲Up To Search▲

Price & Availability of SMP9410

	To Download SMP9410 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .