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general description the max13046e/max13047e ?5kv esd-protected bidirectional level translators provide level shifting for data transfer in a multivoltage system. the max13046e is a single-channel translator, and the max13047e is a dual-channel translator. externally applied voltages, v cc and v l , set the logic level on either side of the device. the max13046e/max13047e utilize a transmis- sion-gate-based design to allow data translation in either direction (v l ? v cc ) on any single data line. the max13046e/max13047e accept v l from +1.1v to the minimum of either +3.6v or (v cc + 0.3v), and v cc from +1.65v to +5.5v, making these devices ideal for data transfer between low-voltage asics/plds and higher voltage systems. the max13046e/max13047e feature a shutdown mode that reduces supply current to less than 1? thermal short-circuit protection, and ?5kv esd protection on the v cc side for enhanced protection in applications that route signals externally. the max13046e/max13047e operate at a guaranteed data rate of 8mbps when push- pull driving is used. the max13046e is available in a 6-pin ?fn package, and the max13047e is available in a 10-pin utqfn. both devices are specified over the extended -40? to +85? operating temperature range. applications i 2 c and 1-wire level translation cmos logic-level translation cell phones portable devices features ? bidirectional level translation ? operation down to +1.1v on v l ? ultra-low supply current in shutdown mode 1? (max) ? guaranteed push-pull driving data rate 8mbps (+1.2v v l +3.6v, v cc +5.5v) 16mbps (+1.8v v l v cc +3.3v) ? extended esd protection on the i/o v cc lines ?5kv human body model ?5kv iec61000-4-2 air-gap discharge method ?kv iec61000-4-2 contact discharge ? low supply current ? short-circuit protection ? space-saving ?fn and utqfn packages max13046e/max13047e single- and dual-bidirectional low-level translator ________________________________________________________________ maxim integrated products 1 ordering information/selector guide 19-4149; rev 1; 8/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. note: all devices are specified over the extended -40? to +85? operating temperature range. + denotes a lead-free/rohs-compliant package. ep = exposed pad. part pin-package number of channels top mark max13046e elt+ 6 ?fn (1mm x 1.5mm) 1 oc max13047e evb+ 10 utqfn (1.4mm x 1.8mm) 2 aac pin configurations top view max13046e dfn 1mm 1.5mm 2 5 shdn gnd 1 6 v cc v l1 3 4 i/o v cc i/o v l + utqfn 1.4mm 1.8mm max13047e + v cc n.c. i/o v l2 v l 1 2 7 6 3 n.c. 4 shdn i/o v cc2 i/o v l1 gnd i/o v cc1 5 10 9 8 typical application circuits appear at end of data sheet. 1-wire is a registered trademark of maxim integrated products, inc.
max13046e/max13047e single- and dual-bidirectional low-level translator 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +1.65v to +5.5v, v l = +1.1v to minimum of either +3.6v or ((v cc + 0.3v)), i/o v l and i/o v cc are unconnected, t a = -40? to +85?, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v at t a = +25?.) (notes 2, 3) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) v cc ...........................................................................-0.3v to +6v v l ..............................................................................-0.3v to +4v i/o v cc .......................................................-0.3v to (v cc + 0.3v) i/o v l ............................................................-0.3v to (v l + 0.3v) shdn ........................................................................-0.3v to +6v short-circuit duration i/o v l , i/o v cc to gnd...........continuous power dissipation (t a = +70?) 6-pin ?fn (derate 2.1mw/? above +70?) .............168mw 10-pin utqfn (derate 6.9mw/? above +70?).........559mw junction-to-ambient thermal resistance ( ja ) (note 1) 6-pin ?fn .................................................................477?/w 10-pin utqfn ...........................................................20.1?/w junction-to-ambient thermal resistance ( jc ) (note 1) 6-pin ?fn ................................................................20.1?/w 10-pin utqfn .........................................................143.1?/w operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units power supply v cc > 3.3v 1.1 3.6v v l supply range v l v cc 3.3v 1.1 v cc + 0.3v v v cc supply range v cc 1.65 5.5 v supply current from v cc i qvcc 10 ? supply current from v l i qvl 15 ? v cc shutdown-mode supply current i sd-vcc t a = +25?, shdn = gnd 0.03 1a v l shutdown-mode supply current i sd-vl t a = +25?, shdn = gnd 0.03 1a i/o v l and i/o v cc shutdown-mode leakage current i sd-lkg t a = +25?, shdn = gnd 0.02 0.5 a shdn input leakage t a = +25? 0.02 0.1 a esd protection human body model ?5v iec 61000-4-2 air-gap discharge ?5v i/o v cc (note 4) iec 61000-4-2 contact discharge ?v kv all other pins human body model 2 kv logic-level thresholds i/o v l input-voltage high v ihl v l - 0.2 v i/o v l input-voltage low v ill 0.15 v note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
max13046e/max13047e single- and dual-bidirectional low-level translator _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +1.65v to +5.5v, v l = +1.1v to minimum of either +3.6v or ((v cc + 0.3v)), i/o v l and i/o v cc are unconnected, t a = -40? to +85?, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v at t a = +25?.) (notes 2, 3) parameter symbol conditions min typ max units i/o v cc input-voltage high v ihc v cc - 0.4 v i/o v cc input-voltage low v ilc 0.15 v i/o v l output-voltage high v ohl i/o v l source current = 20?, v i/o vcc > v cc - 0.4v 0.67 x v l v i/o v l output-voltage low v oll i/o v l sink current = 1ma, v i/o vcc < 0.15v 0.4 v i/o v cc output-voltage high v ohc i/o v cc source current = 20?, v i/o vl > v l - 0.2v 0.67 x v cc v i/o v cc output-voltage low v olc i/o v cc sink current = 1ma, v i/o vl < 0.15v 0.4 v v l > 1.2 v l - 0.2 shdn input-voltage high v ih- shdn 1.1 v l < 1.2 v l - 0.1 v shdn input-voltage low v il- shdn 0.15 v i/o v l -to-i/o v cc resistance 80 250 v cc shutdown threshold low v th_l_vcc v cc falling, v l = +3.3v 0.5 0.8 1.1 v v cc shutdown threshold high v th_h_vcc v cc rising, v l = +3.3v 0.3 0.6 0.9 v v l shutdown threshold v th_vl 0.35 0.75 1.06 v pullup resistance v cc = v l = +3.3v 6 10 15.5 k rise/fall-time accelerator stage accelerator pulse duration 20 ns i/o v l output-accelerator source impedance v l = 1.7v 13 i/o v cc output-accelerator source impedance v cc = 2.2v 17 i/o v l output-accelerator source impedance v l = 3.2v 6 i/o v cc output-accelerator source impedance v cc = 3.6v 10
max13046e/max13047e single- and dual-bidirectional low-level translator 4 _______________________________________________________________________________________ timing characteristics for +1.2v v l minimum of either +3.6v or (v cc + 0.3v) (v cc ?.5v, +1.2v v l minimum of either +3.6v or ((v cc + 0.3v)), r s = 50 , r l = 1m , c l = 15pf, t a = -40? to +85?, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v at t a = +25?.) (notes 2, 3, 5) parameter symbol conditions min typ max units push-pull driving, figure 1a 7 25 i/o v cc rise time t rvcc open-drain driving, figure 1c 170 400 ns push-pull driving, figure 1a 6 37 i/o v cc fall time t fvcc open-drain driving, figure 1c 20 50 ns push-pull driving, figure 1b 8 30 i/o v l rise time t rvl open-drain driving, figure 1d 180 400 ns push-pull driving, figure 1 3 56 i/o v l fall time t fvl open-drain driving, figure 1d 30 60 ns push-pull driving 5 30 t pd-vl-vcc driving i/o v l open-drain driving 210 1000 push-pull driving 4 30 propagation delay t pd-vcc-vl driving i/o v cc open-drain driving 190 1000 ns push-pull driving 20 channel-to-channel skew t skew each translator equally loaded open-drain driving 50 ns push-pull driving 8 mbps maximum data rate open-drain driving 500 kbps timing characteristics for +1.1v v l +1.2v (v cc ?.5v, +1.1v v l +1.2v, r s = 50 , r l = 1m , c l = 15pf, t a = -40? to +85?, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v at t a = +25?.) (notes 2, 3, 5) parameter symbol conditions min typ max units push-pull driving, figure 1a 7 200 i/o v cc rise time t rvcc open-drain driving, figure 1c 170 400 ns push-pull driving, figure 1a 6 37 i/o v cc fall time t fvcc open-drain driving, figure 1c 20 50 ns push-pull driving, figure 1b 8 30 i/o v l rise time t rvl open-drain driving, figure 1d 180 400 ns push-pull driving, figure 1 3 30 i/o v l fall time t fvl open-drain driving, figure 1d 30 60 ns push-pull driving 5 200 t pd-vl-vcc driving i/o v l open-drain driving 210 1000 push-pull driving 4 200 propagation delay t pd-vcc-vl driving i/o v cc open-drain driving 190 1000 ns push-pull driving 20 channel-to-channel skew t skew each translator equally loaded open-drain driving 50 ns push-pull driving 1.2 mbps maximum data rate open-drain driving 500 kbps
max13046e/max13047e single- and dual-bidirectional low-level translator _______________________________________________________________________________________ 5 timing characteristics for +1.8v v l v cc +3.3v (+1.8v v l v cc +3.3v, r s = 50 , r l = 1m , c l = 15pf, t a = -40? to +85?, unless otherwise noted. typical values are v cc = +3.3v, v l = +1.8v at t a = +25?.) (notes 2, 3, 5) parameter symbol conditions min typ max units i/o v cc rise time t rvcc push-pull driving, figure 1a 15 ns i/o v cc fall time t fvcc push-pull driving, figure 1a 15 ns i/o v l rise time t rvl push-pull driving, figure 1b 15 ns i/o v l fall time t fvl push-pull driving, figure 1b 15 ns t pd-vl-vcc push-pull driving, driving i/o v l 15 propagation delay t pd-vcc-vl push-pull driving, driving i/o v cc 15 ns channel-to-channel skew t skew push-pull driving, each translator equally loaded 10 ns maximum data rate push-pull driving 16 mbps note 2: all units are 100% production tested at t a = +25?. limits over the operating temperature range are guaranteed by design and not production tested. note 3: for normal operation, ensure v l < (v cc + 0.3v). during power-up, v l > (v cc + 0.3v) does not damage the device. note 4: esd protection is guaranteed by design. to ensure maximum esd protection, place a 1? ceramic capacitor between v cc and gnd. see typical application circuits . note 5: timing is measured using 10% of input to 90% of output.
max13046e/max13047e single- and dual-bidirectional low-level translator 6 _______________________________________________________________________________________ typical operating characteristics (v cc = +3.3v, v l = +1.8v, r l = 1m , c l = 15pf, push-pull driving data rate = 8mbps, t a = +25?, unless otherwise noted.) v l dynamic supply current vs. v cc supply voltage (push-pull driving one i/o v l ) v cc supply voltage (v) v l supply current ( a) max13046e/7e toc01 1.65 2.20 2.75 3.30 3.85 4.40 4.95 5.50 0 50 100 150 200 250 300 350 v l dynamic supply current vs. v cc supply voltage (push-pull driving one i/o v cc ) v cc supply voltage (v) v l supply current ( a) max13046e/7e toc02 1.65 2.20 2.75 3.30 3.85 4.40 4.95 5.50 0 50 100 150 200 250 v cc dynamic supply current vs. v l supply voltage (push-pull driving one i/o v l ) v l supply voltage (v) v cc supply current ( a) max13046e/7e toc03 1.2 1.9 2.6 3.3 0 100 200 300 400 500 600 v cc dynamic supply current vs. v l supply voltage (push-pull driving one i/o v cc ) v l supply voltage (v) v cc supply current ( a) max13046e/7e toc04 1.2 1.9 2.6 3.3 0 10 20 30 40 50 60 70 80 v l dynamic supply current vs. temperature (push-pull driving one i/o v l ) temperature ( c) v l supply current ( a) max13046e/7e toc05 -40 -15 10 35 60 85 0 20 40 60 80 100 120 140 160 180 200 v l dynamic supply current vs. temperature (push-pull driving one i/o v cc ) temperature ( c) v l supply current ( a) max13046e/7e toc06 -40 -15 10 35 60 85 0 50 100 150 200 250 300 350 v l dynamic supply current vs. capacitive load (push-pull driving one i/o v l ) capacitive load (pf) v l supply current ( a) max13046e/7e toc07 0 1020304050 0 20 40 60 80 100 120 v cc dynamic supply current vs. capacitive load (push-pull driving one i/o v l ) capacitive load (pf) v cc supply current ( a) max13046e/7e toc08 0 1020304050 0 200 400 600 800 1000 1200 rise/fall time vs. capacitive load (push-pull driving one i/o v l ) capacitive load (pf) rise/fall time (ns) max13046e/7e toc09 0 1020304050 0 5 10 15 20 25 t fvcc t rvcc
max13046e/max13047e single- and dual-bidirectional low-level translator _______________________________________________________________________________________ 7 typical operating characteristics (continued) (v cc = +3.3v, v l = +1.8v, r l = 1m , c l = 15pf, push-pull driving data rate = 8mbps, t a = +25?, unless otherwise noted.) propagation delay vs. capacitive load (push-pull driving one i/o v l ) capacitive load (pf) propagation delay (ns) max13046e/7e toc10 0 1020304050 0 1 2 3 4 5 6 7 rise/fall time vs. capacitive load (push-pull driving one i/o v cc ) capacitive load (pf) rise/fall time (ns) max13046e/7e toc11 0 1020304050 0 2 4 6 8 10 12 t rvl t fvl propagation delay vs. capacitive load (push-pull driving one i/o v cc ) capacitive load (pf) propagation delay (ns) max13046e/7e toc12 0 1020304050 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 rail-to-rail driving (driving one i/o v l ) max13046e/7e toc13 25ns/div i/o v l i/o v cc 1v/div 1v/div existing shutdown mode max13046e/7e toc14 250ns/div i/o v l i/o v cc 1v/div 2v/div 1v/div shdn
max13046e/max13047e detailed description the max13046e/max13047e ?5kv esd-protected bidirectional level translators provide level shifting for data transfer in a multivoltage system. the max13046e is a single-channel translator and the max13047e is a dual-channel translator. externally applied voltages, v cc and v l , set the logic level on either side of the device. the max13046e/max13047e utilize a transmis- sion-gate-based design to allow data translation in either direction (v l ? v cc ) on any single data line. the max13046e/max13047e accept v l from +1.1v to the minimum of either +3.6v or (v cc + 0.3v) and v cc from +1.65v to +5.5v, making these devices ideal for data transfer between low-voltage asics/plds and higher voltage systems. the max13046e/max13047e feature a shutdown mode that reduces supply current to less than 1? thermal short-circuit protection, and ?5kv esd protection on the v cc side for enhanced protection in applications that route signals externally. the max13046e/max13047e operate at a guaranteed data rate of 8mbps when push- pull driving is used. see the functional diagram . single- and dual-bidirectional low-level translator 8 _______________________________________________________________________________________ max13046e pin description max13046e function dfn name 1v l v l inp ut s up p l y v ol tag e. byp ass v l w i th a 0.1? cer am i c cap aci tor l ocated as cl ose as p ossi b l e to the i np ut. 2 gnd ground 3 i/o v l input/output. referenced to v l . 4 i/o v cc input/output. referenced to v cc . 5 shdn s hutd ow n inp ut. d r i ve s hd n hi g h to enab l e the d evi ce. d r i ve s hd n l ow to p ut the d evi ce i n shutd ow n m od e. 6v cc v cc inp ut s up p l y v ol tag e. byp ass v cc w i th a 1f cer am i c cap aci tor l ocated as cl ose as p ossi b l e to the i np ut for ful l e s d p r otecti on. if ful l e s d p r otecti on i s not r eq ui r ed , b yp ass v cc w i th a 0.1f cer am i c cap aci tor . max13047e pin description max13047e function utqfn name 1 i/o v l2 input/output 2. referenced to v l . 2v l v l input supply voltage. bypass v l with a 0.1? ceramic capacitor located as close as possible to the input. 3, 7 n.c. not connected. internally not connected. 4 shdn enable input. drive shdn high to enable the device. drive shdn low to put the device in shutdown mode. 5 i/o v cc2 input/output 2. referenced to v cc . 6v cc v cc input supply voltage. bypass v cc with a 1? ceramic capacitor located as close as possible to the input for full esd protection. if full esd protection is not required, bypass v cc with a 0.1? ceramic capacitor. 8 i/o v cc1 input/output 1. referenced to v cc . 9 gnd ground 10 i/o v l1 input/output 1. referenced to v l . ep exposed pad. connect ep to gnd.
level translation for proper operation, ensure that +1.65v v cc +5.5v and +1.1v v l the minimum of either +3.6v or (v cc + 0.3v). during power-up sequencing, v l (v cc + 0.3v) does not damage the device. the speed of the rise time accelerator circuitry limits the maximum data rate for the max13046e/max13047e to 16mbps. rise-time accelerators the max13046e/max13047e have an internal rise-time accelerator, allowing operation up to 16mbps. the rise- time accelerators are present on both sides of the device and act to speed up the rise time of the input and output of the device, regardless of the direction of the data. the triggering mechanism for these accelera- tors is both level and edge sensitive. to guarantee operation of the rise time accelerators the maximum parasitic capacitance should be less than 200pf on the i/o lines. shutdown mode drive shdn low to place the max13046e/max13047e in shutdown mode and drive shdn high for normal operation. activating the shutdown mode disconnects the internal 10k pullup resistors on the i/o v cc and i/o v l lines. this forces the i/o lines to a high-impedance state, and decreases the supply current to less than 1?. the high-impedance i/o lines in shutdown mode allow for use in a multidrop network. the max13046e/ max13047e have a diode from each i/o to the corre- sponding supply rail and gnd. therefore, when in shut- down mode, do not allow the voltage at i/o v l to exceed (v l + 0.3v), or the voltage at i/o v cc to exceed (v cc + 0.3v). operation with one supply disconnected certain applications require sections of circuitry to be disconnected to save power. when v l is connected and v cc is disconnected or connected to ground, the device enters shutdown mode. in this mode, i/o v l can still be driven without damage to the device; however, data does not translate from i/o v l to i/o v cc . if v cc falls more than v th_l_vcc below v l , the device disconnects the pullup resistors at i/o v l and i/o v cc . to achieve the lowest possible supply current from v l when v cc is dis- connected, it is recommended that the voltage at the v cc supply input be approximately equal to gnd. when v cc is connected and v l is less than v th_vl , the device enters shutdown mode. in this mode, i/o v cc can still be driven without damage to the device; howev- er, data does not translate from i/o v cc to i/o v l . max13046e/max13047e single- and dual-bidirectional low-level translator _______________________________________________________________________________________ 9 one-shot rise-time accelerator v l shdn i/o v l i/o v cc v cc gate bias one-shot rise-time accelerator pu2 pu1 n 10k 10k gnd functional diagram
max13046e/max13047e when v cc is disconnected or connected to ground, i/o v cc must not be driven more than v cc + 0.3v. when v l is disconnected or connected to ground, i/o v l must not be driven more than v l + 0.3v. short-circuit protection thermal-overload detection protects the max13046e/ max13047e from short-circuit fault conditions. in the event of a short-circuit fault, when the junction tempera- ture (t j ) exceeds +150?, the device enters shutdown mode. when the device has cooled to below +140?, normal operation resumes. 15kv esd protection esd protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. the esd structures withstand electrostatic discharge in all states: normal operation, shutdown mode, and powered down. the i/o v cc lines of the max13046e/max13047e are char- acterized for protection to the following limit: ?5kv using the human body model esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 2a shows the human body model, and figure 2b shows the current waveform it generates when dis- charged into a low-impedance state. this model con- sists of a 100pf capacitor charged to the esd voltage of interest that is then discharged into the test device through a 1.5k resistor. single- and dual-bidirectional low-level translator 10 ______________________________________________________________________________________ max13046e/ max13047e i/o v l i/o v cc (t rise , t fall < 10ns) data i/o v cc v cc v cc v l gnd r l c l t pd-vcc-vl t pd-vcc-vl i/o v l t rvl t fvl shdn v l r s 50 max13046e/ max13047e i/o v l i/o v l (t rise , t fall < 10ns) data i/o v cc r l c l v cc v cc v l gnd t pd-vl-vcc t pd-vl-vcc i/o v cc t rvcc t fvcc shdn v l r s 50 figure 1a. rail-to-rail driving i/o v l figure 1b. rail-to-rail driving i/o v cc
iec 61000-4-2 the iec 61000-4-2 standard covers esd testing and per- formance of finished equipment; it does not specifically refer to integrated circuits. the max13046e/max13047e help to design equipment that meets level 4 of iec 61000-4-2 without the need for additional esd-protection components. the major difference between tests done using the human body model and iec 61000-4-2 is high- er peak current in iec 61000-4-2 because series resis- tance is lower in the iec 61000-4-2 model. hence, the esd withstand voltage measured to iec 61000-4-2 can be lower than that measured using the human body model. figure 3a shows the iec 61000-4-2 model, and figure 3b shows the current waveform for the ?kv, iec 61000-4-2, level 4, esd contact-discharge test. the air- gap test involves approaching the device with a charged probe. the contact-discharge method connects the probe to the device before the probe is energized. applications information power-supply decoupling to reduce ripple and the chance of transmitting incor- rect data, bypass v l and v cc to ground with a 0.1? ceramic capacitor . to ensure full ?5kv esd protec- tion, bypass v cc to ground with a 1? ceramic capaci- tor. place all capacitors as close as possible to the power-supply inputs. i 2 c level translation the max13046e/max13047e level shifts the data pre- sent on the i/o lines between +1.1v and +5.5v, making them ideal for level translation between a low-voltage asic and an i 2 c device. a typical application involves interfacing a low-voltage microprocessor to a +3v or +5v d/a converter, such as the max517. 1-wire interface translation the max13046e/max13047e are ideal for level transla- tion between a low-voltage asic and 1-wire device. a max13046e/max13047e single- and dual-bidirectional low-level translator ______________________________________________________________________________________ 11 max13046e/ max13047e i/o v l i/o v cc data i/o v cc v cc v cc v l gnd r l c l t pd-vcc-vl t pd-vcc-vl i/o v l t rvl t fvl shdn v l max13046e/ max13047e i/o v l i/o v cc v cc v cc v l gnd i/o v cc t pd-vl-vcc t pd-vl-vcc i/o v l t rvcc t fvcc data r l c l shdn v l figure 1c. open-drain driving i/o v l figure 1d. open-drain driving i/o v cc
max13046e/max13047e typical application involves interfacing a low-voltage microprocessor to an external memory, such as the ds2502. the maximum data rate depends on the 1-wire device. for the ds2502, the maximum data rate is 16.3kbps. a 5k pullup resistor is recommended when interfacing with the ds2502. push-pull vs. open-drain driving the max13046e/max13047e can be driven in a push- pull or open-drain configurations. for open-drain con- figuration, internal 10k resistors pull up i/o v l and i/o v cc to their respective power supplies. see the timing characteristics table for maximum data rates when using open-drain drivers. pcb layout the max13046e/max13047e require good pcb layout for proper operation and optimal rise/fall time perfor- mance. ensure proper high-frequency pcb layout even when operating at low data rates. driving high-capacitive load capacitive loading on the i/o lines impacts the rise time (and fall time) of the max13046e/max13047e when dri- ving the signal lines. the actual rise time is a function of the load capacitance, parasitic capacitance, the supply voltage, and the drive impedance of the max13046e/ max13047e. operating the max13046e/max13047e at a low data rate does not increase capacitive load driving capability. single- and dual-bidirectional low-level translator 12 ______________________________________________________________________________________ i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes figure 2b. human body current waveform charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m r d 1500 high- voltage dc source device under test figure 2a. human body esd test model 100% 90% 60ns 10% tr = 0.7ns to 1ns i peak i 30ns t figure 3b. iec 61000-4-2 esd generator current waveform charge-current- limit resistor discharge resistance storage capacitor c s 150pf r c 50m to 100m r d 330 high- voltage dc source device under test figure 3a. iec 61000-4-2 esd test model
max13046e/max13047e single- and dual-bidirectional low-level translator ______________________________________________________________________________________ 13 max13046e shdn i/o v l data data i/o v cc 0.1 f 1 f +3.3v +1.8v v cc +3.3v system +1.8v system v l typical application circuits max13047e shdn i/o v l2 data data i/o v cc2 0.1 f 1 f +3.3v +1.8v v cc +3.3v system +1.8v system v l i/o v l1 i/o v cc1
max13046e/max13047e single- and dual-bidirectional low-level translator 14 ______________________________________________________________________________________ chip information process: bicmos package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . package type package code document no. 6 ?fn l611-1 21-0147 10 utqfn v101a1cn-1 21-0028
max13046e/max13047e single- and dual-bidirectional low-level translator maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 5/08 initial release ? 18/08 removing future product asterisks from max13047, changing electrical characteristics table, packaging changes, changing esd information 1?, 6, 10

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