seiko epson corporation 1 pf760-03 E0C6S37 4-bit single chip microcomputer low voltage operation products n description the E0C6S37 is an advanced single-chip cmos 4-bit microcomputer consisting of the e0c6200a cmos 4-bit core cpu. it also contains the rom, ram, lcd driver circuit, time base counter and stopwatch counter. the E0C6S37 provides an excellent solution for low-power consumption systems with clock functions. n features l cmos lsi 4-bit parallel processing l clock ..................................................... 32.768khz (typ.) cr or crystal oscillation circuit selectable through mask option l instruction set ........................................ 100 instructions l instruction execution time ..................... 153 m sec, 214 m sec or 366 m sec (depending on instruction) l rom capacity ....................................... 1,024 words 12 bits l ram capacity ........................................ 80 words 4 bits l input port ............................................... 4 bits (pull-down resistors are available by mask option) l output port ............................................ 4 bits (general purpose port) 2 bits (for buzzer output) : bz/bz 4khz, 2khz 1 bit (for clock output) : 16khz, 8khz, 4khz, 2khz l i/o port .................................................. 4 bits l lcd driver ............................................. 26 segments 2 commons (1/2 duty), 3 commons (1/3 duty) or 4 commons (1/4 duty) l built-in supply voltage detection (svd) circuit l built-in stopwatch timer l interrupts ............................................... external : input interrupt 1 line internal : timer interrupt 1 line stopwatch interrupt 1 line l supply voltage ...................................... 1.5v/3.0v (minimum operating voltage: 0.9v/1.8v) l current consumption ............................ halt mode (32.768khz/3.0v) : 1.0 m a (typ.) operating mode (32.768khz/3.0v) : 2.5 m a (typ.) l package ................................................ qfp6-60pin (plastic) die form n line up l core cpu architecture l svd circuit / comparator l super low operating voltage (0.9v) l high quality display lcd driver model supply voltage 1.5v (0.9 to 2.0v) 3.0v (1.8 to 3.6v) 3.0v (0.9 to 3.6v) e0c6sl37 E0C6S37 e0c6sb37 clock (oscillation) 32.768khz crystal or 65khz cr oscillation (typ.) 32.768khz crystal or 65khz cr oscillation (typ.) 32.768khz crystal or 65khz cr oscillation (typ.)
2 E0C6S37 n block diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 osc1 osc2 n.c. v s1 n.c. ca cb n.c. n.c. n.c. v l1 v l2 v l3 com0 com1 pin no. pin name 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 com2 com3 seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 pin no. pin name 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 test seg13 seg14 seg15 seg16 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 p00 pin no. pin name 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 n.c. : no connection p01 p02 p03 reset k00 k01 k02 k03 r00 r01 r02 r03 n.c. v ss v dd pin no. pin name qfp6-60pin n pin configuration k00?03 test p00?03 r00?03 osc1 osc2 reset interrupt generator input port test port i/o port output port clock timer stopwatch timer ram 80 words x 4 bits lcd driver power controller fout & buzzer svd core cpu e0c6200a system reset control rom 1,024 words x 12 bits osc com0 ?om3 seg0 ?eg25 v dd v l1 ? l3 ca, cb v s1 v ss 31 45 16 30 index 15 1 60 46 E0C6S37
3 E0C6S37 n pin description pin name v dd v ss v s1 v l1 v l2 v l3 ca, cb osc1 osc2 k00?03 p00?03 r00?03 seg0?eg25 com0?om3 reset test pin no. 60 59 4 11 12 13 6, 7 1 2 50?3 45?8 54?7 18?0, 32?4 14?7 49 31 (i) (i) o o o o i o i i/o o o o i i function power supply pin (+) power supply pin (? oscillation and internal logic system regulated voltage output pin lcd system regulated voltage output pin (-1.05v) lcd system booster voltage output pin (v l1 2) lcd system booster voltage output pin (v l1 3) voltage booster capacitor connecting pin crystal oscillation input pin crystal oscillation output pin input port pin i/o port pin output port pin lcd segment output pin lcd common output pin initial reset input pin testing input pin i/o note: the above table is simply an example, and is not guaranteed to work. ca cb v l1 v l2 v l3 v dd osc1 osc2 v s1 reset test v ss c 1 c 2 c 3 c 4 c g x'tal 1.5v or 3.0v piezo buzzer r01 r00 k00 k03 p00 p03 r02 r03 i i/o o seg0 seg25 com3 com0 lcd panel E0C6S37 e0c6sl37 e0c6sb37 cp c 5 r cr x'tal c g c 1 ? 5 cp r cr crystal oscillator trimmer capacitor capacitor capacitor cr oscillating resistor 32.768khz, ci(max.)=35k w 5 to 25pf 0.1 f 3.3 f 470k w (65khz typ.) n basic external connection diagram
4 E0C6S37 n electrical characteristics rating supply voltage input voltage (1) input voltage (2) permissible total output current * 1 operating temperature storage temperature soldering temperature / time permissible dissipation * 2 * 1: * 2: the permissible total output current is the sum total of the current (average current) that simultaneously flows from the outpu t pins (or is draw in). in case of plastic package (qfp6-60pin). symbol v ss v i v iosc s i vss topr tstg tsol p d value -5.0 to 0.5 v ss - 0.3 to 0.5 v ss - 0.3 to 0.5 10 -20 to 70 -65 to 150 260?, 10sec (lead section) 250 unit v v v ma ? ? mw (v dd =0v) l absolute maximum ratings l recommended operating conditions E0C6S37 condition supply voltage oscillation frequency booster capacitor capacitor between v dd and v l1 capacitor between v dd and v l2 capacitor between v dd and v l3 capacitor between v dd and v s1 symbol v ss f osc1 f osc2 c1 c2 c3 c4 c5 remark v dd =0v crystal oscillation cr oscillation, r=470k w unit v khz khz f f f f f (ta=-20 to 70 c) max. -1.8 80 typ. -3.0 32.768 65 min. -3.6 50 0.1 0.1 0.1 0.1 0.1 condition supply voltage oscillation frequency booster capacitor capacitor between v dd and v l1 capacitor between v dd and v l2 capacitor between v dd and v l3 capacitor between v dd and v s1 * 1: * 2: * 3: when the heavy load protection mode is set by software and the svd circuit is turned off. cannot be operated when the cr oscillation circuit is used. the voltage which can be displayed on the lcd panel will differ according to the characteristics of the lcd panel. when there is no software control during cr oscillation or crystal oscillation. symbol v ss f osc1 f osc2 c1 c2 c3 c4 c5 remark v dd =0v * 3 v dd =0v, with software control * 1 crystal oscillation cr oscillation, r=470k w unit v v khz khz f f f f f (ta=-20 to 70 c) max. -1.1 -0.9 * 2 80 typ. -1.5 -1.5 32.768 65 min. -3.6 -3.6 50 0.1 0.1 0.1 0.1 0.1 e0c6sb37 condition supply voltage oscillation frequency booster capacitor capacitor between v dd and v l1 capacitor between v dd and v l2 capacitor between v dd and v l3 capacitor between v dd and v s1 * 1: * 2: * 3: when the heavy load protection mode is set by software and the svd circuit is turned off. cannot be operated when the cr oscillation circuit is used. the voltage which can be displayed on the lcd panel will differ according to the characteristics of the lcd panel. when there is no software control during cr oscillation or crystal oscillation. symbol v ss f osc1 f osc2 c1 c2 c3 c4 c5 remark v dd =0v * 3 v dd =0v, with software control * 1 crystal oscillation cr oscillation, r=470k w unit v v khz khz f f f f f (ta=-20 to 70 c) max. -1.1 -0.9 * 2 80 typ. -1.5 -1.5 32.768 65 min. -2.0 -2.0 50 0.1 0.1 0.1 0.1 0.1 e0c6sl37
5 E0C6S37 l dc characteristics E0C6S37/6sb37 unit v v v v a a a a ma ma ma ma a a a a a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =32.768khz, ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 0 0 0.8? ss 0.85? ss 0.5 40 100 0 -1.0 -1.0 -3 -3 -300 typ. min. 0.2? ss 0.15? ss v ss v ss 0 10 30 -0.5 3.0 3.0 3 3 300 characteristic high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) high level input current (1) high level input current (2) high level input current (3) low level input current high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (during lcd output) segment output current (during dc output) symbol v ih1 v ih2 v il1 v il2 i ih1 i ih2 i ih3 i il i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 i oh5 i ol5 v ih1 =0v, no pull down resistor v ih2 =0v, with pull down resistor v ih3 =0v, with pull down resistor v il =v ss v oh1 =0.1? ss v oh2 =0.1? ss (built-in protection resistance) v ol1 =0.9? ss v ol2 =0.9? ss (built-in protection resistance) v oh3 =-0.05v v ol3 =v l3 +0.05v v oh4 =-0.05v v ol4 =v l3 +0.05v v oh5 =0.1? ss v ol5 =0.9? ss condition k00?03, p00?03 reset k00?03, p00?03 reset k00?03, p00?03 k00?03 p00?03 reset k00?03, p00?03 reset, test r02, r03, p00?03 r00, r01 r02, r03, p00?03 r00, r01 com0?om3 seg0?eg25 seg0?eg25 unit v v v v a a a a a a a a a a a a a a (unless otherwise specified: v dd =0v, v ss =-1.5v, f osc =32.768khz, ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 0 0 0.8? ss 0.85? ss 0.5 20 100 0 -200 -200 -3 -3 -100 typ. min. 0.2? ss 0.15? ss v ss v ss 0 5.0 9.0 -0.5 700 700 3 3 130 characteristic high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) high level input current (1) high level input current (2) high level input current (3) low level input current high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (during lcd output) segment output current (during dc output) symbol v ih1 v ih2 v il1 v il2 i ih1 i ih2 i ih3 i il i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 i oh5 i ol5 v ih1 =0v, no pull down resistor v ih2 =0v, with pull down resistor v ih3 =0v, with pull down resistor v il =v ss v oh1 =0.1? ss v oh2 =0.1? ss (built-in protection resistance) v ol1 =0.9? ss v ol2 =0.9? ss (built-in protection resistance) v oh3 =-0.05v v ol3 =v l3 +0.05v v oh4 =-0.05v v ol4 =v l3 +0.05v v oh5 =0.1? ss v ol5 =0.9? ss condition k00?03, p00?03 reset k00?03, p00?03 reset k00?03, p00?03 k00?03 p00?03 reset k00?03, p00?03 reset, test r02, r03, p00?03 r00, r01 r02, r03, p00?03 r00, r01 com0?om3 seg0?eg25 seg0?eg25 e0c6sl37
6 E0C6S37 l analog circuit characteristics and current consumption * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 1 ?v l2 0.9 2 -1.95 3 ?v l2 0.9 2 -2.25 100 2.5 5.0 typ. -2.10 -2.40 1.0 2.5 min. 1 ?v l2 -0.1 2 -2.25 3 ?v l2 -0.1 2 -2.55 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load E0C6S37 (crystal, heavy load protection mode) E0C6S37 (crystal, normal operating mode) E0C6S37 (cr, normal operating mode) E0C6S37 (cr, heavy load protection mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 1 ?v l2 0.85 2 -1.95 3 ?v l2 0.85 2 -2.25 100 5.5 10.0 typ. -2.10 -2.40 2.0 5.5 min. 1 ?v l2 -0.1 2 -2.25 3 ?v l2 -0.1 2 -2.55 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 1 ?v l2 0.85 2 -1.95 3 ?v l2 0.85 2 -2.25 100 30.0 40.0 typ. -2.10 -2.40 16.0 30.0 min. 1 ?v l2 -0.1 2 -2.25 3 ?v l2 -0.1 2 -2.55 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. 1 ?v l2 0.9 2 -1.95 3 ?v l2 0.9 2 -2.25 100 15.0 20.0 typ. -2.10 -2.40 8.0 15.0 min. 1 ?v l2 -0.1 2 -2.25 3 ?v l2 -0.1 2 -2.55 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load
7 E0C6S37 * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-1.5v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.9 3? l1 0.9 -1.10 100 2.5 5.0 typ. -1.05 -1.20 1.0 2.5 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-1.5v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.85 3? l1 0.85 -1.10 100 5.5 10.0 typ. -1.05 -1.20 2.0 5.5 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load e0c6sl37 (crystal, normal operating mode) e0c6sl37 (crystal, heavy load protection mode) e0c6sl37 (cr, normal operating mode) e0c6sl37 (cr, heavy load protection mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-1.5v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.9 3? l1 0.9 -1.10 100 15.0 20.0 typ. -1.05 -1.20 8.0 15.0 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-1.5v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.85 3? l1 0.85 -1.10 100 30.0 40.0 typ. -1.05 -1.20 16.0 30.0 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load
8 E0C6S37 e0c6sb37 (crystal, normal operating mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.9 3? l1 0.9 -1.10 100 2.5 5.0 typ. -1.05 -1.20 1.0 2.5 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load e0c6sb37 (cr, heavy load protection mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.85 3? l1 0.85 -1.10 100 30.0 40.0 typ. -1.05 -1.20 16.0 30.0 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load e0c6sb37 (cr, normal operating mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =65khz, r cr =470k w , ta=25 c, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.9 3? l1 0.9 -1.10 100 15.0 20.0 typ. -1.05 -1.20 8.0 15.0 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load e0c6sb37 (crystal, heavy load protection mode) * 1: the svd circuit is turned off. unit v v v v s a a (unless otherwise specified: v dd =0v, v ss =-3.0v, f osc =32.768khz, ta=25 c, c g =25pf, v s1 /v l1 ? l3 are internal voltage , c1?5=0.1 f) max. -0.95 2? l1 0.85 3? l1 0.85 -1.10 100 5.5 10.0 typ. -1.05 -1.20 2.0 5.5 min. -1.15 2? l1 -0.1 3? l1 -0.1 -1.30 characteristic internal voltage svd voltage svd circuit response time current consumption symbol v l1 v l2 v l3 v svd t svd i op condition connect 1m w load resistor between v dd and v l1 (without panel load) connect 1m w load resistor between v dd and v l2 (without panel load) connect 1m w load resistor between v dd and v l3 (without panel load) during halt during execution * 1 without panel load
9 E0C6S37 l oscillation characteristics the oscillation characteristics change depending on the conditions (components used, board pattern, etc.). use the follow- ing characteristics as reference values. E0C6S37 (crystal) unit v v pf ppm ppm ppm v m w (unless otherwise specified: v dd =0v, v ss =-3.0v, crystal: c-002r (c i =35k w ), c g =25pf, c d =built-in, ta=25 c) max. 5 10 -3.6 typ. 20 min. -1.8 -1.8 -10 40 200 characteristic oscillation start voltage oscillation stop voltage built-in capacitance (drain) frequency/voltage deviation frequency/ic deviation frequency adjustment range harmonic oscillation start voltage permitted leak resistance symbol vsta vstp c d ? f/ ? v ? f/ ? ic ? f/ ? c g v hho r leak condition t sta 5sec t stp 10sec including the parasitic capacity inside the ic v ss =-1.8 to -3.6v c g =5 to 25pf c g =5pf between osc1 and v dd (v ss ) (v ss ) (v ss ) * 1: items enclosed in parentheses ( ) are those used when operating at heavy load protection mode. unit v v pf ppm ppm ppm v m w (unless otherwise specified: v dd =0v, v ss =-1.5v, crystal: c-002r (c i =35k w ), c g =25pf, c d =built-in, ta=25 c) max. 5 10 -2.0 typ. 20 min. -1.1 -1.1(-0.9) * 1 -10 40 200 characteristic oscillation start voltage oscillation stop voltage built-in capacitance (drain) frequency/voltage deviation frequency/ic deviation frequency adjustment range harmonic oscillation start voltage permitted leak resistance symbol vsta vstp c d ? f/ ? v ? f/ ? ic ? f/ ? c g v hho r leak condition t sta 5sec t stp 10sec including the parasitic capacity inside the ic v ss =-1.1 to -2.0v (-0.9) * 1 c g =5 to 25pf c g =5pf between osc1 and v dd (v ss ) (v ss ) (v ss ) e0c6sl37 (crystal) * 1: items enclosed in parentheses ( ) are those used when operating at heavy load protection mode. unit v v pf ppm ppm ppm v m w (unless otherwise specified: v dd =0v, v ss =-3.0v, crystal: c-002r (c i =35k w ), c g =25pf, c d =built-in, ta=25 c) max. 5 10 -3.6 typ. 20 min. -1.1 -1.1(-0.9) * 1 -10 40 200 characteristic oscillation start voltage oscillation stop voltage built-in capacitance (drain) frequency/voltage deviation frequency/ic deviation frequency adjustment range harmonic oscillation start voltage permitted leak resistance symbol vsta vstp c d ? f/ ? v ? f/ ? ic ? f/ ? c g v hho r leak condition t sta 5sec t stp 10sec including the parasitic capacity inside the ic v ss =-1.1 to -3.6v (-0.9) * 1 c g =5 to 25pf c g =5pf between osc1 and v dd (v ss ) (v ss ) (v ss ) e0c6sb37 (crystal) E0C6S37 (cr) unit % v ms v (unless otherwise specified: v dd =0v, v ss =-3.0v, r cr =470k w , ta=25?) max. 20 typ. 65khz 3 min. -20 -1.8 -1.8 characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc vsta t sta vstp condition v ss =-1.8 to -3.6v (v ss ) (v ss ) unit % v ms v (unless otherwise specified: v dd =0v, v ss =-1.5v, r cr =470k w , ta=25?) max. 20 typ. 65khz 3 min. -20 -1.1 -1.1 characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc vsta t sta vstp condition v ss =-1.1 to -2.0v (v ss ) (v ss ) e0c6sl37 (cr) unit % v ms v (unless otherwise specified: v dd =0v, v ss =-3.0v, r cr =470k w , ta=25?) max. 20 typ. 65khz 3 min. -20 -1.1 -1.1 characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc vsta t sta vstp condition v ss =-1.1 to -3.6v (v ss ) (v ss ) e0c6sb37 (cr)
E0C6S37 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is n o representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to an y intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accord ance with this material will be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade control law of japan and may require an export license from the ministry of international trade and industry or other approval from another government agency. ? seiko epson corporation 1999 all right reserved. seiko epson corporation electronic devices marketing division ic marketing & engineering group ed international marketing department i (europe & u.s.a.) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5812 fax : 042-587-5564 ed international marketing department ii (asia) 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5814 fax : 042-587-5110 n package dimensions plastic qfp6-60pin 14 0.2 17.6 0.4 31 45 14 0.2 17.6 0.4 16 30 index 0.35 0.1 15 1 60 46 2.7 0.1 0.1 3.1 max 1.8 0.85 0.2 0 10 0.15 0.05 0.8 unit: mm
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