features highly integrated pa/attenuator and t/r switch low current consumption: 120 ma typ. switch and attenuator controls cmos compatible high power (140 mw) and low power (16 mw) transmit power control +5 v/-5 v fixed supply voltages description m/a-com? am55-0001 is a gaas power ampli?r with integrated transmit/receive and an antenna diversity switch in a low cost ssop 24 plastic package. the am55-0001 employs active bias circuits that eliminate the need for external bias adjustment. a ?leep mode?is incorporated which turns off current draw from the positive supply of the pa during receive mode. the am55-0001 provides a 10-db step attenuator for use as a transmit power controller. the am55-0001 is designed for low power consumption and is ideally suited for fsk systems in the 2.4 - 2.5 ghz bands (north american ism, japanese rcr.32 and european etsi). typical applications include wlan and wireless portable data collection. this ampli?r is also available without diversity switching (am55-0007). either power amplifier can be combined with a transceiver ic (md58-0001) to form a complete rf front end. m/a-com's am55-0001 is fabricated using a mature 0.5-micron gate length gaas process. the process features full passivation for increased performance and reliability. speci?ations subject to change without notice v 2 . 2 0 1 1 4 0 m w p o wer ampli?r with t / r and dive r sity swit c hes 2 . 4 - 2.5 g h z am55-0001 ssop-24 prelimina r y speci?ations parameter test conditions units min. typ. max. power ampli?r linear gain high power mode db 2 2 26.5 low power mode db 1 1 16 vswr in/out both modes 1.5:1 output power p in = -3 dbm high power mode dbm 1 8 21.5 low power mode dbm 8 1 2 second harmonic p in = -3 dbm high power mode dbc -25 third harmonic dbc -17 i dd (v dd1 + v dd2 + v dd pa) ma 120 200 t/r and diversity switches insertion loss db 1.2 isolation db 10 15 vswr in/out 1.5:1 t ypical electrical speci?ations test conditions: frequency: 2.45 ghz , v dd = 5 v 5%, v gg = - 5 v 5%, t a = +25? l l l l l pin 1 .004(0,10) .23 6 .008 5,9 9 0,2 .0275 +.0025 -.0025 0,7 +0,06 -0,06 .340 +.0037 -.0041 8,64 +0,09 -0,1 .025 0,64 .010 +.004 -.001 0,25 +0,1 -0,03 .05 7 .003 1,4 5 0,08 .00 7 .003 0,1 8 0,08 .015(0,38) x 45 -0,01 .028 +.022 -.013 0,71 +0,56 -0,33 0-8 .008 +.0018 -.0005 0,2 +0,05 .1540 +.0034 -.0043 3,91 +0,09 -0,11 part number description am55-0001 ssop 24-lead plastic package am55-0001tr forward tape & reel * AM55-0001RTR reverse tape & reel * am55-0001smb designer? kit o r dering in f ormation * if speci? reel size is required, consult factory for part number assignment. dimensions are in inches over millemeters.
pin no. pin name description 1v gg negative voltage to all active bias networks 2 t/r ctrl 0 v for transmit mode, +5 v for receive mode 3 rx out output of t/r switch for receive mode 4 gnd dc and rf ground 5 pa out output of t/r switch for transmit mode 6v dd pa v dd for output stage of pa, v dd for active bias circuit of output stage 7 gnd dc and rf ground 8 attn ctrl 0 v for high power mode, +5 v for low power mode 9 gnd dc and rf ground 10 ant commo n common port of diversity switch 11 gnd dc and rf ground 12 ant 2 output #2 of diversity switch 13 ant 1 output #1 of diversity switch 14 gnd dc and rf ground 15 ant ctrl 0 v for ant common to ant 1, +5 v for ant common to ant 2 16 gnd dc and rf ground 17 v dd2 v dd for both diversity and t/r switches, v dd for second stage of pa 18 gnd dc and rf ground 19 v dd1 v dd for ?st stage of pa, v dd of active bias for the ?st and second stage of pa 20 gnd dc and rf ground 21 gnd dc and rf ground 22 pa in rf input to pa 23 gnd dc and rf ground 24 sleep ctrl 0 v pa "on" mode, -5 v pa "sleep" mode. sleep mode shuts off active bias and "pinches off" all pa fets. 1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am5 5 - 0001 speci?ations subject to change without notic e v 2.00 2 pin con?uration functional diagram and pin con?uration absolute maxi m um ratings 1 parameter absolute maximum max. input power 2 +23 dbm operating voltages 2,3 v dd = 8 v v gg = -8 v operating temperature -40? to +85? storage temperature -65? to + 1 50? 1. exceeding these limits may cause permanent damage. 2. ambient temperature ( t a ) = +25? 3 . | v dd | + | v gg | not to exceed 12 volts. t ruth t able control line ant att n t/r sleep operating ctrl ctrl ctrl ctrl * mode x x 1 -5 v receive x 0 0 0 v high power x 1 0 0 v low power x x 1 -5 v sleep mode 0 x x x ant 1 1 x x x ant 2 x - don? care ??= 0 v to 0.2 v @ 100 ? ??= v dd to v dd -0.2 v @ 200 ? t/r ctrl gnd pa out gnd ant common ant 2 gnd v gg gnd rx out gnd gnd sleep ctrl gnd gnd 1 24 12 13 dd v pa attn ctrl ant 1 ant ctrl gnd dd2 v dd1 v pa in gnd * control voltage levels between 0 v and v gg must be used on sleep ctrl control line. (pin 24)
1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am55-0001 speci?ations subject to change without notic e v 2.00 3 small signal p o wer ampli?r 1 t/r switch small signal p er f ormance 1 return loss frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 0 -5 -10 -15 -20 return loss (db) frequency (ghz) linear gain v s v dd , v gg frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 28 26 24 22 20 18 gain (db) input match frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 0 -5 -10 -15 -20 -25 -30 return loss (db) output match 2.0 2.2 2.4 2.6 2.8 3.0 0 -4 -8 -12 -16 return loss (db) -20? +70? +25? input output -20? +70? +25? 6.0 v 4.0 v linear gain frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 30 26 22 18 14 gain (db) -20? +70? +25? 1. unless otherwise noted, frequency: 2.45 ghz , v dd = 5 v 5%, v gg = - 5 v 5%, t a = +25? insertion loss & isolation frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 0 -1 -2 -3 -4 -5 insertion loss (db) 0 -5 -10 -15 -20 -25 isolation (db)
1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am5 5 - 0001 speci?ations subject to change without notic e v 2.00 4 dive r sity switch small signal p er f ormance 1 p o wer ampli?r p o wer p er f ormance 1 current draw an d power added efficiency p in (db) p in (dbm) -1.5 -12 -9 -6 -3 0 160 140 120 100 80 60 25 20 15 10 5 0 pae (%) current (ma) -20? -20? +70? +25? +70? +25? p out vs v dd , v gg -15 -11 -7 -3 1 24 22 20 18 16 14 12 10 p out (dbm) 4.0 v 5.5 v 4.5 v 5.0 v 6.0 v 2. measured with an rf input power of -3 dbm at pa in. output measured at ant 1 and ant 2 with pa out and ant common terminated in 50 . harmonic leakage a t ant 1 & ant 2 2 frequency (ghz) 2.4 2.42 2.44 2.46 2.48 2.50 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 power (dbm) return loss frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 0 -5 -10 -15 -20 return loss (db) 3rd harmonic 2nd harmonic input output 1. unless otherwise noted, frequency: 2.45 ghz , v dd = 5 v 5%, v gg = - 5 v 5%, t a = +25? p in (dbm) p out vs p in -15 -12 -9 -6 -3 0 24 22 20 18 16 14 12 10 0 -1 -2 -3 -4 -5 -6 -7 p out (dbm) compression(db) -20? compression +70? +25? 0 -5 -10 -15 -20 -25 isolation (db) insertion loss & isolation frequency (ghz) 2.0 2.2 2.4 2.6 2.8 3.0 0 -1 -2 -3 -4 -5 insertion loss (db)
pin 1 c 1 c5 c4 c8 c 3 c7 c2 c6 c9 0.710 in. 0.550 in. 1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am55-0001 speci?ations subject to change without notice v 2.00 5 label value purpose c1 - c4 33 pf bypass (ghz) c5 - c8 1000 pf bypass (mhz) c9 0.01 ? bypass (khz) recommended pcb con?uration layout view cross-section view external ci r cuitry p a r ts list external ci r cuitry all off-chip components are low-cost surface mount components obtainable from multiple sources. (0.020 in. x 0.040 in. or 0.030 in. x 0.050 in.) ant common pa out ant 2 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 attn ctrl v dd2 c6 c2 c9 dd v pa c1 c5 g g v t/r ctrl rx out ant 1 ant ctrl c3 c7 c4 c8 pa in sleep ctrl v dd1 the pcb dielectric between rf traces and rf ground layers should be chosen to reduce rf discontinuities between 50 - lines and package pins. m/a-com recommends an fr-4 dielectric thickness of 0.008 in. (0.2 mm), yielding a 50 - line width of 0.015 in. (0.38 mm). the recommended metalization thickness is 1 oz. copper. shaded traces are vias to dc routing layer and traces on dc routing layer. biasing p r ocedure the am55-0001 requires the v gg bias be applied prior t o an y v dd bias. permanent damage may occur if this procedure is not followed. all fets in the pa will draw excessive current and damage internal circuitry. rf traces + components rf ground dc routing customer defined
pcb dc function device pi n pcb dc function device pin connector number connector number 1v dd1 (+ 5 v) 19 11 logic high (v dd1 ) 1 9 2v dd2 (+ 5 v) 17 12 t/r control (0 v/+5 v) 2 3 logic low (gnd) n/c 13 logic low (gnd) n/c 4 ant control (0 v/+5 v) 15 14 t/r control (0 v/+5 v) 2 5 logic high (v dd1 ) 1 9 1 5 logic high (v dd1 ) 1 9 6 ant control (0 v/+5 v) 15 16 attn control (0 v/+5 v) 8 7 negative logic high (gnd) n/c 17 logic low (gnd) n/c 8 pa control (0 v/-5 v) 24 18 attn control (0 v/+5 v) 8 9 negative logic low (v gg ) 1 19 v dd pa (+5 v) 6 10 pa control (0 v/-5 v) 24 20 v gg ( - 5 v) 1 1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am5 5 - 0001 speci?ations subject to change without notic e v 2.00 6 the am55-0001smb designer's kit allows for immediate evaluation of m/a-com's am55-0001 integrated power ampli?r with t/r and diversity switch. the evaluation board consists of an am55-0001, recommended external surface mount circuitry, rf connectors and a dc multi-pin connector, all mounted to a multi-layer fr-4 pcb. other items included in the designer's kit: a ?ppy disk (with typical performance data and a .dxf ?e of the recommended pcb layout) and any additional application notes. the am55-0001smb evaluation pcb and block diagram are illustrated below with all functional ports labeled. designer s kit (am55-0001smb) p/a switch sample boa r d functional blo c k diagram pa out rx out (to rec) pa in ant common (ant in) ant 2 ant 1 dc connector pinout attn pa ctl tr ctl ant pa in to rec. pa out ant in ant 2 ant 1
1 4 0 mw p o wer ampli?r with t/r and dive r sity swit c hes am55-0001 speci?ations subject to change without notice v 2.00 7 port reference approximate loss (db) pa in 0.25 pa out 0.25 rx out (to rec) 0.25 ant commo n (ant in) 0.25 ant1 0.30 ant2 0.30 pcb dc connector j umper settings e v aluation pcb and rf connector losses the dc connector on the designer? kit pcb allows selection of all the device? operating modes. it is accomplished by one or more of the following methods: 1 . a mating female multi-pin connector (newark electronics stock # 46f-4658, not included) 2 . wires soldered to the necessary pins (not included) 3 . clip leads (not included) 4 . a combination of clip leads or wires and jumpers (jumpers included as required) jumper 1 (diversity switch control) position 1 = ant common to ant 2 insertion loss position 2 = ant common to ant 1 insertion loss jumper 2 (pa sleep control) position 1 = pa on position 2 = pa sleep mode jumper 3 (t/r switch control) position 1 = receive mode position 2 = transmit mode jumper 4 (attenuator control) position 1 = attenuator on (low power transmit) position 2 = attenuator off (high power transmit) in order to prevent transients which may damage the mmic, please adhere to the following procedure. turn on all power supplies and set all voltages to 0 volts before connecting the power supplies to the dc connector. set jumpers for desired test mode. apply a -5.0 volt supply to dc connector pin 20 (v gg ). apply a +5.0 volt supply to the dc connector pin 1 (v dd1 ). apply a +5.0 volt supply to the dc connector pin 2 (v dd2 ). apply a +5.0 volt supply to the dc connector pin 19 (v dd pa). adjust v gg supply to -5 volts. adjust all v dd supplies to +5 volts. hot switching of jumpers will not damage device. to power off, reverse above procedure. 1 . set v dd1 & v dd2 & v dd pa to 0 volts. 2 . set v gg to 0 volts. 3 . disconnect bias lines from dc connector. 4 . turn off power supplies. am55-0001smb biasing p r ocedure pin 19 pin 1 pin 20 pin 2 pin 19 pin 1 pin 20 pin 2 jumper 1 jumper 2 jumper 3 jumper 1 jumper 2 jumper 3 jumpers (position 1) jumpers (position 2) jumper 4 jumper 4
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