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general description the max5959/MAX5960 quad hot-plug controllers are designed for pci express (pcie) applications. these devices provide hot-plug control for the main 12v, 3.3v, and 3.3v auxiliary supplies of four pcie slots. the max5959/MAX5960s?logic inputs/outputs allow interfac- ing directly with the system hot-plug management con- troller or through an smbus with an external i/o expander such as the max7313. an integrated debounced attention switch and present-detect signals simplify system design. the max5959/MAX5960 drive eight external n-channel mosfets to control the 12v and 3.3v main outputs. the 3.3v auxiliary outputs are controlled through 0.2 n-chan- nel mosfets. internal charge pumps provide the gate drive for the 12v outputs while the gate drive of the 3.3v output is driven by the 12v input supply clamped to 5.5v above the respective 3.3v main supply rail. the 3.3v aux- iliary outputs are completely independent from the main outputs with their own charge pumps. at power-up, the max5959/MAX5960 keep all the mosfets off until the supplies rise above their respective undervoltage lockout (uvlo) thresholds. upon a turn-on command, the max5959/MAX5960 enhance the external and internal mosfets slowly with a constant gate current to limit the power-supply inrush current. the max5959/MAX5960 actively limit the current to pro- tect all outputs at all times and shut down if an overcur- rent condition persists longer than the programmable overcurrent timeout. after an overcurrent or overtempera- ture fault condition, the max5959l/MAX5960l latch off while the max5959a/MAX5960a automatically restart after a restart time delay. the max5959/MAX5960 are offered in latch-off or autorestart versions (see the selector guide ). the max5959/MAX5960 are available in an 80-pin tqfp package and operate over the -40? to +85? tempera- ture range. applications servers desktop mobile server platforms workstations features ? pcie compliant ? hot swap 12v, 3.3v, and 3.3v auxiliary for 4 pcie slots ? integrated power mosfets for auxiliary supply rails ? controls di/dt and dv/dt ? active current limiting protects against overcurrent/short-circuit conditions ? programmable current-limit timeout ? pwrgd signal outputs with programmable power-on reset (por) (160ms default) ? latched fault signal output after overcurrent or overtemperature fault ? attention switch inputs/outputs with 4ms debounce ? present-detect inputs ? force-on inputs facilitate testing/debug ? thermal shutdown ? allow control through smbus with an i/o expander max5959/MAX5960 quad pci express, hot-plug controllers ________________________________________________________________ maxim integrated products 1 part temp range pin- package pkg code max5959 aecs+ -40? to +85? 80 tqfp c80-1 max5959lecs+ -40? to +85? 80 tqfp c80-1 MAX5960 aecs+ -40? to +85? 80 tqfp c80-1 MAX5960lecs+ -40? to +85? 80 tqfp c80-1 part latch off autorestart guaranteed aux current (ma) max5959aecs+ 375 max5959lecs+ 375 MAX5960aecs+ 550 MAX5960lecs+ 550 selector guide ordering information 19-0856; rev 0; 7/07 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. + denotes a lead-free package. pin configuration and typical application circuit appear at end of data sheet. evaluation kit available pci express is a registered trademark of pci-sig corp. smbus is a trademark of intel corp.
max5959/MAX5960 quad pci express, hot-plug controllers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v 12vin = v 12s_+ = v 12s_- = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd_ = fault_ = poradj = tim = output_ = 12g_ = 3.3g_ = open, input_ = pres-det_ = pgnd = gnd, t a = t j = -40? to +85?, unless otherwise noted. typical values are at t a = t j = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd, unless otherwise noted.) 12vin......................................................................-0.3v to +14v 12g_ ..........................................................-0.3v to (v 12vin + 6v) 12s_+, 12s_-, 3.3g_ ..............................-0.3v to (v 12vin + 0.3v) 3.3vauxin, on_, fault_ , pwrgd_ .......................-0.3v to +6v pgnd ....................................................................-0.3v to +0.3v all other pins ..................................-0.3v to (v 3.3vauxin + 0.3v) continuous power dissipation (t a = +70?) 80-pin tqfp (derate 23.3mw/? above +70?).........1860mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units 12v supply (main) 12v supply input-voltage range v 12vin 10.8 12 13.2 v v 12vin rising 9.5 10 10.5 12v undervoltage lockout v 12uvlo hysteresis 0.1 v 12v undervoltage lockout deglitch time t deg,uvlo v 12in falling below v 12uvlo to uvlo assertion 30 ? 12v supply current i 12vin v 12vin = 13.2v 1 2.5 ma 12vin control 12vin current-limit threshold (v 12s+ - v 12s- ) v 12ilim 49 54 59 mv 12g_ gate charge current i 12g, chg v 12g_ = gnd 4 5 6 ? normal turn-off, on_ = gnd, v 12g_ = 2v 50 150 250 ? 12g_ gate discharge current i 12g_, dis output short-circuit condition, strong gate pulldown to regulation, (v 12s+ - v 12s- ) 1v, v 12g_ = 5v 60 120 200 ma 12g_ gate high voltage (v 12g_ - v 12vin ) v 12g, h i 12g _ = 1a 4.8 5.3 5.8 v 12g_ threshold voltage for pwrgd_ assertion v pgth12 referred to v 12vin , i 12g_ = 1a (note 2) 3 4 4.8 v 12s_- input bias current 1a 12s_+ input bias current 10 30 ? 3.3v supply (main) 3.3v supply voltage range v 3.3s_+ 3.0 3.3 3.6 v 3.3sa+ rising 2.50 2.65 2.78 v undervoltage lockout (note 3) hysteresis 30 mv
max5959/MAX5960 quad pci express, hot-plug controllers _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units 3.3v control 3.3v current-limit threshold (v 3.3s_+ - v 3.3s_- ) v 3.3ilim 17 20 23 mv 3.3g_ gate charge current i 3.3g_ , chg v 3.3g_ = gnd 4 5 6 ? normal turn-off, on_ = gnd, v 3.3g_ = 2v 50 150 250 ? 3.3g_ gate discharge current i 3.3g_, dis output short-circuit condition, strong gate pulldown to regulation, v 3.3s _+ - v 3.3s_- 1v, v 3.3g_ = 5v 90 150 250 ma 3.3g_ gate high voltage (v 3.3g_ - v 3.3s_+ ) v 3.3g_h i source = 1a 4.5 5.5 6.8 v 3.3g_ threshold voltage for pwrgd_ assertion v pgth3.3 referred to v 3.3auxin , i 3.3g_ = 1a (note 2) 3 4 4.5 v 3.3s_- input bias current 1a 3.3s_+ input bias current 20 60 ? 3.3v auxiliary supply 3.3vauxin supply input voltage range v 3.3auxin 3.0 3.3 3.6 v v 3.3vauxin rising 2.50 2.65 2.78 v 3.3vauxin undervoltage lockout v 3.3vauxuvlo hysteresis 30 mv 3.3vauxin supply current v 3.3vauxin = 3.6v 2.5 5 ma i 3.3vauxo_ = 550ma (MAX5960) 280 3.3vauxin to 3.3vauxo_ maximum dropout i 3.3vauxo_ = 375ma (max5959) 225 mv max5959 376 450 564 3.3vauxo_ current-limit threshold 3.3vauxo_ shorted to gnd MAX5960 560 700 850 ma 3.3vauxo_ threshold for pwrgd_ assertion (v3.3vauxin - v3.3vauxo_) v pgth3.3aux (note 2) 400 mv logic signals rising edge 1.0 2.0 v input-logic threshold (on_, fon_ , auxon_, pres-det_ , input_) hysteresis 25 mv input bias current (on_, auxon_, input_) 1a fon_ , pres-det_ internal 25 50 75 k on_, auxon_ high-to-low deglitch time 4s electrical characteristics (continued) (v 12vin = v 12s_+ = v 12s_- = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd_ = fault_ = poradj = tim = output_ = 12g_ = 3.3g_ = open, input_ = pres-det_ = pgnd = gnd, t a = t j = -40? to +85?, unless otherwise noted. typical values are at t a = t j = +25?.) (note 1)
max5959/MAX5960 quad pci express, hot-plug controllers 4 _______________________________________________________________________________________ electrical characteristics (continued) (v 12vin = v 12s_+ = v 12s_- = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd_ = fault_ = poradj = tim = output_ = 12g_ = 3.3g_ = open, input_ = pres-det_ = pgnd = gnd, t a = t j = -40? to +85?, unless otherwise noted. typical values are at t a = t j = +25?.) (note 1) parameter symbol conditions min typ max units pres-det_ high-to-low deglitch time t deg 357ms v poradj = gnd 1 s poradj = unconnected 90 160 250 r poradj = 20k 35 55 75 r poradj = 100k 145 265 380 pwrgd_ power-on reset deglitch time (note 2) t por_hl r poradj = 200k 530 ms pwrgd_ low-to-high deglitch time t por_lh 4s i sink = 2ma 0.1 pwrgd_ , fault_ output low voltage i sink = 30ma 0.8 v pwrgd_ , fault_ output high leakage current pwrgd_ , fault_ = 5.5v 1 a tim = open 5.5 11 17 r tim = 15k 1.4 2.6 3.8 r tim = 120k 12 22 32 fault_ timeout t fault r tim = 300k 53 ms fault_ timeout during startup t su 2 x t fault ms autorestart delay time t restart 64 x t fault ms fault reset minimum pulse width t reset (note 4) 100 ? thermal shutdown threshold t sd t j rising 150 thermal shutdown hysteresis 20 ? out_ debounce time t dbc 2.6 4.4 6.2 ms out_ voltage high i source = 2ma v 3.3auxin - 0.3 v 3.3auxin v note 1: all devices are 100% production tested at t a = +25?. limits over temperature are guaranteed by design. note 2: pwrgd_ asserts a time t por_hl after v pgth12 , v pgth3.3 , and v pgth3.3aux conditions are met. note 3: the uvlo for the 3.3v supply is sensed at 3.3sa+. note 4: this is the time that on_ or auxon_ must stay low when resetting a fault condition.
max5959/MAX5960 quad pci express, hot-plug controllers _______________________________________________________________________________________ 5 12v input supply current vs. temperature max5959 toc01 temperature ( c) 3.3vauxin supply current (ma) 60 35 10 -15 0.92 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 0.90 -40 85 3.3vauxin supply current vs. temperature max5959 toc02 temperature ( c) 3.3vauxin supply current (ma) 60 35 10 -15 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 -40 85 on and auxon low-to-high threshold voltage vs. temperature max5959 toc03 temperature ( c) threshold voltage (v) 60 35 10 -15 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.20 -40 85 on threshold auxon threshold 3.3vauxo_ output voltage vs. output current max5959 toc04 output current (a) output voltage (v) 0.8 0.6 0.4 0.2 0.9 0.7 0.5 0.3 0.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 0 1.0 max5959 MAX5960 12g_ and 3.3g_ gate charge current vs. temperature max5959 toc05 temperature ( c) gate charge current ( a) 60 35 10 -15 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 4.75 -40 85 12g_ 3.3g_ 12g_ and 3.3g_ gate discharge current vs. temperature max5959 toc06 temperature ( c) gate discharge current ( a) 60 35 10 -15 160 165 170 175 180 150 155 -40 85 3.3g_ 12g_ 3.3vaux internal switch maximum dropout vs. temperature max5959 toc07 temperature ( c) dropout voltage (v) 60 35 10 -15 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0 -40 85 i load = 550ma MAX5960 i load = 375ma max5959 12v and 3.3v current-limit threshold voltage vs. temperature max5959 toc08 temperature ( c) 12v and 3.3v main current-limit threshold (mv) 60 35 10 -15 10 20 30 40 50 60 0 -40 85 12v current-limit threshold 3.3v current-limit threshold auxiliary current limit vs. temperature max5959 toc09 temperature ( c) auxiliary current (ma) 60 35 10 -15 0.10 0.30 0.20 0.40 0.50 0.60 0.70 0.80 0.90 1.00 0 -40 85 MAX5960 max5959 typical operating characteristics (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .)
max5959/MAX5960 quad pci express, hot-plug controllers 6 _______________________________________________________________________________________ typical operating characteristics (continued) (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .) 12v undervoltage lockout threshold vs. temperature max5959 toc10 temperature ( c) uvlo threshold (v) 60 35 -15 10 9.85 9.90 9.95 10.00 10.05 10.10 10.15 10.20 9.80 -40 85 3.3vauxon undervoltage lockout threshold vs. temperature max5959 toc11 temperature ( c) uvlo threshold (v) 60 35 10 -15 2.54 2.58 2.62 2.66 2.70 2.52 2.56 2.60 2.64 2.68 2.50 -40 85 12v turn-on/off time max5959 toc12 40ms/div 12v output voltage 12g_ on_ pwrgd_ 10v/div 20v/div 5v/div 5v/div 3.3v turn-on/off time max5959 toc13 40ms/div 3.3v output 5v/div 3.3g_ 10v/div on_ 5v/div pwrgd_ 5v/div 3.3v auxiliary turn-on/off time max5959 toc14 40ms/div 3.3auxo_output voltage 2v/div auxon_ 2v/div pwrgd_ 2v/div turn-on delay 3.3v output and 3.3v auxiliary output max5959 toc15 4ms/div 5v/div 5v/div 5v/div 5v/div 10v/div 3.3vauxo_ output voltage 3.3 output voltage 3.3 input, 3.3vauxin 3.3g_ pwrgd fault condition on 12v main output (autorestart option) max5959 toc16 12g_ 20v/div 0a 0v 0v 0v fault_ 5v/div 12v output current 5a/div 100ms/div 12v output voltage 10v/div t restart r load step to 1.5
max5959/MAX5960 quad pci express, hot-plug controllers _______________________________________________________________________________________ 7 fault condition on 3.3v main output (autorestart option) max5959 toc17 3.3g_ 10v/div fault_ 5v/div 3.3v main output current 2a/div 100ms/div 3.3v output voltage 5v/div t restart r load step to 0.5 0a 0v 0v 0v fault condition on auxiliary output (autorestart option) max5959 toc18 fault_ 2v/div 3.3vauxo_ output current 500ma/div 100ms/div 3.3vauxo_ output voltage 2v/div t restart r load step to 4 0a 0v 0v fault condition on 12v main output (latch-off option) max5959 toc19 12g_ 20v/div fault_ 5v/div 12v output current 5a/div 100ms/div 12v output voltage 10v/div r load step to 1.5 fault condition on 12v output max5959 toc20 12g_ 20v/div fault_ 5v/div 12v output current 5a/div 4ms/div 12v output voltage 10v/div r load step to 1.5 t fault fault condition on 3.3v main output (latch-off option) max5959 toc21 3.3g_ 10v/div fault_ 5v/div 3.3v output current 2a/div 40ms/div 3.3v output voltage 5v/div r load step to 0.5 fault condition on 3.3v main output max5959 toc22 3.3g_ 10v/div fault_ 5v/div 3.3v output current 2a/div 4ms/div 3.3v output voltage 5v/div r load step to 0.5 t fault typical operating characteristics (continued) (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .)
max5959/MAX5960 quad pci express, hot-plug controllers 8 _______________________________________________________________________________________ typical operating characteristics (continued) (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .) fault condition on auxiliary output (latch-off option) max5959 toc23 fault_ 2v/div 3.3vauxo_ output current 500ma/div 100ms/div 3.3vauxo_ output voltage 2v/div r load step to 3.5 MAX5960 fault condition on auxiliary output max5959 toc24 fault_ 2v/div 3.3vauxo_ output current 500ma/div 10ms/div 3.3vauxo_ output voltage 2v/div r load step to 3 t fault MAX5960 short circuit on 12v main output max5959 toc25 12g_ 20v/div fault_ 5v/div 12v output current 5a/div 2ms/div 12v output voltage 10v/div short circuit on 12v main output max5959 toc26 12g_ 20v/div fault_ 5v/div 12v output current 10a/div 4 s/div 12v output voltage 10v/div 0v 0v 0v short circuit on 3.3v main output max5959 toc27 3.3g_ 5v/div fault_ 5v/div 3.3v output current 2a/div 2ms/div 3.3v output voltage 5v/div short circuit on 3.3v main output max5959 toc28 3.3g_ 5v/div fault_ 5v/div 3.3v output current 10a/div 2 s/div 3.3v output voltage 5v/div 0v
max5959/MAX5960 quad pci express, hot-plug controllers _______________________________________________________________________________________ 9 typical operating characteristics (continued) (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .) short circuit on 3.3auxo_ (auxiliary output) max5959 toc29 fault_ 5v/div 3.3vauxo_ output current 500ma/div 2ms/div 3.3vauxo_ output voltage 2v/div MAX5960 short circuit on 3.3vauxo_ (auxiliary output) max5959 toc30 fault_ 5v/div 3.3vauxo_ output current 5a/div 0a 0a 4 s/div 3.3vauxo_ output voltage 2v/div MAX5960 power-up into fault (auxiliary supply) max5959 toc31 3.3vauxo_ output voltage 2v/div fault_ 5v/div 3.3vauxo_ output current 500ma/div 4ms/div auxon_ 5v/div t su r load = 3 MAX5960 power-up into fault (3.3v main) max5959 toc32 4ms/div 3.3v output current fault_ 3.3g_ 3.3v output voltage on_, auxon_ 5a/div 5v/div 5v/div 2v/div 5v/div power-up into fault (12v main output) max5959 toc33 12v output voltage 10v/div fault_ 5v/div 12v output current 5a/div 4ms/div on_, auxon_ 5v/div t su 12g_ 10v/div present-detect (on/off) operation max5959 toc34 40ms/div 12v output voltage pwrgd_ 3.3vauxo_ output voltage pres-det_ 10v/div 5v/div 5v/div 5v/div
max5959/MAX5960 quad pci express, hot-plug controllers 10 ______________________________________________________________________________________ typical operating characteristics (continued) (v 12vin = v 12s_+ = 12v, v 3.3s_+ = v 3.3s_- = v 3.3auxin = v on_ = v auxon_ = v fon_ = 3.3v, pwrgd _= fault_ = poradj = tim = output_ = open, input_ = pres-det_ = pgnd = gnd. see the typical application circuit .) present-detect (on/off) operation max5959 toc35 4ms/div 12v output voltage pwrgd_ 3.3v output voltage pres-det_ 10v/div 5v/div 5v/div 5v/div forced-on (on/off) operation max5959 toc36 40ms/div 12v output voltage pwrgd_ 3.3v auxo_ output voltage fon_ 10v/div 5v/div 5v/div 5v/div forced-on (on/off) operation max5959 toc37 4ms/div 12v output voltage pwrgd_ 3.3v output voltage fon_ 10v/div 5v/div 5v/div 5v/div debounced input/output operation max5959 toc38 input_ 2v/div 10ms/div output_ 2v/div power-on-reset time vs. poradj resistor max5959 toc39 r poradj (k ) t por_hl (ms) 900 800 600 700 200 300 400 500 100 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 0 0 1000 t fault time delay vs. tim resistor max5959 toc40 r tim (k ) t fault (ms) 800 600 200 400 20 40 60 80 100 120 140 160 180 200 0 0 1000
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 11 pin description pin name function 1 12sb- slot b 12v negative current-sense input. connect 12sb- to the negative side of the current-sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 2 12sb+ slot b 12v positive current-sense input. connect the positive terminal of the current-sense resistor to 12sb+ using the kelvin-sensing technique to ensure accurate current sensing. 3 auxonb slot b 3.3v auxiliary output enable. a logic-high at auxonb turns on the slot b auxiliary output. 4 onb slot b 12v and 3.3v main outputs enable. a logic-high at onb turns on the 12v and 3.3v main outputs of slot b (see table 2). 5 input1 digital logic gate input 1 6 output1 digital output 1. 4ms debounced digital output of input1. 7 input2 digital logic gate input 2 8 output2 digital output 2. 4ms debounced digital output of input2. 9, 61, 80 n.c. no connection. not internally connected. leave unconnected. 10 fond slot d forced-on input. fond has a 50k internal pullup to 3.3vauxin. a logic-low on fond turns on all slot d outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. leave fond unconnected for normal operation. 11 pres-detd slot d present-detect input. pres-detd accepts inputs from prsnt#_# on a pcie connector. pres- detd has an internal 50k pullup to 3.3vauxin. when pres-deta is low, the outputs follow the command from ond and auxond after a 4ms debounced time. when pres-detd goes from low to high, all outputs of the respective slot shut down with no delay. 12 ond slot d 12v and 3.3v main outputs enable. a logic-high at ond turns on the 12v and 3.3v main outputs of slot d (see table 2). 13 auxond slot d 3.3v auxiliary output enable. a logic-high at auxond turns on the slot d auxiliary output. 14 gnd ground 15 fonc slot c forced-on input c. fonc has a 50k internal pullup to 3.3vauxin. a logic-low on fonc turns on all slot c outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. leave fonc unconnected for normal operation. 16 pres-detc slot c present-detect input. pres-detc accepts inputs from prsnt#_# on a pcie connector. pres- detc has an internal 50k pullup to 3.3vauxin. when pres-detc is low, the outputs follow the command from onc and auxonc after a 4ms debounced time. when pres-detc goes from low to high, all outputs of the respective slot shut down with no delay. 17 onc slot c 12v and 3.3v main outputs enable. a logic-high at onc turns on the 12v and 3.3v main outputs of slot c (see table 2). 18 auxonc slot c 3.3v auxiliary output enable. a logic-high at auxonc turns on the slot c auxiliary output. 19 12sc+ slot c 12v positive current-sense input. connect the positive terminal of the current-sense resistor to 12sc+ using the kelvin-sensing technique to ensure accurate current sensing. 20 12sc- slot c 12v negative current-sense input. connect 12sc- to the negative side of the current-sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 21 12gc slot c 12v gate-drive output. connect 12gc to the gate of slot c? 12v mosfet. at power-up, 12gc is raised to the internal charge-pump voltage level by a constant current. 22 3.3sc+ slot c 3.3v positive current-sense input. connect the positive side of the current-sense resistor to 3.3sc+ using the kelvin-sensing technique to ensure accurate current sensing.
max5959/MAX5960 quad pci express, hot-plug controllers 12 ______________________________________________________________________________________ pin description (continued) pin name function 23 3.3sc- slot c 3.3v negative current-sense input. connect to the negative side of the sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 24 3.3gc slot c 3.3v gate-drive output. connect 3.3gc to the gate of slot c? 3.3v mosfet. at power-up, 3.3gc is charged to 5.5v above the 3.3v supply by a constant current derived from v 12vin . v 3.3gc ? rise time is determined by the external gate capacitance. 25 faultc open-drain fault output signal. faultc latches active-low whenever slot c outputs are shut down due to a fault. a fault is either of: ? an overcurrent condition lasting longer than the overcurrent timeout. ? a device over temperature condition. if the fault is detected in the main outputs, faultc must be reset by toggling the onc input. if the fault is in the auxiliary output, faultc must be reset by toggling both onc and auxonc. for the autorestart version, faultc is reset when the part initiates the next power-on cycle. 26 pwrgdc open-drain power-good output. pwrgdc goes low 160ms after all outputs of slot c reach their final value and the power mosfets are fully enhanced. 27,28 3.3auxoc slot c 3.3v auxiliary power-supply output 29, 30, 31, 69, 70, 71 3.3vauxin 3.3v auxiliary supply input. 3.3vauxin is the input to a charge pump that drives the internal mosfets connecting 3.3auxin to 3.3auxo_. v 3.3auxin is also used to power the internal control logic and analog references of the max5959/MAX5960 and must always be connected to a supply between 3v and 3.6v. bypass 3.3auxin with at least a 0.1? capacitor to gnd. 32, 33 3.3auxod slot d 3.3v auxiliary power-supply output 34, 66 pgnd power ground. connect externally to gnd. 35 pwrgdd open-drain power-good output. pwrgdd goes low 160ms after all outputs of slot d reach their final value and the power mosfets are fully enhanced. 36 faultd open-drain fault output signal. faultd latches active-low whenever slot d outputs are shut down due to a fault. a fault is either of: ? an overcurrent condition lasting longer than the overcurrent timeout. ? a device over temperature condition. if the fault is detected in the main outputs, faultd must be reset by toggling the ond input. if the fault is in the auxiliary output, faultd must be reset by toggling both ond and auxond. for the autorestart version, faultd is reset when the part initiates the next power-on cycle. 37 tim overcurrent timeout programming input. connect a resistor between 500 and 500k from tim to gnd to program t fault . leave tim unconnected for a default timeout of 11ms. 38 poradj power-on-reset programming input. connect a resistor between 500 and 500k from poradj to gnd to program the por timing. leave unconnected for a default value of 160ms. connect poradj to gnd to completely skip the por time delay for pwrgd_ assertion. 39 gnd ground 40 12vin 12v supply input. v 12vin drives the gates of the mosfets connected to 3.3g_. 12vin powers an internal charge pump that drives the gates of the mosfets connected to 12g_. bypass 12vin with a 1? capacitor to gnd. see the typical application circuit and input transients section. 41 12gd slot d 12v gate-drive output. connect 12gd to the gate of slot d? 12v mosfet. at power-up, v 12gd is raised to the internal charge-pump voltage level by a constant current. 42 12sd- slot d 12v negative current-sense input. connect 12sd- to the negative side of the current-sense resistor using the kelvin-sensing technique to ensure accurate current sensing.
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 13 pin description (continued) pin name function 43 12sd+ slot d 12v positive current-sense input. connect the positive terminal of the current-sense resistor to 12sd+ using the kelvin-sensing technique to ensure accurate current sensing. 44 3.3gd slot d 3.3v gate-drive output. connect 3.3gd to the gate of slot d? 3.3v mosfet. at power-up, v 3.3gd is charged to 5.5v above the 3.3v supply by a constant current derived from v 12vin . v 3.3gd ? rise time is determined by the external gate capacitance. 45 3.3sd- slot d 3.3v negative current-sense input. connect to the negative side of the sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 46 3.3sd+ slot d 3.3v positive current-sense input. connect the positive side of the current-sense resistor to 3.3sd+ using the kelvin-sensing technique to ensure accurate current sensing. 47 pres-detb slot b present-detect input. pres-detb accepts inputs from prsnt#_# on a pcie connector. pres-detb has an internal 50k pullup to 3.3vauxin. when pres-detb is low, the outputs follow the command from onb and auxonb after a 4ms debounced time. when pres-detb goes from low to high, all outputs of the respective slot shut down with no delay. 48 fonb slot b forced-on input. fonb has a 50k internal pullup to 3.3vauxin. a logic-low on fonb turns on all slot b outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. leave fonb unconnected for normal operation. 49 pres-deta slot a present-detect input. pres-deta accepts inputs from prsnt#_# on a pcie connector. pres-deta has an internal 50k pullup to 3.3vauxin. when pres-deta is low, the outputs follow the command from ona and auxona after a 4ms debounced time. when pres-deta goes from low to high, all outputs of the respective slot shut down with no delay. 50 fona slot a forced-on input. fona has a 50k internal pullup to 3.3vauxin. a logic-low on fona turns on all slot a outputs as long as the power inputs are within their operating range, regardless of the status of the other input signals. leave fona unconnected for normal operation. 51 output4 digital output 4. 4ms debounced digital output of input4. 52 input4 digital logic gate input 4 53 output3 digital output 3. 4ms debounced digital output of input3. 54 input3 digital logic gate input 3 55 ona slot a 12v and 3.3v outputs enable. a logic-high at ona turns on the 12v and 3.3v outputs of slot a (see table 2). 56 auxona slot a 3.3v auxiliary output enable. a logic-high at auxona turns on the slot a auxiliary output. 57 12sa+ slot a 12v positive current-sense input. connect the positive terminal of the current-sense resistor to 12sa+ using the kelvin-sensing technique to ensure accurate current sensing. 58 12sa- slot a 12v negative current-sense input. connect 12sa- to the negative side of the current-sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 59 12ga slot a 12v gate-drive output. connect 12ga to the gate of slot a? 12v mosfet. at power-up, v 12ga is raised to the internal charge-pump voltage level by a constant current. 60 3.3sa+ slot a 3.3v positive current-sense input. connect the positive side of the current-sense resistor to 3.3sa+ using the kelvin-sensing technique to ensure accurate current sensing. 62 3.3sa- slot a 3.3v negative current-sense input. connect to the negative side of the sense resistor using the kelvin-sensing technique to ensure accurate current sensing.
max5959/MAX5960 quad pci express, hot-plug controllers 14 ______________________________________________________________________________________ pin description (continued) pin name function 63 3.3ga slot a 3.3v gate-drive output. connect 3.3ga to the gate of slot a? 3.3v mosfet. at power-up, v3.3ga is charged to 5.5v above the 3.3v supply by a constant current derived from v 12vin . v 3.3ga ? rise time is determined by the external gate capacitance. 64 faulta open-drain fault output signal. faulta latches active low whenever slot a outputs are shut down due to a fault. a fault is either of: ?an overcurrent condition lasting longer than the overcurrent timeout. ?a device over temperature condition. if the fault is detected in the main outputs, faulta must be reset by toggling the ona input. if the fault is in the auxiliary output, faulta must be reset by toggling both ona and auxona. for the autorestart version, faulta is reset when the part initiates the next power-on cycle. 65 pwrgda open-drain power-good output. pwrgda goes low 160ms after all outputs of slot a reach their final value and the power mosfets are fully enhanced. 67, 68 3.3auxoa slot a 3.3v auxiliary power-supply output 72, 73 3.3auxob slot b 3.3v auxiliary power-supply output 74 pwrgdb open-drain power-good output. pwrgdb goes low 160ms after all outputs of slot b reach their final value and the power mosfets are fully enhanced. 75 faultb open-drain fault output signal. faultb latches active-low whenever slot b outputs are shut down due to a fault. a fault is either of: ?an overcurrent condition lasting longer than the overcurrent timeout. ?a device over temperature condition. if the fault is detected in the main outputs, faultb must be reset by toggling the onb input. if the fault is in the auxiliary output, faultb must be reset by toggling both onb and auxonb. for the autorestart version, faultb is reset when the part initiates the next power-on cycle. 76 3.3gb slot b 3.3v gate-drive output. connect 3.3gb to the gate of slot b? 3.3v mosfet. at power-up, v 3.3gb is charged to 5.5v above the 3.3v supply by a constant current derived from v 12vin . v 3.3gb ? rise time is determined by the external gate capacitance. 77 3.3sb- slot b 3.3v negative current-sense input. connect to the negative side of the sense resistor using the kelvin-sensing technique to ensure accurate current sensing. 78 3.3sb+ slot b 3.3v positive current-sense input. connect the positive side of the current-sense resistor to 3.3sb+ using the kelvin-sensing technique to ensure accurate current sensing. 79 12gb slot b 12v gate-drive output. connect 12gb to the gate of slot b? 12v mosfet. at power-up, v 12gb is raised to the internal charge-pump voltage level by a constant current. detailed description the max5959/MAX5960 quad hot-plug controllers are designed for pcie applications. the devices provide hot-plug control for 12v, 3.3v, and 3.3v auxiliary sup- plies for three pcie slots. the max5959/MAX5960s logic inputs/outputs allow interfacing directly with the system hot-plug-management controller or through an smbus with an external i/o expander. an integrated debounced attention switch and present-detect signals are included to simplify system design (figure 1). the max5959/MAX5960 drive eight external n-chan- nel mosfets to control the 12v and 3.3v main out- puts. the 3.3v auxiliary outputs are controlled through internal 0.2 n-channel mosfets. internal charge pumps provide a gate drive for the 12v outputs while the gate drive of the 3.3v output is driven by the 12v input supply. the 3.3v auxiliary outputs are complete- ly independent from the main outputs with their own charge pumps.
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 15 5 a 12s_- 12g_ 12s_+ 54mv 108mv r sense 150 a 10 a 100 a - + - + 10 a 120ma 5 a 3.3s_- 3.3g_ 3.3s_+ 20mv 40mv 150 a 3.3auxo pres-det_ fon_ auxon_ uvlo v ref on_ r sense - + - + 10 a 150ma charge pump - + r tim tim in out 12vin pwrgd_ fault_ r poradj poradj debounce fast oscillator control logic main-channel control logic aux-channel input comparator and chip control logic t fault t por oscillator max5959 bias, references, and uvlo control logic main-channel control logic aux-channel charge pump 100 a figure 1. single-channel internal block diagram
max5959/MAX5960 quad pci express, hot-plug controllers 16 ______________________________________________________________________________________ at power-up, the max5959/MAX5960 keep all the external mosfets off until all supplies rise above their respective uvlo thresholds. these devices keep the internal mosfets off only until the 3.3vauxin supply rises above its uvlo threshold. upon a turn-on com- mand, the max5959/MAX5960 enhance the external and internal mosfets slowly with a constant gate cur- rent to limit the power-supply inrush current. the max5959/MAX5960 actively limit the current of all out- puts at all times and shut down the corresponding channel if an overcurrent condition persists for longer than a resistor-programmable overcurrent timeout (see the fault management section). thermal protection cir- cuitry also shuts down all outputs if the die temperature exceeds +150?. after an overcurrent or overtempera- ture fault condition, the max5959/MAX5960 latch off or automatically restart depending on the version, after a restart time delay. the power requirement for pcie connectors is defined by the pcie card specification and summarized in table 1. startup the main supply outputs can become active only after all the following events have occurred: ? 3.3auxin is above its uvlo threshold. ? 12vin and v 3.3sa+ are both above their uvlo threshold. on_ is driven high. pres-det_ is low for more than 4ms. the auxiliary supply output is made available only after the following events have occurred: ? 3.3auxin is above its uvlo threshold. auxon_ is driven high. pres-det_ is low for more than 4ms. the fon_ input overrides all other control signals and turns on the respective slot when driven low, as long as the uvlo thresholds have been reached. table 2 sum- marizes the logic conditions required for startup. the aux- iliary supply input powers the internal control logic and analog references of the max5959/MAX5960, so the main supplies cannot be enabled, if v 3.3vauxin is not present. when an output is enabled, a programmable startup timer (t su ) begins to count the startup time duration. the value of t su is set to 2x the fault timeout period (t fault ). r tim externally connected from tim to gnd sets the duration of t fault . table 1. power requirement for pcie connectors power fail x1 connector x4/8 connector x16 connector 3.3v voltage tolerance ?% (max) ?% (max) ?% (max) supply current 3.0a (max) 3.0a (max) 3.0a (max) capacitive load 1000? (max) 1000? (max) 1000? (max) 12v voltage tolerance ?% (max) ?% (max) ?% (max) supply current 0.5a (max) 2.1a (max) 5.5a (max) capacitive load 300? (max) 1000? (max) 2000? (max) 3.3v auxiliary voltage tolerance ?% (max) ?% (max) ?% (max) supply current, wake enabled 375ma (max) 375ma (max) 375ma (max) supply current, nonwake enabled 20ma (max) 20ma (max) 20ma (max) capacitive load 150? (max) 150? (max) 150? (max)
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 17 table 2. control logic truth table * pres-det_ high-to-low transition has a 4ms delay (t deg ). on_ auxon_ fon_ pres-det 12v_ and 3.3v_ outputs 3.3vauxo_auxiliary outputs x x low x on on x x high high off off low low high low* off off high low high low* on off low high high low* off on high high high low* on on figure 2. power-up timing, no fault v on_,th on_, auxon_ pwrgd_ fault_ 12g_, 3.3g_ 12vo_, 3.3vo_ 3.3vauxo_ v pgth12 v pgth3.3 v pgth3.3aux 3.3auxin rising edge pwrgd_ is pulled up to 3.3. fault_ is pulled up to 3.3auxin. t por_hl figure 3. 12v power-up timing (turn-on into output overcurrent/short circuit) fault_ 3.3vauxin rising edge pwrgd_ is pulled up to 3.3vauxo_. fault_ is pulled up to 3.3vauxin. a fault on the 3.3v output or 3.3vauxo_ output produces similar results. v on_,th on_ 2 x t fault pwrgd_ 12g_ 12v output current 3.3vauxo_ v 12ilim,th r sense
max5959/MAX5960 quad pci express, hot-plug controllers 18 ______________________________________________________________________________________ 12v and 3.3v outputs normal operation the max5959/MAX5960 monitor and actively limit the current of the 12v and 3.3v outputs after the startup period. each output has its own overcurrent threshold. if any of the monitored output currents rise above the overcurrent threshold for a period t fault , fault_ asserts and the controller disengages both the 12v and 3.3v outputs for the particular slot (see the fault management section). 3.3v auxiliary output normal operation the auxiliary output current is internally monitored and actively limited to the maximum current-limit value. an overcurrent fault condition occurs when the output cur- rent exceeds the overcurrent threshold for longer than t fault . a fault on an auxiliary channel causes all sup- plies of the affected channel to be disabled after a pro- grammable time period t fault . a fault condition on a main channel (v 12vin or v 3.3vin ) causes all the channel? main outputs to shut down after the t fault period and then either latch off or auto- matically restart after the t restart (t restart = 64 x t faualt ) period, depending on the device version. a fault on any of the channel? main output does not affect the auxiliary channel (v 3.3auxin ). power-good (pwrgd_) power-good ( pwrgd_ ) is an open-drain output that pulls low a time (t por_hl ) after all the outputs of the respective slot are fully on. all outputs are considered fully on when 3.3g_ has risen to v pgth3.3 , 12g_ has risen to v pgth12 , and v 3.3auxo_ is less than v pgth3.3aux . t por_hl is adjustable from 2.4ms to 1.5s by connecting a resistor from poradj to gnd. see the setting the power-on reset and timeout period (t por_hl ) sections. connect poradj to gnd to com- pletely skip the por time delay for pwrgd_ assertion. thermal shutdown when the die temperature goes above (t sd ) +150?, an overtemperature fault occurs and the max5959/ MAX5960 shut down all outputs. the device waits for the junction temperature to decrease below t sd - hysteresis before entering fault management (see the fault management section): fault management a fault occurs when an overcurrent or 12g_ or 3.3g_ below their power-good threshold lasts longer than t fault or when the device experiences an overtemper- ature condition: a fault on a main output (12v or 3.3v) shuts down both main outputs of the respective slot. the 3.3v auxiliary is not affected. a fault on the 3.3v auxiliary output shuts down all three outputs of the respective slot. the max5959a/MAX5960a automatically restart from a fault shutdown after the t restart period while the max5959l/MAX5960l latch off. if an overcurrent fault occurred on a main output, bring on_ low for at least t reset (100?) and high again to reset the fault and restart the outputs. if the overcurrent fault occurred on an auxiliary output or an overtemperature fault occurred, bring both on_ and auxon_ low for a mini- mum of t reset to reset the fault. toggle on_ or only auxon_ to reset the fault condition. if on_ and auxon are toggled before t restart time counting has elapsed, the max5959l/MAX5960l store the informa- tion and restart when the delay is finished. the max5959a/MAX5960a (autoretry versions) restart all channels automatically after t restart . figure 4. 12 output overcurrent/short circuit during normal operation fault_ pwrgd_ is pulled up to 3.3vauxo_. fault_ is pulled up to 3.3vauxin. a fault on the 3.3v output or 3.3vauxo_ output produces similar results. t fault pwrgd_ 12g_ 12v output current v 12ilim,th r sense
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 19 debounced logic gate (input_ and output_) input1, input2, and input3 accept inputs from mechanical switches. the corresponding outputs are output1, output2, output3, and output4. out- put_ is debounced for 4ms. when input_ goes from high to low, output_ goes low immediately and stays low for at least 4ms. after the debounce time, out- put_ follows input_. if input_ goes from low to high, output_ goes high immediately and stays high for at least 4ms. after the debounce time, output_ follows input_. figure 5 shows the timing diagram describing the input_/output_ debounced feature. present-detect and forced-on inputs (pres-det_, fon_) pres-det_ input detects the prsnt_# pin on a pcie connector. when the card is plugged in, pres-det_ goes low and allows the turn-on of the outputs of the respective slot after a 4ms debounced time. when the card is removed, an internal 50k pullup resistor forces pres-det_ high and the respective slot is shut down with no delay. pres-det_ works in conjunction with on_ and auxon_ and only enables the device when on_ and auxon_ are high. a logic-low on fon_ forces the respective slot (main supplies and auxiliary) to turn on regardless of the sta- tus of the other logic inputs, provided the uvlo thresh- olds are exceeded on all the inputs. active current limits active current limits are provided for all three outputs of the four slots (slot a, slot b, slot c, and slot d). connect a current-sense resistor between 12s_+ and 12s_- to set the current limit for the 12v outputs. the current limit is set to 54mv / r sense12 . connect a current- sense resistor between 3.3s_+ and 3.3s_- to set the current limit for the 3.3v main outputs to 20mv / r sense3.3 . for the auxiliary output (3.3vauxo_) the current limit is fixed at 450ma in the max5959 and 700ma in the case of the MAX5960. when the voltage across r sense12 or r sense3.3 reaches the current-limit threshold voltage, the max5959/MAX5960 regulate the gate voltage to main- tain the current-limit threshold voltage across the sense resistor. if the current limit lasts for t fault , then an overcurrent fault occurs. the max5959/MAX5960 shut down both the 12v and 3.3v outputs and assert the fault_ output of the respective slot. when the auxiliary output reaches the current limit 450ma (max5959) or 700ma (MAX5960) for longer than t fault , a fault occurs and the device shuts down all outputs and asserts fault of the respective slot. uvlo threshold the uvlo thresholds prevent the internal auxiliary mosfets and the external main channel mosfets from turning on if v 12vin , v 3.3vin , and v 3.3vauxin are not present. internal comparators monitor the main supplies and the auxiliary supply and keep the gate- drive outputs (12ga, 12gb, 12gc, 12gd, 3.3ga, 3.3gb, 3.3gc, and 3.3gd) low until the supplies rise above their uvlo threshold. the 12v main supply is monitored at 12vin and has a uvlo threshold of 10v. the 3.3v main supply is monitored at 3.3sa+ and has a uvlo threshold of 2.65v. the auxiliary supply is monitored at 3.3auxin and has a 2.65v uvlo thresh- old. for either main channels to operate, v3.3auxin must be above its uvlo threshold. figure 5. input_ and output_ debounced feature input debounced output t dbc t dbc t dbc
max5959/MAX5960 quad pci express, hot-plug controllers 20 ______________________________________________________________________________________ enable charge on internal auxiliary mosfet driving 3.3auxo_. start counting t su fault on 12v or 3.3v outputs reset t fault counter fault still present? y y y y y shut down 12v and 3.3v outputs. assert fault_ stay waiting for t restart t fault elapsed? n n n n 3.3vauxin is ok, auxon_ is high, pres_det is low reset fault_ start counting t fault y n n n are all main outputs ok? no fault detected latch-off option? n on_ toggled high low high main inputs are ok, on_ is high y y n enable charge on 3.3g_ and 12g_. start counting t su t su elapsed? y start pgood threshold monitoring start counting t fault all pgood thresholds reached? n n n n y y y y assert pwrgd_ after t por_hl delay reset pwrgd_ power on auxiliary output. fault_ and pwrgd_ are high impedance shut down all outputs. assert fault_. stay waiting for t restart reset fault_ on_ and auxon_ toggled high low high t su elapsed? aux output ok? no fault detected fault on 3.3auxo_? n n t fault elapsed? y fault still present? n y y latch-off option? reset t fault counter figure 6. fault management flowchart
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 21 external mosfet gate drivers (12g_ and 3.3g_) the gate drive for the external mosfets is provided at 12ga, 12gb, 12gc, 12gd, 3.3ga, 3.3gb, 3.3gc, and 3.3gd. 12g_ is the gate drive for the 12v main supply and is boosted to 5.3v above v 12vin by its internal charge pump. during turn-on, 12g_ sources 5? into the external gate capacitance to control the turn-on time of the external mosfet. during turn-off, 12g_ sinks 150? from the external gate capacitance to quickly turn off the external mosfet. during short-cir- cuit events, an internal 120ma current sink activates to rapidly bring the load current into the regulation limits. 3.3g_ is the gate drive for the 3.3v main supply? mos- fet and is driven to 5.5v above the 3.3v main supply. the power for 3.3g_ is supplied from 12vin and has no internal charge pump. during turn-on, 3.3g_ sources 5? into the external gate capacitance to control the turn-on time of the external mosfet. during turn-off, 3.3g_ sinks 150? to quickly turn off the external mos- fet. during short-circuit events, an internal 120ma cur- rent sink activates to rapidly turn off the appropriate external mosfet. auxiliary supply (3.3vauxin) 3.3vauxin provides power to the auxiliary outputs as well as the internal logic and references. the drains of the internal auxiliary mosfets connect to 3.3auxin through internal sense resistors and the sources con- nect to the auxiliary outputs (3.3vauxo_). both mosfets have typical on-resistance of 0.2 . each channel? internal charge pump boosts the gate-drive voltage to fully turn on the internal n-channel mosfets. the auxiliary supplies have an internal current limit set to 450ma (max5959) or 700ma (MAX5960). applications information setting the power-on reset t fault is the time an overcurrent or overtemperature fault must remain for the max5959/MAX5960 to disable the main or auxiliary channels of a particular slot. program the fault timeout period (t fault ) by connect- ing a resistor (r tim ) from tim to gnd. t fault can be calculated by the following equation: t fault = (166ns / ) x r tim the t fault programmed time duration must be chosen according to the total capacitance load connected to the 12g_ and 3.3g_ pins. to properly power up the main supply outputs, the following constraints need to be taken: t su (v gate x c load ) / i chg where t su = 2 x t fault and where: ? chg = 5?. ? gate = 4.8v +v 12vin for 12g_ and v gate = 6.8v +v 3.3vin for 3.3g_. ? load is the total capacitance load at the gate. maximum and minimum values for r tim are 500 and 500k , respectively. leave tim floating for a default t fault of 10ms. timeout period (t por_hl ) t por_hl is the time from when the gate voltages of all outputs of a slot reach their power-good threshold to when pwrgd_ pulls low. program the por timeout period (t por ) by connecting a resistor (r poradj ) from poradj to gnd. t por_hl can be calculated by the fol- lowing equation: t por_hl = (2.5? / ) x r poradj maximum and minimum values for r poradj are 500 and 500k , respectively. leave poradj floating for a default t por of 150ms. connect poradj to gnd in order to completely skip the power-on delay time prior to the pwrgd_ assertion. component selection select the external n-channel mosfet according to the applications current requirement. limit the switch power dissipation by choosing a mosfet with an r ds_on low enough to have a minimum voltage drop at full load. high r ds_on causes larger output ripple if there are pulsed loads. high r ds_on can also trigger an external undervoltage fault at full load. determine the mosfet? power-rating requirement to accommo- date a short-circuit condition on the board during start- up. table 3 lists the mosfets and sense resistor manufacturers.
max5959/MAX5960 quad pci express, hot-plug controllers 22 ______________________________________________________________________________________ additional external gate capacitance external capacitance can be added from the gate of the external mosfets to gnd to slow down the dv/dt of the 12v and 3.3v outputs. the maximum gate capacitance load at 12g_ and 3.3g_ must be consis- tent with the conditions described in the setting the power-on reset section. maximum load capacitance large capacitive loads at the 12v output, the 3.3v out- put, and the 3.3v auxiliary output can cause a problem when inserting discharged pci cards into live back- planes. a fault occurs if the time needed to charge the capacitance of the board is greater than the typical startup time (2 x t fault ). the max5959/MAX5960 with- stand large capacitive loads due to their adjustable startup times and adjustable current-limit thresholds. calculate the maximum load capacitance as follows: c load < (t su x i lim ) / v out v out is either the 3.3v output, the 12v output, or the 3.3v auxiliary output for slot a, slot b, slot c, or slot d. input transients the 12v input (12vin), the 3.3v input (3.3sa+), and the 3.3v auxiliary (3.3auxin) must be above their uvlo thresholds before startup can occur. input transients can cause the input voltage to sag below the uvlo threshold. the max5959/MAX5960 reject transients on the input supplies that are shorter than 4? (typ). because some load fault conditions can cause voltage transients to propagate to the supply inputs with dura- tion of greater than 4?, it is recommended that a small schottky diode be placed in series with the 12vin pin connection, upstream of the 1? bypass capacitor. this provides a hold-up supply that will prevent the 12vin input from dropping below v 12uvlo during severe tran- sients. see the typical application circuit . table 3. component manufacturers component manufacturer phone website vishay-date 402-564-3131 www.vishay.com sense resistor irc 704-264-8861 www.irctt.com fairchild 888-522-5372 www.fairchildsemi.com international rectifier 310-322-3331 www.irf.com motorola 602-244-3576 www.mot-sps.com/ppd mosfets vishay-siliconix www.vishay.com
max5959/MAX5960 quad pci express, hot-plug controllers ______________________________________________________________________________________ 23 typical application circuit v 3.3vauxin 10k pwrgd_ int smbus ao?2 leds mrl prsnt1# pci express slot_ +12v pwrgd 3.3vaux 3.3vauxo_ gnd +3.3v prsnt2# gnd attention switch auxon_ on_ input_ output_ fon_ pres-det_ 3.3g_ 3.3s_- 3.3s_+ 12s_+ v 3.3vaux in5819 r poradj = open v 12vmain v 3.3vmain 12g_ 10k 12s_- 3.3vauxin one of four slots shown 12vin poradj 2 2 max7313atg 16-bit i/o expander max5959 MAX5960 fault_ r tim = open tim r1 8m r2 5m 0.1 f 2.2 f 0.1 f
max5959/MAX5960 quad pci express, hot-plug controllers 24 ______________________________________________________________________________________ pin configuration 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 n.c. 12gb 3.3sb+ 3.3sb- 3.3gb faultb pwrgdb 3.3auxob 3.3auxob 3.3auxin 3.3auxin 60 3.3sa+ 12ga 12sa- 12sa+ auxona ona input3 output3 input4 output4 fona pres-deta fonb pres-detb 3.3sd+ 3.3sd- 3.3gd 12sd+ 12sd- 12gd 12sb- 12sb+ auxonb onb input1 output1 input2 output2 n.c. fond pres-detd ond auxond gnd fonc pres-detc onc auxonc 12sc+ 12sc- 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 1 + 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 3.3auxin 3.3auxoa 3.3auxoa pgnd pwrgda 64 63 62 61 faulta 3.3ga 3.3sa- n.c. 12gc 3.3sc+ 3.3sc- 3.3gc faultc pwrgdc 3.3auxoc 3.3auxoc 3.3auxin 3.3auxin 3.3auxin 3.3auxod 3.3auxod pgnd pwrgdd faultd 37 38 39 40 tim poradj gnd 12vin tqfp max5959 MAX5960 top view chip information process: bicmos
max5959/MAX5960 quad pci express, hot-plug controllers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 25 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) tqfp12x12mm.eps package outline, 21-0072 1 1 c 80l tqfp, 12x12x1.0mm

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