pi74fct16373/162373/162h373t 16-bit transparent latches 1 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 logic block diagram product features common features: ? pi74fct16373t, pi74fct162373t, and pi74fct162h373t are high-speed, low power devices with high current drive. ? vcc = 5v 10% ? hysteresis on all inputs ? packages available: ? 48-pin 240 mil wide plastic tssop (a) ? 48-pin 300 mil wide plastic ssop (v) pi74fct16373t features: ? high output drive: i oh = ?32 ma; i ol = 64 ma ? power off disable outputs permit "live insertion" ? typical v olp (output ground bounce) < 1.0v at v cc = 5v, t a = 25c pi74fct162373t features: ? balanced output drivers: 24 ma ? reduced system switching noise ? typical v olp (output ground bounce) < 0.6v at v cc = 5v, t a = 25c pi74fct162h373t features: ? bus hold retains last active bus state during 3-state ? eliminates the need for external pull-up resistors product description pericom semiconductor?s pi74fct series of logic circuits are pro- duced using the company?s advanced 0.6 micron cmos technology, achieving industry leading speed grades. the pi74fct16373t, pi74fct162373t, and pi74fct162h373t are 16-bit transparent latches designed with 3-state outputs and are intended for bus oriented applications. the output enable and latch enable controls are organized to operate as two 8-bit latches or one 16-bit latch. when latch enable (le) is high, the flip-flops appear transparent to the data. the data that meets the set-up time when le is low is latched. when oe is high, the bus output is in the high impedance state. the pi74fct16373t output buffers are designed with a power-off disable allowing ?live insertion? of boards when used as backplane drivers. the pi74fct162373t has 24 ma balanced output drivers. it is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. this eliminates the need for external terminating resistors for most interface applications. the pi74fct162h373t has ?bus hold? which retains the input?s last state whenever the input goes to high-impedance preventing ?floating? inputs and eliminating the need for pull-up/down resistors. pi74fct16373t pi74fct162373t pi74fct162h373t fast cmos 16-bit transparent latches 1 oe 1 le 1 o 0 c d 1 d 0 to 7 other channels 2 oe 2 le 2 o 0 c d 2 d 0 to 7 other channels
pi74fct16373/162373/162h373t 16-bit transparent latches 2 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product pin description pin name description xoe output enable inputs (active low) xle latch enable inputs (active high) xdx inputs (1) xox 3-state outputs gnd ground v cc power inputs (1) outputs (1) x d xx oe xle xox hl h h llh l xhx z truth table note 1 h = high voltage level x = don?t care l = low voltage level z = high impedance product pin configuration note: 1. for the pi74fct162h373t, these pins have ?bus hold.? all other pins are standard, outputs, or i/os. 1 2 3 4 5 6 7 8 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 32 31 30 29 28 27 26 25 1 oe 1 o 0 1 o 1 gnd 1 o 2 1 o 3 v cc 1 o 4 1 o 5 gnd 1 o 6 1 o 7 2 o 0 2 o 1 gnd 2 o 2 2 o 3 v cc 2 o 4 2 o 5 gnd 2 o 6 2 o 7 2 oe 1 le 1 d 0 1 d 1 gnd 1 d 2 1 d 3 v cc 1 d 4 1 d 5 gnd 1 d 6 1 d 7 2 d 0 2 d 1 gnd 2 d 2 2 d 3 v cc 2 d 4 2 d 5 gnd 2 d 6 2 d 7 2 le 48-pin a,v
pi74fct16373/162373/162h373t 16-bit transparent latches 3 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 5.0v 10%) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.8 v i ih input high current standard input , v cc = max. v in = v cc 1a i ih input high current standard i/o, v cc = max. v in = v cc 1a i ih input high current bus hold input (4) , v cc = max. v in = v cc 100 a i ih input high current bus hold i/o (4) , v cc = max. v in = v cc 100 a i il input low current standard input , v cc = min. v in = gnd ?1 a i il input low current standard i/o, v cc = min. v in = gnd ?1 a i il input low current bus hold input (4) , v cc = min. v in = gnd 100 a i il input low current bus hold i/o (4) , v cc = min. v in = gnd 100 a i bhh bus hold bus hold input (4) , v cc = min. v in = 2.0v ?50 a i bhl sustain current v in = 0.8v +50 i ozh (5) high impedance v cc = max. v out = 2.7v 1 a i ozl (5) output current v cc = max. v out = 0.5v ?1 a v ik clamp diode voltage v cc = min., i in = ?18 ma ?0.7 ?1.2 v i os short circuit current v cc = max. (3) , v out = gnd ?80 ?140 ?200 ma i o output drive current v cc = max. (3) , v out = 2.5v ?50 ?180 ma v h input hysteresis 100 mv storage temperature ......................................................... ?65c to +150c ambient temperature with power applied ......................... ?40c to +85c supply voltage to ground potential (inputs & vcc only) .. ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ?0.5v to +7.0v dc input voltage ................................................................. ?0.5v to +7.0v dc output current ........................................................................... 120 ma power dissipation ................................................................................. 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the de- vice. this is a stress rating only and functional opera- tion of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to abso- lute maximum rating conditions for extended periods may affect reliability. notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. pins with bus hold are identified in the pin description. 5. this specification does not apply to bi-directional functionalities with bus hold. (above which the useful life may be impaired. for user guidelines, not tested.) maximum ratings
pi74fct16373/162373/162h373t 16-bit transparent latches 4 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct16373t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?3.0 ma 2.5 3.5 v i oh = ?15.0 ma 2.4 3.5 i oh = ?32.0 ma 2.0 3.0 v ol output low voltage v cc = min., v in = v ih or v il i ol = 64 ma 0.2 0.55 v i off power down disable v cc = 0v, v in or v out 4.5v ? ? 100 a pi74fct162373t/162h373t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?24.0 ma 2.4 3.3 v v ol output low voltage v cc = min., v in = v ih or v il i ol = 24 ma 0.3 0.55 v i odl output low current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) 60 115 150 ma i odh output high current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) ?60 ?115 ?150 ma notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type . 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (4) description test conditions typ max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 pf
pi74fct16373/162373/162h373t 16-bit transparent latches 5 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power v cc = max. v in = gnd or v cc 0.1 500 a supply current d i cc supply current per v cc = max. v in = 3.4v (3) 0.5 1.5 ma input @ ttl high i ccd supply current per v cc = max., v in = v cc 60 100 a/ input per mhz (4) outputs open v in = gnd mhz x oe = gnd, x le = v cc one bit toggling 50% duty cycle i c total power supply v cc = max., v in = v cc 0.6 1.5 (5) ma current (6) outputs open v in = gnd f i = 10 mh z 50% duty cycle x oe = gnd, x le = v cc one bit toggling v in = 3.4v 0.9 2.3 (5) v in = gnd v cc = max., v in = v cc 2.4 4.5 (5) outputs open v in = gnd f i = 2.5 mh z 50% duty cycle x oe = gnd, x le = v cc 16 bits toggling v in = 3.4v 6.4 16.5 (5) v in = gnd notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
pi74fct16373/162373/162h373t 16-bit transparent latches 6 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct16373t switching characteristics over operating range 16373t 16373at 16373ct 16373dt 16373et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50pf 1.5 8.0 1.5 5.2 1.5 4.2 1.5 3.8 1.5 3.4 ns t phl xdx to xox r l = 500 w t plh propagation delay 2.0 13.0 2.0 8.5 2.0 5.5 1.5 4.0 1.5 3.7 ns t phl xle to xox t pzh output enable time 1.5 12.0 1.5 6.5 1.5 5.5 1.5 4.8 1.5 4.4 ns t pzl xoe to xox t phz output disable time (3) 1.5 7.5 1.5 5.5 1.5 5.0 1.5 4.0 1.5 4.0 ns t plz xoe to xox t su setup time high 2.0 ? 2.0 ? 2.0 ? 1.5 ? 1.0 ? ns or low, x d x to x le t h hold time high 1.5 ? 1.5 ? 1.5 ? 1.0 ? 1.0 ? ns or low, x d x to x le t w xle pulse width 6.0 ? 5.0 ? 5.0 ? 3.0 ? 3.0 ? ns high (3) t sk (o) output skew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns pi74fct162373t switching characteristics over operating range 162373t 162373at 162373ct 162373dt 162373et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50pf 1.5 8.0 1.5 5.2 1.5 4.2 1.5 3.8 1.5 3.4 ns t phl xdx to xox r l = 500 w t plh propagation delay 2.0 13.0 2.0 8.5 2.0 5.5 1.5 4.0 1.5 3.7 ns t phl xle to xox t pzh output enable time 1.5 12.0 1.5 6.5 1.5 5.5 1.5 4.8 1.5 4.4 ns t pzl xoe to xox t phz output disable time (3) 1.5 7.5 1.5 5.5 1.5 5.0 1.5 4.0 1.5 4.0 ns t plz xoe to xox t su setup time high 2.0 ? 2.0 ? 2.0 ? 1.5 ? 1.0 ? ns or low, x d x to x le t h hold time high 1.5 ? 1.5 ? 1.5 ? 1.0 ? 1.0 ? ns or low, x d x to x le t w xle pulse width 6.0 ? 5.0 ? 5.0 ? 3.0 ? 3.0 ? ns high (3) t sk (o) output skew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design.
pi74fct16373/162373/162h373t 16-bit transparent latches 7 ps2033a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct162h373t switching characteristics over operating range 162h373t 162h373at 162h373ct 162h373dt 162h373et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50 pf 1.5 8.0 1.5 5.2 1.5 4.2 1.5 3.8 1.5 3.4 ns t phl xdx to xox r l = 500 w t plh propagation delay 2.0 13.0 2.0 8.5 2.0 5.5 1.5 4.0 1.5 3.7 ns t phl xle to xox t pzh output enable time 1.5 12.0 1.5 6.5 1.5 5.5 1.5 4.8 1.5 4.4 ns t pzl xoe to xox t phz output disable time (3) 1.5 7.5 1.5 5.5 1.5 5.0 1.5 4.0 1.5 4.0 ns t plz xoe to xox t su setup time high 2.0 ? 2.0 ? 2.0 ? 1.5 ? 1.0 ? ns or low, x d x to x le t h hold time high 1.5 ? 1.5 ? 1.5 ? 1.0 ? 1.0 ? ns or low, x d x to x le t w xle pulse width 6.0 ? 5.0 ? 5.0 ? 3.0 ? 3.0 ? ns high (3) t sk (o) output skew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com
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