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copyright ? 2002 revision 0.2d, 8/8/2002 lx1671/lx1672 clq (mlpq p ackage ) m ultiple o utput l oad share tm pwm e valuation b oard u sers g uide integrated products
lx1671 evaluation board user guide copyright ? 2002 microsemi page 2 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 t able o f c ontents overview....................................................................................................................... .........................3 lx1671 pwm topology............................................................................................................ .............3 lx1671 features ................................................................................................................ ...................3 evaluation board features ...................................................................................................... ..............3 loadshare (bi-phase) operation................................................................................................. .......3 configuration .................................................................................................................. .......................4 initial setup .................................................................................................................. ..........................5 single phase / bi-phase ........................................................................................................ ................6 required test equipment ........................................................................................................ ..............6 optional test equipment ........................................................................................................ ...............6 evaluation board operation..................................................................................................... ..............6 load regulation................................................................................................................ .....................7 line regulation................................................................................................................ ......................7 over current protection........................................................................................................ .................7 uvlo ........................................................................................................................... ..........................7 oscilloscope waveforms ......................................................................................................... ..............7 schematic ...................................................................................................................... ......................10 bill of materials.............................................................................................................. ......................11 silk screen and etch layers.................................................................................................... ............12
lx1671 evaluation board user guide copyright ? 2002 microsemi page 3 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 o verview the lx1671 evaluation board is designed to allow the user to get a detailed understanding of the operation of the lx1671 or lx1672 and to allow evaluation of several configurations that demonstrate the full capabilitie s of the controller. all three pulse width modulator (pwm) phases and the linear regulator (ldo) can be completely evaluated. the lx1672 is a two phase version of the lx1671 due to the flexibility of the lx1671 evaluation board a number of components must be selected for the specific mode of operation desired and to establish several variable parameters. the evaluation board is delivered with all required factory-installed components in a fully functional configuration. the lx1671 evaluation board can be delivered in a number of standard configurations. user changes to the standard board can be made for different applications and custom versions may be supplied in some situations. when the mlpq package is used the lx1671 and the lx1672 have the same pinout so the circuit board can be used for either part. this document is intended to be used in conjunction with the lx1671 data sheet and lx1671 product design guide (or lx1672 if applicable). lx1671 pwm t opology the lx1671 is a pwm controller offering a high level of integration. three sepa rate synchronous, voltage mode pwm controllers are integrated into a single package. phases 1 and 2 can be used in a bi- phase mode with loadshare? or used as two separate single-phase controllers. phase 3 is always used in single phase. the single-phase buck regulators are limited to approximately 15 amps maximum output by the available gate drive; the ability to operate in bi-phase allows output currents of 30 amps by paralleling the output capabilities of two controller phases. there is also a controller for a linear regulator that utilizes an external pass transistor with a maximum output of approximately 5a. lx1671 f eatures ? three synchronous pwm controllers ? one ldo controller ? two pwm controllers can be operated in bi- phase to double the cu rrent output capability. ? in bi-phase the two pwms operate 180 degrees out of phase to reduce input and output ripple current. ? each pwm controller can operate from a different input voltage when in single or bi- phase. ? when in bi-phase the currents supplied by each phase can be unbalanced with the loadshare? topology. ? 300 khz pwm switching frequency. ? hiccup current limiting in all pwm outputs. ? reference allows low output voltages down to 0.8 volts. ? no current sens e resistors; r ds(on) is used for current limit and hiccup mode. ? soft start on each pwm and under voltage lockout on vcc and upper fet drivers ? output voltage power-up sequencing by selecting soft-start capacitor value. ? reference input on phase 2 for forced current sharing or ddr memory data bus termination. e valuation b oard f eatures ? the heat sinking on the lx1671/72 evaluation board allows up to 8a out for each pwm phase. note: the controller is capable of 15a out on all pwm phases but component selection and thermal limits on the evaluation board will prevent operating at full current. ? linear regulator with pass transistor, limited to five watts power dissipation. ? provisions are made for different input voltages of 3.3, 5 , and 12 volts to be used as input power for each of the three phases. bootstrap diodes and capacitors can be installed depending on the input voltage selected. ? three terminal blocks are provided to allow connection of input 3.3, 5, and 12 volt power. ? four terminal blocks are provided for connecting loads to the outputs. ? a connector with jumpers allows enabling each pwm and the linear regulator independently. l oad share (b i -p hase ) o peration for loadshare operation it is necessary to use phases 1 and 2 because of the different configuration of the phase 2 error amplifier input. the phase 2 error amplifier does not internally connect to the reference like the other two phases but is brought out to the (rf2) pin to allow a filtered feedback from phase 1 to be brought into the error amplifier. phase 1 determines the output voltage and forces phase 2 to follow. when using
lx1671 evaluation board user guide copyright ? 2002 microsemi page 4 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 loadshare the input power drawn by phase 1 and 2 can be different to proportion the available power. phase 3 and the ldo operate independently and their output voltages can be set as desired. jumpers are installed on j1 to disable each regulator independently. c onfiguration the lx1671 evaluation board is available in several standard configurations or it can be customized for specific applications. note: for the purpose of this document one of the standard configurations (lx1671 eval -010) has been chosen to describe the evaluation board features and operation, all wording relates to this specific version. the standard board is designed for the mlpq package. the lx1672 in the mlpq package has the same pinout so that the same circuit board can be used with either part. this configuration has three output voltages with phases 1 and 2 operating in loadshare; phase 3 and the ldo each have their own outputs. the loadshare configuration used is the esr method where the current sharing ratio is determined by the esr of the output inductors. since both inductors are the same part number the current sharing ratio is 50% for each phase. the schematic (fig 7) and bill of material (fig 8) are for the -010 version which is configured as shown in table 1 below. each evaluation board will have a schematic and bill of material documenting that specific configuration. vout phase 1 & 2 1.5 volts vout phase 3 2.5 volts vout ldo 2.5 volts vin phase 1 5 volts phase 1 (vc1) +12 volts vin phase 2 3.3 volts phase 2 (vc2) +12 volts vin phase 3 12 volts p hase 3 (vc3) bootstrap vin ldo 3.3 volts phase 3 single phase phase 1 & 2 loadshare (bi-phase) vccl 5 volts table 1 lx1671?010 eval board configuration
lx1671 evaluation board user guide copyright ? 2002 microsemi page 5 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 i nitial s etup before applying any input power to the circuit board several choices must be made and the proper components must be chosen to allow operation with the desired characterist ics. note: the factory configuration is fully functional and can be changed if desired. prior to changing the factory configuration, the following criteria should be considered: ? single phase or loadshare operation for phase 1 and 2. ? input voltages for each of the three pwm regulators. ? will bootstrap be required, based on input voltages. ? output voltages for all four outputs. ? output current limit for pwm outputs. ? power up sequencing for output voltages. once the above are known the proper components and jumpers must be installed for the following: ? feedback and low pass filters for phase 1 and 2 pwm regulators if loadshare operation is selected. ? output voltage for phase 2 if single phase operation is used. ? output voltage for phase 1 and 3 if different from preset values. ? output voltage for the ldo if different from preset value ? bootstrap configurat ion if required. ? current limit for the pwm (if other than the preset value). ? soft start capacitors if different start up sequence is required. when loadshare operation is used low pass filtering is required on the two feedback paths from the outputs of phase 1 and 2 to the phase 2 error amplifier inputs. typical values are shown on the evaluation board schematic, figure (7) c onfiguration o ptions bootstrap a bootstrap circuit will be required if the high side fet driver supply voltage (vcx) is not at least 5 volts greater than the pwm input voltage ( high side fet drain voltage). a typical configuration is to use +12 for the high side gate driver, vcx, with either 3.3 or 5 as the pwm input, this gives sufficient gate drive to enhance the upper fet. an alternative is to use the bootstrap configuration to add 5 volts to the pwm input voltage which will generally make a slight improvement in efficiency by keeping the vcx voltage as low as possible and does not require a +12 volt input. if 12 volts is selected as the pwm input then bootstrapping w ill be required. each of the three pwm phases has provisions for a diode, capacitor, and several 0 ohm jumpers that allow bootstrapping each phase independently. see schematic figure (7). be sure that the zero ohm jumpers are configured to connect either +12 or the bootstrap voltage to the vcx pins and add the diode and capacitor for that phase. the bootstrap diodes and capacitors are cr1-c26,cr2-c2, and cr3,-c25. rectifier/filter since the ldo gets its power from vc1 using a bootstrap configuration for phase 1 results in the error amplifier having a square wave as its supply voltage. this square wave can be rectified and filtered by adding a second diode and capacitor to obtain a filtered output. vccl can also be powered by a bootstrap rectifier/filt er configuration, options allow deriving vccl from either phase 2 or phase 3. additional diodes and capacitors are used to implement a rectifier/filter with a clean dc output as follows, cr4-c33 for vc1; cr5-c9 for vccl derived from phase 3; and cr10-c9 for vccl derived from phase 2. by optimizing drive voltages it is possible to achieve small improvements in efficiency. input voltage jumpers there are three resistors shown in series with each high side fet for the pwms. these are actually zero ohm jumpers that c onnect the desired input voltage 3.3, 5, or 12 volts to the high side fet drain. only one of the three can be installed per phase with the others left open. similarly the ldo has three choices that allow 3.3 volts, 5 volts, or the output of phase 3 to be used for the input. r6 and r56 the resistors shown as r6 and r56 on the schematic are actually jum per wires due to the high currents that can flow in these paths. these are only installed for specific configurations. parallel diodes there are 3 schottky diodes shown in parallel with the lower fets on the pwm output stage. these diodes cr7-8- 9 may not be installed but can be used to help prevent negative spikes on the lower fet drain and will give a slight improvement in efficiency.
lx1671 evaluation board user guide copyright ? 2002 microsemi page 6 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 loadshare methods there are four basic methods used for loadshare that are described in the lx1671 product design guide. numerous components are related to the implementation of these various methods. loadshare filters the low pass filters used for loadshare operation are made up of r18-c22 for the fb2 input and r23-c6 for the rf2 input. typical values are 61.9k and 4700pf. proportional loadshare u2 and u3 are only used if proportional loadshare is desired. several other components around u2 and u3 are also used only with proportional loadshare control. ldo soft start cr6-c27-r27 can be used to ramp the ldo output up slowly if desired. the primary reason for this is to prevent a possible uvlo condition if 5 volts is used for the ldo input. if 5 volts is used for the ldo input and a sudden current demand is placed on it by the ldo load it can result in a transient on the 5 volts that will trigger the uvlo. frequency compensation three resistors r8-13-22 set the gain of the pwm error amplifiers, these ar e typically 200k ohm and three capacitors c23-31-32 can be placed in parallel with the feedback resistors to lower the error amplifier bandwidth. bulk capacitors there are a number of output bulk capacitors. phase one output c10-11; phase 2 output c12-13; phase 3 output c19-26. these are chosen to provide the required output filtering at the output voltage. s ingle p hase / b i -p hase ? loadshare operation of phases 1 and 2 requires several component selections that are factory installed (if ordered for bi-phase operation). if single-phase operation of phase 1 and 2 is desired than modifications must be made as follows. ? remove r6 (jumper wire) - connects phase 1 and 2 outputs together ? remove r23 and c6 - feedback filter to rf2 ? remove c5 and replace with a jumper - phase 2 feedback integrator capacitor ? change r22 to 200k - phase 2 error amplifier gain ? install a jumper for r26 - connects the reference to phase 2 error amplifier positive input rf2 ? remove r18 and c22 - filtered feedback to fb2 ? change r21 to 4.02k ? phase 2 voltage feedback ? select r17 and r20 to give the desired output voltage for phase 2 ? ? ? ? ? ? + = r20 r20 r17 0.8 v out this equation is simplified and does not account for drop across the input resistors due to error amplifier input current. it is suggest ed that input resistors be kept between 1k ohm and 10k ohm to minimize error and noise coupling from surrounding circuits. r equired t est e quipment ? multiple channel oscilloscope with ten to one probes having short ground leads ? digital multimeter ? power source (3.3 volts) if required for pwm input (factory configuration requires +3.3) ? power source (5 volts) with sufficient current for loads (factory conf iguration requires +5) ? power source (12 volts) if required for pwm input or vcx (factory configuration requires +12) resistive loads for all outputs at the required power levels for each output o ptional t est e quipment ? oscilloscope current probe with amplifier ? electronic loads e valuation b oard o peration once all components have been installed power can be applied to the input terminal blocks and initial operation checked with no load. it is recommended that the power supplies used on the input have adjustable current limits that can be set to a low value for initial turn on of a new board. apply all input voltages with current limits set below 1a and enable each output independent ly to verify that all outputs are functional and have the correct output voltage. input power sequencing is not critical. once every output has been verified for proper operation at no-load, a resistive load can be connected to each output (up to the desired output level). it is recommended that each output be loaded individually the first time to insure normal operation
lx1671 evaluation board user guide copyright ? 2002 microsemi page 7 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 and that each fet be checked for safe operating temperature after a few moments of operation at full load. when all outputs hav e been checked at full output current with resi stive loads there are a number of tests that can be performed to evaluate performance. for details of operation see the lx1671 product design guide. e fficiency since efficiency is always of interest it should be measured. variables such as input voltage and output current effect efficiency so any measurements should be made at or close to actual values. efficiency (h) can be expressed as : 100 p p in out = note: there will be voltage drops across the input terminal blocks and zero oh m jumpers that will effect efficiency measurements. the input voltage is best measured directly across the half bridge to obtain accurate results. the output voltage can be measured at the output capacitor. l oad r egulation measure the output voltage at a fixed load and vary the load current over the range of interest. observe the change in output voltage as a function of load current. l ine r egulation measure the output voltage and vary the input voltage over the range of interest. observe the change in output voltage as a function of input voltage. note: the under voltage lockout internal to the lx1671 requires greater than 4.5 volts vcc to operate and the vcc max is 6 volts. if the required input voltage range includes voltages less than 4.5 or more than 6 volts then the high side fet drain must be connected to a separate power supply to isolate it from vcc. o ver c urrent p rotection each output has a current protection limit that can be set to the desired maximum current by a resistor r set . short circuit current limits can be verified either by gradually increasing the load current or by applying a shorting wire across the output. the drain of the lower fet should be monitored with an oscilloscope to insure that the over current limit is functioning properly, during the hiccup period the lower fet will be held on. with a short circuit condition the lx1671 will go into a hiccup mode where the soft start mode is repeatedly cycled to maintain safe fet currents and temperatures. the initial r set value is 1k ohm resulting in a 25a current limit, this will result in safe average fet temperatures and currents. uvlo the vcc and vcx pins are monitored by a under- voltage lockout circuit that will disable the pwm if either voltage is below the preset limit. the input voltages to these pin can be lowered to verify operation. all phases will shutdown if any monitored voltage goes below the threshold. the ldo is not effected by the uvlo. dynamic loads in many applications it is required that the output voltage remain within specified limits for a specified step change in load current. the primary component that influences this specification is the output capacitor. a step change in output current will result in an instantaneous drop in output voltage that is the product of the output capacitor esr and the magnitude of the current st ep. a current step can be applied using either a dynamic load or an external fet switch with an appropriate drain resistor to give the desired current change. a function generator can be used to supply the fet gate drive. the rise time of the current step can be controlled by adding resistance in series with the fet gate to slow down the switching time. o scilloscope w aveforms v ou t inductor current upper fet gate lower fet gate figure 1 ? phase 1 fet gates & output upper and lower gate waveforms along with inductor current and output voltage. note that the duty cycle is 30% corresponding to a 5 volt input with a 1.5 volt output.
lx1671 evaluation board user guide copyright ? 2002 microsemi page 8 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 inductor current lower fet drain voltage lower fet gate figure 2 ? phase 2 fet gates & output lower fet gate drive against its drain voltage and inductor current. note t hat the inductor current ramps up when the lower fet is off (upper fet on) and then ramps down when the lower fet is on. the difference in width between the low gate drive and high drain voltage is the non-overlap period where both fets are off. phase 1 ? lower fet drain voltage phase 1 ? inductor current phase 2 ? inductor current phase 2 ? lower fet drain voltage figure 3 ? phase 1 versus phase 2 bi-phase waveforms of the phase node voltage and inductor currents of phase 1 and 2 operating in bi-phase. the drain voltage waveforms show the 180 degree out-of-phase operation of t he two pwm controllers. the difference in duty cycle is due to phase 1 having a 5 volt input and phase 2 having a 3.3 volt input. if both input voltages were the same the inductor currents would also be 180 degrees out of phase. note the non-overlap period where both fets are off and the drain voltage is slightly below ground. this is caused by the fet body diode conducting due to inductor current flow from ground up to the phase node. when the fet actually turns on the drop is reduced due to the low rds(on) in parallel with the body diode v out soft start out p ut current figure 4 ? soft start and hiccup mode an external switch is periodically connecting a load resistor across the output terminals. the load resistor is low enough to result in current pulses that exceed the current limit threshold determined by the rset resistor. during the soft start interval the output voltage ramps up to the correct value while the current limit circuit limits the peak value of the current pulses. at the end of the soft start interval the next load pulse triggers the hiccup sequence causing the output voltage to go to zero until the end of the hiccup interval when the soft start ramp begins again. this sequence will repeat indefinitely keeping average fet temperatures within acceptable limits.
lx1671 evaluation board user guide copyright ? 2002 microsemi page 9 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 phase 1 & 2 v ou t phase 3 v ou t ldo v ou t +5 pwm input figure 5 ? start-up sequence start-up sequence of phase 1 and 2 in bi-phase versus phase 3 and the ldo when the +5 input is switched on. v ou t i ou t inductor current figure 6 ? phase 2 transient response output voltage and inductor current of phase 3 when a 3 amp current step is applied to the output.
lx1671 evaluation board user guide copyright ? 2002 microsemi page 10 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 schematic dis-3 r 5 n u c2 nu r13 200k + c36 180 4v + c24 180uf - + u3 lmc7101 nu 3 4 1 2 5 +3.3v fb2 cr9 5817 r16 2.21k + c20 680uf cr1 5817 r27 n u c9 1.0uf 4v c28 n u r17 n u +5v +3.3v r7 2.00k c29 n u 2.5v out 2 4 6 8 10 12 r24 3.40k r47 n u l2 5.0uh q1 si4842dy r36 n u +3.3 rtn +5v pw gd tb6 ed120/2ds 1 2 cr4/r40 nu +12v q6 si4842dy 2.5v out tb5 1 2 vout1 r25 1.58k r14 2.00k cr5 nu ji r39 n u c6/r55 4700pf r34 zoj r44 499 r42 10.0 c1 nu 1.5v out r32 n u r15 2.00k lddis r31 zoj + c14 180uf 4v 1 3 5 7 9 11 05/08/02 +12v + c35 +12v cr2 1n5817 1.5v out +5v + c19 100uf 16v r45 zoj r9 2.00k r21 61.9k rtn r18 61.9k r1 zoj + c21 470uf dis-1 cr6 nu c23 n u + c13 x1 +5v cr8 5817 q9 nds7002a vout1 r10 4.25k +5v r8 200k vout3 + c12 270uf 2v r38 zoj original ecn #298 release revisions ltr description dat e a pp r dis-3 c5 4700p f + c17 180uf q5 si4842dy q2 si4842dy tb4 1 2 lx1671 eval - 010 x1 schematic, lx1671 mlp evaluation board b es282 5 1 1 - title size drawing no: re v date: sheet of drawn by checked by a pproved by a pproved by model no.: dis-1 c27 nu 16v r48 n u q7 si4842dy r52 n u 4v cr10 nu +5v c22/r20 4700pf +5v +5v r46 n u +5v r50 100 r43 n u r22 2.00k vout1 r3 nu c33 .22 + c18 150uf 6v rtn r 4 n u +5v r 6 jumpe r c8 4.7uf tb7 1 2 +3.3v dis-2 tb1 1 2 6.3v c25 n u vout4 + c11 +12v +5v cr3 1n581 7 r2 zoj +3.3v c3 .33uf + c10 270uf 2v c26 .22uf r51 n u +5 vin r28 20k q3 sud45n05-20l vout3 tb2 1 2 cr7 5817 r56 n u dis-2 c7 .22uf r30 20k q10 nds7002a dis-2 + c16 q8 nds7002a r54 n u zoj r53 r49 n u +5 rtn vout1 - + u2 lmc7101 nu 3 4 1 2 5 c31 n u r23 61.9k +12v + c34 100uf 16v +12v vout3 lddis +12 vin c30 n u rtn dis-1 +3.3v fb2 l 3 5.0uh r29 20k r41 zoj +12 rtn pw gd q4 si4842dy vout2 r35 nu - +12v r26 n u r12 2.00k r19 2.00k tb3 1 2 c4 .1uf l1 5.0uh u1 lx1671-clq 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 33 31 32 34 35 36 37 38 1 2 3 4 lddis dgnd a gnd rsvd ss2 rf2 fb2 eo2 cs 2 vs 2 ss 1 fb 1 eo 1 cs 1 vs 1 ss3 fb3 eo3 n/c cs3 vs3 n/c n/c vcc vccl pg3 vc 3 lo3 ho 3 vc 1 ho 1 lo 1 pg 1 lo 2 ho2 vc2 ldgd ldfb r37 zoj r11 2.00k +3.3 vin + c15 180 4v rtn c32 n u r33 n u figure 7 ? lx1671 eval ?010 schematic
lx1671 evaluation board user guide copyright ? 2002 microsemi page 11 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 bill of materials lx1671 eval -010 miscellaneous components line item part description manufacturer & part # case reference designators qty 1 int. ckt, multi-phase pwm m icrosemi lx1671clq mlpq u1 1 2 fab, pwb, eval board x1 m icrosemi sge2825x1 1 3 diode, schottky, 1a 20v m icrosemi ups5817 pwrmite cr1,cr7, cr8,cr9 4 4 inductor, power, 5h, 6.5a c ooper ctx5-4a smd l1-l3 3 5 trans, n-channel, 30v, 6m ? , 19a, 35nc max v ishay si4842dy so-8 q1, q2, q4-q7 6 6 trans, n-channel, 30v, 18m ? , 50a v ishay sud45n05-20l to-252 q3 1 7 trans, n-channel, 60v, 2 ? f airchild nds7002a sot-23 q8, q9, q10 3 8 terminal block, 2pin sge2442-2 tb1-b7 7 9 header, 12pin, 2x6 dual row j1 1 capacitors line item part description manufacturer & part # case reference designators qty 1 4.7f, 16v, ceramic t aiyo yuden emk316bj475ml 1206 c8 1 2 0.1f, 25v, 10% r ohm mch182cn104kk 0805 c4, c26, c33 3 3 0.22f, 25v, 10% r ohm mch182cn224kk 0805 c2,c7,c7,c25,c26 4 4 0.33f, 25v, 10% r ohm mch182cn334kk 0805 c3 1 5 4700pf, 25v, 10% r ohm mch182cn472kk 0805 c5, c6, c22 3 6 270f, 2v, poly elect cde esre271m02b d7.3x4.3 c10-c13 4 7 180f, 4v, poly elect cde esre181m04b d7.3x4.3 c14-c17, c24,c36 6 8 150f, 6v, poly elect cde esre151m06b d7.3x4.3 c18,c35 2 9 100f, 16v, poly elect nec nrd107m16 d7.3x4.3 c19,c34 2 10 680f, 6.3v, 20% poly f ujitsu fp-063re681m-r 10x10.5 c20 1 11 470f, 16v, 20%, al-el p anasonic eeu-fc1c471 10x10.5 c21 1 12 1f, 16v, ceramic t aiyo yuden emk316bj105ml 1206 c9 1 resistors line item part description manufacturer & part # case reference designators qty 1 0 ? jumper r ohm sge2372-5 0805 r3 r31, r34, r37, r41,r43, r45, r50, r53 9 2 0 ? jumper r ohm buss wire #18ga r6 1 4 2k, 1%, 1/8w r ohm mcr10f2001 0805 r7, r9, r11, r12, r14, r15, r19, r22 8 5 200k, 1%, 1/8w r ohm mcr10f2003 0805 r8, r13 2 6 4.25k, 1%, 1/8w r ohm mcr10f4251 0805 r10 1 7 2.21k, 1%, 1/8w r ohm mcr10f2211 0805 r16 1 8 61.9k, 1%, 1/8w r ohm mcr10f6192 0805 r18, r21, r23 3 9 3.402k, 1%, 1/8w r ohm mcr10f3401 0805 r24 1 10 1.58k, 1%, 1/8w r ohm mcr10f1581 0805 r25 1 11 20k, 1%, 1/8w r ohm mcr10f2002 0805 r28-r30 3 figure 8
lx1671 evaluation board user guide copyright ? 2002 microsemi page 12 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 pcb silk screen
lx1671 evaluation board user guide copyright ? 2002 microsemi page 13 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 figure10 component side layer 1 1. power ground 2. phase 1 vout 3. phase 2 vout 4. power ground 5. phase 2 phase node 6. phase 3 input 7. phase 3 vout 8. phase 3 phase node 9. power ground 10. phase 2 input 11. phase 1 input 12. ldo input 13. phase 1 phase node
lx1671 evaluation board user guide copyright ? 2002 microsemi page 14 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 pcb layout / layers figure 11 ? ground plane layer 2 1. phase 1 phase node 2. phase 2 phase node 3. analog ground figure 12 - +5v plane layer 3
lx1671 evaluation board user guide copyright ? 2002 microsemi page 15 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 pcb layout / layers 1. phase 1 input 2. phase 2 input 3. phase 3 input figure 13 - +12v plane layer 4 1. phase 3 phase node 2. phase 3 vout figure 14 - +3.3v plane layer 5
lx1671 evaluation board user guide copyright ? 2002 microsemi page 16 rev 0.2d, 8/8/2002 integrated products 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 pcb layout / layers 1. phase 2 vout 2. phase 1 vout 3. ldo input figure 15 ? layer 6 (solder side view)

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