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as5163 12-bit automotive angle position sensor www.austriamicrosystems.com/as5163 revision 2.7 1 - 36 datasheet 1 general description the as5163 is a contactless magnetic angle position sensor for accurate angular measurement over a full turn of 360o. a sub range can be programmed to achieve the best resolution for the application. it is a system-on-chip, combining integrated hall elements, analog front-end, digital signal processing and best in class automotive protection features in a single device. to measure the angle, only a simple two-pole magnet, rotating over the center of the chip, is required. the magnet may be placed above or below the ic. the absolute angle measurement provides instant indication of the magnet?s angular position with a resolution of 0.022o = 16384 positions per revolution. according to this resolution the adjustment of the application specific mechanical positions are possible. the angular output data is available over a 12-bit pwm signal or 12-bit ratiometric analog output. the as5163 operates at a supply voltage of 5v and the supply and output pins are protected against overvoltage up to +27v. in addition, the supply pins are protected against reverse polarity up to -18v. figure 1. as5163 block diagram 2 key features 360o contactless high resolution angular position encoding user programmable start and end point of the application region user programmable clamping levels and programming of the transition point powerful analog output - short circuit monitor - high driving capability for resistive and capacitive loads wide temperature range: -40oc to +150oc small pb-free package: 14-pin tssop broken gnd and vdd detection over a wide range of different load conditions 3 applications the as5163 is ideal for automotive applications like throttle and valve position sensing, gearbox position sensor, headlight position control, torque sensing, pedal position sensing and non contact potentiometers. gnd out sin cos single pin interface 12 out driver kdown high voltage/ reverse polarity protection angle programable angle zero position vdd vdd5 vdd3 12-bit dac as5163 otp register cordic 14-bit hall array frontend amplifier adc output dsp 12-bit pwm m u x
www.austriamicrosystems.com/as5163 revision 2.7 2 - 36 as5163 datasheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features................................................................................................................ ............................................................. 1 3 applications................................................................................................................ ............................................................... 1 4 pin assignments ............................................................................................................. .......................................................... 3 4.1 pin descriptions.......................................................................................................... .......................................................................... 3 5 absolute maximum ratings .................................................................................................... .................................................. 4 6 electrical characteristics.................................................................................................. ......................................................... 5 6.1 operating conditions...................................................................................................... ...................................................................... 5 6.2 magnetic input specification.............................................................................................. ................................................................... 5 6.3 electrical system specifications.......................................................................................... ................................................................. 6 6.4 timing characteristics .................................................................................................... ...................................................................... 6 7 detailed description........................................................................................................ .......................................................... 7 7.1 operation................................................................................................................. ............................................................................. 8 7.1.1 vdd voltage monitor ..................................................................................................... .............................................................. 8 7.2 analog output............................................................................................................. .......................................................................... 9 7.2.1 programming parameters.................................................................................................. .......................................................... 9 7.2.2 application specific angular ra nge programming .......................................................................... ............................................ 9 7.2.3 application specific programming of the break point ..................................................................... .......................................... 10 7.2.4 full scale mode ......................................................................................................... ................................................................ 10 7.2.5 resolution of the parameters ............................................................................................ ........................................................ 11 7.2.6 analog output diagnostic mode ........................................................................................... ..................................................... 12 7.2.7 analog output driver parameters......................................................................................... ..................................................... 12 7.3 pulse width modulation (pwm) output....................................................................................... ....................................................... 13 7.4 kick down function........................................................................................................ .................................................................... 14 8 application information ..................................................................................................... ...................................................... 16 8.1 programming the as5163 .................................................................................................... .............................................................. 16 8.1.1 hardware setup.......................................................................................................... ............................................................... 16 8.1.2 protocol timing and commands of single pin interface .................................................................... ....................................... 17 8.1.3 unblock ................................................................................................................. ................................................................ 19 8.1.4 write128 ................................................................................................................ ................................................................. 20 8.1.5 read128................................................................................................................. .................................................................. 21 8.1.6 download................................................................................................................ .............................................................. 22 8.1.7 upload .................................................................................................................. .................................................................. 22 8.1.8 fuse .................................................................................................................... ..................................................................... 22 8.1.9 pass2func ............................................................................................................... .............................................................. 23 8.1.10 read................................................................................................................... .................................................................... 23 8.1.11 write .................................................................................................................. ................................................................... 24 8.2 otp programming data ...................................................................................................... ............................................................... 25 8.2.1 read / write user data.................................................................................................. ............................................................ 30 8.2.2 programming procedure................................................................................................... ......................................................... 30 8.2.3 physical placement of the magnet ........................................................................................ .................................................... 31 8.2.4 magnet placement........................................................................................................ ............................................................. 31 9 package drawings and markings ............................................................................................... ............................................ 32 10 ordering information....................................................................................................... ...................................................... 35
www.austriamicrosystems.com/as5163 revision 2.7 3 - 36 as5163 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 1 provides the description of each pin of the standard tssop14 package (14-lead thin shrink small outline package) (see figure 2) . table 1. pin descriptions pin number pin name pin type description 1 vdd supply pin positive supply pin. this pin is high voltage protected. 2 vdd5 supply pin 4.5v- regulator output, internally regulated from vdd. this pin needs an external ceramic capacitor of minimum 2.2 f. 3nc dio/aio multi purpose pin test pin for fabrication. connected to ground in the application board. 4 vdd3 supply pin 3.45v- regulator output, intern ally regulated from vdd5. this pin needs an external ceramic capacitor of minimum 2.2 f. 5 gnda supply pin analog ground pin. connected to ground in the application board. 6nc dio/aio multi purpose pin test pin for fabrication. connected to ground in the application board. 7nc dio/aio multi purpose pin test pin for fabrication. open in the application. 8 gndd supply pin digital ground pin. connected to ground in the application board. 9nc dio/aio multi purpose pin test pins for fabrication. connected to ground in the application board. 10 nc dio/aio multi purpose pin 11 kdown digital output open drain additional output pin with kick down functionality. this pin can be used for a compare function including a hysteresis. an open drain configuration is used. if the internal angle is above a programmable threshold, then the output is switched to low. below the threshold the output is high using a pull-up resistor. 12 gndp supply pin analog ground pin. connected to ground in the application board. 13 nc dio/aio multi purpose pin test pin for fabrication. connected to ground in the application board. 14 out dio/aio multi purpose pin output pin. this pin is used for the analog output or digital pwm signal. in addition, this pin is used for programming of the device. as5163 1 2 3 4 5 6 7 8 10 14 13 12 11 vdd5 nc vdd nc vdd3 gnda nc nc out kdown nc gndd 9 gndp nc
www.austriamicrosystems.com/as5163 revision 2.7 4 - 36 as5163 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 5 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings symbol parameter min max units comments electrical parameters v dd dc supply voltage at pin vdd overvoltage -18 27 v no operation v out output voltage out -0.3 27 v permanent v kdown output voltage kdown -0.3 27 v vdd3 dc supply voltage at pin vdd3 -0.3 5 v vdd5 dc supply voltage at pin vdd5 -0.3 7 v i scr input current (latchup immunity) -100 100 ma norm: jedec 78 electrostatic discharge esd electrostatic discharge 4 kv norm: mil 883 e method 3015 this value is applicable to pins vdd, gnd, out, and kdown. all other pins 2 kv. temperature ranges and storage conditions t strg storage temperature -55 +150 oc min -67of; max +257of t body body temperature (lead-free package) 260 oc t=20 to 40s, the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020 ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices ?. the lead finish for pb-free leaded packages is matte tin (100% sn). h humidity non-condensing 585% moisture sensitive level 3 represents a maximum floor life time of 168h
www.austriamicrosystems.com/as5163 revision 2.7 5 - 36 as5163 datasheet - electrical characteristics 6 electrical characteristics 6.1 operating conditions in this specification, all the defined tolerances for external components need to be assured over the whole operation condition s range and also over lifetime. t amb = -40 to +150oc, vdd = +4.5v to +5.5v, clreg5 = 2.2f, clreg3 = 2.2f, r pu = 1k , r pd = 1k to 5.6k (analog only), c load = 0 to 42nf, r pukdwn = 1k to 5.6k , c load_kdwn = 0 to 42nf, unless otherwise specified. a positive current is intended to flow into the pin. 6.2 magnetic input specification t amb = -40 to +150oc, vdd = 4.5 to 5.5v (5v operation), unless otherwise noted. two-pole cylindrical diamet rically magnetized source: table 3. operating conditions symbol parameter conditions min typ max units t amb ambient temperature -40of?+302of -40 +150 oc i supp supply current lowest magnetic input field 20 ma table 4. magnetic input specification symbol parameter conditions min typ max units b pk magnetic input field amplitude required vertical component of the magnetic field strength on the die?s surface, measured along a concentric circle with a radius of 1.1mm 30 70 mt b off magnetic offset constant magnetic stray field 10 mt field non-linearity including offset gradient 5 %
www.austriamicrosystems.com/as5163 revision 2.7 6 - 36 as5163 datasheet - electrical characteristics 6.3 electrical syst em specifications t amb = -40 to +150oc, vdd = 4.5 - 5.5v (5v operation), magnetic input specification , unless otherwise noted. note: the inl performance is specified over the full turn of 360 degrees. an operation in an angle segment increases the accuracy. a two point linearization is recommended to achieve the best inl performance for the chosen angle segment. 6.4 timing characteristics table 5. electrical system specifications symbol parameter conditions min typ max units res resolution analog and pwm output angular operating range 90oc 12 bit inl opt integral non-linearity (optimum) 360 degree full turn maximum error with respect to the best line fit. centered magnet without calibration, t amb =25oc 0.5 deg inl temp integral non-linearity (optimum) 360 degree full turn maximum error with respect to the best line fit. centered magnet without calibration, t amb = -40 to +150oc 0.9 deg inl integral non-linearity 360 degree full turn best line fit = (err max ? err min ) / 2 over displacement tolerance with 6mm diameter magnet, without calibration, t amb = -40 to +150oc. note: this parameter is a system parameter and is dependant on the selected magnet. 1.4 deg tn transition noise 1 sigma; note: the noise performance is dependent on the programming of the output characteristic. 0.06 deg rms vdd5 lowth undervoltage lower threshold vdd5 = 5v 3.1 3.4 3.7 v vdd5 highth undervoltage higher threshold 3.6 3.9 4.2 t pwrup power-up time fast mode, times 2 in slow mode 10 ms t delay system propagation delay absolute output: delay of adc, dsp and absolute interface fast mode, times 2 in slow mode 100 s table 6. timing conditions symbol parameter conditions min typ max units frcot internal master clock 4.05 4.5 4.95 mhz tclk interface clock time tclk = 1/ frcot 202 222.2 247 ns tdetwd watchdog error detection time 12 ms
www.austriamicrosystems.com/as5163 revision 2.7 7 - 36 as5163 datasheet - detailed description 7 detailed description the as5163 is manufactured in a cmos process and uses a spinning current hall technology for sensing the magnetic field distrib ution across the surface of the chip. the integrated hall elements are placed around the center of the device and deliver a voltage representation of the magnetic fi eld at the surface of the ic. through sigma-delta analog / digital conversion and digital signal-processing (dsp) algorithms, the as5163 provides accurate hi gh-resolution absolute angular position information. for this purpose, a coordinate rotation digital computer (cordic) calculates the angle a nd the magnitude of the hall array signals. the dsp is also used to provide digital information at the outputs that indicate movements of the used magnet towards or away f rom the device?s surface. a small low cost diametrically magnetized (two-pole) standard magnet provides the angular position information. the as5163 senses the orientation of the magnetic field and calculates a 14-bit binary code. this code is mapped to a programma ble output characteristic. the type of output is programmable and can be selected as pwm or analog output. this signal is available at the pin 14 ( out ). the analog and pwm output can be configured in many ways. the application angular region can be programmed in a user friendly w ay. the start angle position t1 and the end point t2 can be set and programmed according to the mechanical range of the application with a resolution of 14 bits. in addition, the t1y and t2y parameter can be set and programmed according to the application. the transition point 0 to 360 degree can be shifted using the break point parameter bp . this point is programmable with a high resolution of 14 bits of 360 degrees. the voltage for clamping level low cll and clamping level high clh can be programmed with a resolution of 7 bits. both levels are individually adjustable. these parameters are also used to adjust the pwm duty cycle. the as5163 also provides a compare function. the internal angular code is compared to a programmable level using hysteresis. th e function is available over the output pin 11 ( kdown ). the output parameters can be programmed in an otp register. no additional voltage is required to program the as5163. the settin g may be overwritten at any time and will be reset to default when power is cycled. to make the setting permanent, the otp register must be programmed by using a lock bit. else, the content could be frozen for ever. the as5163 is tolerant to magnet misalignment and unwanted external magnetic fields due to differential measurement technique a nd hall sensor conditioning circuitry. figure 3. typical arrangement of as5163 and magnet
www.austriamicrosystems.com/as5163 revision 2.7 8 - 36 as5163 datasheet - detailed description 7.1 operation the as5163 operates at 5v 10%, using two internal low-dropout (l do) voltage regulators. for operation, the 5v supply is connec ted to pin vdd . while vdd3 and vdd5 (ldo outputs) must be buffered by 2.2f capacitors, the vdd requires a 1f capacitor. all capacitors (low esr ceramic) are supposed to be placed close to the supply pins (see figure 4) . the vdd3 and vdd5 outputs are intended for internal use only. it must not be loaded with an external load. figure 4. connections for 5v supply voltages 7.1.1 vdd voltage monitor vdd overvoltage management. if the voltage applied to the vdd pin exceeds the overvoltage upper threshold for longer than the detection time, then the device enters a low power mode reducing the power consumption. when the overvoltage event has passed and the vol tage applied to the vdd pin falls below the overvoltage lower threshold for longer than the recovery time, then the device enters th e normal mode. vdd5 undervoltage management. when the voltage applied to the vdd5 pin falls below the undervoltage lower threshold for longer than the vdd5_detection time, then the device stops the clock of the digital part and the output drivers are turned off to reduce th e power consumption. when the voltage applied to the vdd5 pin exceeds th e vdd5 undervoltage upper threshold for longer than the vdd5_re covery time, then the clock is restarted and the output drivers are turned on. notes: 1. the pins vdd3 and vdd5 must always be buffered by a capacitor. these pins must not be left floating, as this may cause unstable internal supply voltages, which may lead to larger output jitter of the measured angle. 2. only vdd is overvoltage protected up to 27v. in addition, the vdd has a reverse polarity protection. 2.2f 1 f 4. 5 - 5.5v vdd 5 gnd vdd 5v operation internal vdd 4. 5 v ldo internal vdd 3.45v vdd 3 ldo 2.2f
www.austriamicrosystems.com/as5163 revision 2.7 9 - 36 as5163 datasheet - detailed description 7.2 analog output the reference voltage for the digital-to-analog converter (dac) is taken internally from vdd . in this mode, the output voltage is ratiometric to the supply voltage. 7.2.1 programming parameters the analog output voltage modes are programmable by otp. depending on the application, the analog output can be adjusted. the u ser can program the following application specific parameters: the above listed parameters are input parameters. over the provided programming software and programmer, these parameters are c onverted and finally written into the as5163 128-bit otp memory. 7.2.2 application specific angular range programming the application range can be selected by programming t1 with a related t1y and t2 with a related t2y into the as5163. the internal gain factor is calculated automatically. the clamping levels cll and clh can be programmed independent from the t1 and t2 position and both levels can be separately adjusted. figure 5. programming of an individual application range figure 5 shows a simple example of the selection of the range. the mechanical starting point t1 and the mechanical end point t2 define the mechanical range. a sub range of the internal cordic output range is used and mapped to the needed output characteristic. the a nalog output signal has 12 bit, hence the level t1y and t2y can be adjusted with this resolution. as a result of this level and the calculated slope the clamping region low is defined. the break point bp defines the transition between cll and clh . in this example, the bp is set to 0 degree. the bp is also the end point of the clamping level high clh . this range is defined by the level clh and the calculated slope. both clamping levels can be set independently form each other. the minimum application range is 10 degrees. t1 mechanical angle start point t2 mechanical angle end point t1y voltage level at the t1 position t2y voltage level at the t2 position cll clamping level low clh clamping level high bp break point (transition point 0 to 360 degree) t1 t2 cll clh bp t1 t2 100%vdd 0 application range t1y t2y cll clh mechanical range electrical range clamping range low clamping range high 270 degree 0 degree 180 degree 90 degree
www.austriamicrosystems.com/as5163 revision 2.7 10 - 36 as5163 datasheet - detailed description 7.2.3 application specific pr ogramming of the break point the break point bp can be programmed as well with a resolution of 14 bits. this is important when the default transition point is inside the application range. in such a case, the default transition point must be shifted out of the application range. the parameter bp defines the new position. the function can be used also for an on-off indication. figure 6. individual programming of the break point bp 7.2.4 full scale mode the as5163 can be programmed as well in the full scale mode. the bp parameter defines the position of the transition. figure 7. full scale mode for simplification, figure 7 describes a linear output voltage from rail to rail (0v to vdd) over the complete rotation range. in practice, this is not feasible due to saturation effects of the output stage transistors. the actual curve will be rounded towards the supply rails ( as indicated figure 7 ). t1 t2 cll clh bp t1 t2 100%vdd 0 application range t1y t2y cll clh mechanical range electrical range clamping range low clamping range high 270 degree 0 degree 180 degree 90 degree clamping range low analog output voltage 0 100 % vdd 360
www.austriamicrosystems.com/as5163 revision 2.7 11 - 36 as5163 datasheet - detailed description 7.2.5 resolution of the parameters the programming parameters have a wide resolution of up to 14 bits. figure 8. overview of the angular output voltage figure 8 gives an overview of the different ranges. the failure bands are used to indicate a wrong operation of the as5163. this can be caused due to a broken supply line. by using the specified load resistors, the output level will remain in these bands during a fail. it is recommended to set the clamping level cll above the lower failure band and the clamping level clh below the higher failure band. table 7. resolution of the programming parameters symbol parameter resolution note t1 mechanical angle start point 14 bits t2 mechanical angle stop point 14 bits t1y mechanical start voltage level 12 bits t2y mechanical stop voltage level 12 bits cll clamping level low 7 bits 4096 lsbs is the maximum level clh clamping level high 7 bits 31 lsbs is the minimum level bp break point 14 bits clamping region low failure band low 0 4 cll clh 96 100 output voltage in percent of vdd failure band high application region clamping region high t2y t1y
www.austriamicrosystems.com/as5163 revision 2.7 12 - 36 as5163 datasheet - detailed description 7.2.6 analog output diagnostic mode due to the low pin count in the application, a wrong operation must be indicated by the output pin out . this could be realized using the failure bands. the failure band is defined with a fixed level. the failure band low is specified from 0% to 4% of the supply range. the failure band high is defined from 100% to 96%. several failures can happen during operation. the output signal remains in these bands over the sp ecified operating and load conditions. all the different failures can be grouped into the internal alarms (failures) and the applicatio n related failures. c load 42 nf, r pu = 2k?5.6k r pd = 2k?5.6k load pull-up for efficient use of diagnostics, it is recommended to program to clamping levels cll and clh . 7.2.7 analog output driver parameters the output stage is configured in a push-pull output. therefore it is possible to sink and source currents. c load 42 nf, r pu = 2k?5.6k r pd = 2k?5.6k load pull-up note: a pull-up/down load is up to 1k with increased diagnostic bands from 0%-6% and 94%-100%. table 8. different failure cases of as5163 type failure mode symbol failure band note internal alarms (failures) out of magnetic range (too less or too high magnetic input) magrng high/low could be switched off by one otp bit alarm_disable . programmable by otp bit diag_high cordic overflow cof high/low programmable by otp bit diag_high offset compensation finished ocf high/low programmable by otp bit diag_high watchdog fail wdf high/low programmable by otp bit diag_high oscillator fail of high/low programmable by otp bit diag_high application related failures overvoltage condition ov high/low dependant on the load resistor pull up failure band high pull down failure band low broken vdd bvdd broken vss bvss short circuit output sco high/low switch off short circuit dependent table 9. general parameters for the output driver symbol parameter min typ max unit note ioutscl short circuit output current (low side driver) 832mav out =27v ioutsch short circuit output current (high side driver) -8 -32 ma v out =0v tscdet short circuit detection time 20 600 s output stage turned off tscrec short circuit recovery time 2 20 ms output stage turned on ileakout output leakage current -20 20 a v out =vdd=5v bgndpu output voltage broken gnd with pull-up 96 100 %vdd r pu = 2k?5.6k bgndpd output voltage broken gnd with pull-down 04%vdd r pd = 2k?5.6k bvddpu output voltage broken vdd with pull-up 96 100 %vdd r pu = 2k?5.6k bvddpd output voltage broken vdd with pull-down 04%vdd r pd = 2k?5.6k
www.austriamicrosystems.com/as5163 revision 2.7 13 - 36 as5163 datasheet - detailed description 7.3 pulse width modulation (pwm) output the as5163 provides a pulse width modulated output (pwm), whose duty cycle is proportional to the measured angle. this output f ormat is selectable over the otp memory op_mode(0) bit. if output pin out is configured as open drain configuration, then an external load resistor (pull up) is required. the pwm frequency is internally trimmed to an accuracy of 10% over full temperature range. this toleran ce can be cancelled by measuring the ratio between the on and off state. in addition, the programmed clamping levels cll and clh will also adjust the pwm signal characteristic. figure 9. pwm output signal table 10. electrical parameters for the analog output stage symbol parameter min typ max unit note vout output voltage range 496 % vdd 6 94 valid when 1k r load < 2k voutinl output integral nonlinearity 10 lsb voutdnl output differential nonlinearity -10 10 lsb voutoff output offset -50 50 mv at 2048 lsb level voutud update rate of the output 100 s info parameter voutstep output step response 550 s between 10% and 90%, r pu /r pd =1k , c load =1nf; vdd=5v voutdrift output voltage temperature drift 2 2 % of value at mid code voutrate output ratiometricity error -1.5 1.5 %vdd 0.04*vdd vout 0.96*vdd voutnoise noise 1 1. not tested in production; characterization only. 10 mvpp 1hz?30khz; at 2048 lsb level position 1 position 4094 position 0 position 4095 pw min pw max t pwm = 1/f pwm
www.austriamicrosystems.com/as5163 revision 2.7 14 - 36 as5163 datasheet - detailed description the pwm frequency can be programmed by the otp bits pwm_frequency (1:0) . therefore, four different frequencies are possible. taking into consideration the ac characteristic of the pwm output including load, it is recommended to use the clamping functio n. the recommended range is 0% to 4% and 96% to 100%. 7.4 kick down function the as5163 provides a special compare function. this function is implemented using a programmable angle value with a programmab le hysteresis. it will be indicated over the open drain output pin kdown . if the actual angle is above the programmable value plus the hysteresis, the output is switched to low. the output will remain at low level until the value kd is reached in the reverse direction. figure 10. kick down hysteresis implementation table 11. pwm signal parameters symbol parameter min typ max unit note f pwm1 pwm frequency1 123.60 137.33 151.06 hz pwm_frequency (1:0) = ?00? f pwm2 pwm frequency2 247.19 274.66 302.13 hz pwm_frequency (1:0) = ?01? f pwm3 pwm frequency3 494.39 549.32 604.25 hz pwm_frequency (1:0) = ?10? f pwm4 pwm frequency4 988.77 1098.63 1208.50 hz pwm_frequency (1:0) = ?11? pw min min pulse width (1+1)*1/ f pwm s pw max max pulse width (1+4094)*1/ f pwm ms table 12. electrical parameters for the pwm output mode symbol parameter min typ max unit note pwmvol output voltage low 0 0.4 v i out =8ma ileak output leakage -20 20 a v out =vdd=5v pwmdc pwm duty cycle range 4 96 % pwmsrf pwm slew rate 1 2 4 v/s between 75% and 25% r pu /r pd = 1k , c load = 1nf, vdd = 5v kdown kd(5:0) kdhys kd(5:0)+kdhys
www.austriamicrosystems.com/as5163 revision 2.7 15 - 36 as5163 datasheet - detailed description pull-up resistance 1k to 5.6k to vdd c load max 42nf table 13. programming parameters for the kick down function symbol parameter resolution note kd kick down angle 6 bits kdhys kick down hysteresis 2 bits kdhys (1:0) = ?00? 8 lsb hysteresis kdhys (1:0) = ?01? 16 lsb hysteresis kdhys (1:0) = ?10? 32 lsb hysteresis kdhys (1:0) = ?11? 64 lsb hysteresis table 14. electrical parameters of the kdown output symbol parameter min typ max unit note ikdsc short circuit output current (low side driver) 624ma v kdown = 27v tscdet short circuit detection time 20 600 s output stage turned off tscrec short circuit recovery time 220ms output stage turned on kdvol output voltage low 01.1v i kdown = 6ma kdileak output leakage -20 20 a v kdown = 5v kdsrf kdown slew rate (falling edge) 12 4v/s between 75% and 25%, r pukdwn = 1k , c load_kdwn = 1nf, vdd = 5v
www.austriamicrosystems.com/as5163 revision 2.7 16 - 36 as5163 datasheet - application information 8 application information the benefits of as5163 are as follows: unique fully differential patented solution best protection for automotive applications easy to program flexible interface selection pwm, analog output ideal for applications in harsh environments due to contactless position sensing robust system, tolerant to magnet misalignment, airgap variations, temperature variations and external magnetic fields no calibration required because of inherent accuracy high driving capability of analog output (including diagnostics) 8.1 programming the as5163 the as5163 programming is a one-time-programming (otp) method, based on polysilicon fuses. the advantage of this method is that no additional programming voltage is needed. the internal ldo provides the current for programming. the otp consists of 128 bits, wherein several bits are available for user programming. in addition, factory settings are stored in the otp memory. both regions are independently lockable by built-in lock bits. a single otp cell can be programmed only once. by default, each cell is ?0?; a programmed cell will contain a ?1?. while it is not possible to reset a programmed bit from ?1? to ?0?, multiple otp writes are possi ble, as long as only unprogrammed ?0?-bits are programmed to ?1? . independent of the otp programming, it is possible to overwrite t he otp register temporarily with an otp write command. this is possible only if the user lock bit is not programmed. due to the programming over the output pin, the device will initially start in the communication mode. in this mode, the digita l angle value can be read with a specific protocol format. it is a bidirectional communication possible. parameters can be written into the device. a programming of the device is triggered by a specific command. with another command (pass2funcion), the device can be switched into operation mode (analog or pwm output). in case of a programmed user lock bit, the as5163 automatically starts up in the functional operation mode. no com munication of the specific protocol is possible after this. 8.1.1 hardware setup the pin out and the supply connection are required for otp memory access. without the programmed mem_lock_user otp bit, the device will start up in the communication mode and will remain into an idle operation mode. the pull up resistor r communication is required during startup. figure 1 shows the configuration of an as5163. figure 11. programming schematic of the as5163 vdd3 gnd vdd5 gnda 2.2 f (low esr) 0.3 ohm out vdd sensor pcb programmer 2.2 f (low esr) 1 f kdown vdd gndd gndp r communication vdd gnd dio as5163
www.austriamicrosystems.com/as5163 revision 2.7 17 - 36 as5163 datasheet - application information 8.1.2 protocol timing and commands of single pin interface during the communication mode, the output level is defined by the external pull up resistor r communication . the output driver of the device is in tri- state. the bit coding (see figure 18) has been chosen in order to allow the continuous synchronization during the communication, which can be required due to the tolerance of the internal clock frequency. figure 18 shows how the different logic states '0' and '1' are defined. the period of the clock t clk is defined with 222.2 ns. the voltage levels v h and v l are cmos typical. each frame is composed by 20 bits. the 4 msb (cmd) of the frame specifies the type of command that is passed to the as5163. the 16 data bits contain the communication data. there will be no operation when the ?not specified? cmd is used. the sequence is oriented in such a way that the lsb of the data is followed by the command. the number of frames vary depending on the command. the single pin program ming interface block of the as5163 can operate in slave communication or master communication mode. in the slave communication mode, the as5163 receives the data organized in frames. the programming tool is the driver of the single communication line and can pull down the level. in case of the master communication mode, the as5163 transmits data in the frame format. the single communication line can be p ulled down by the as5163. figure 12. bit coding of the single pin programming interface figure 13. protocol definition bit ?0? bit ?1? t 1 t 2 t 1 t 2 v h v l v h v l t 1 = 128 * t clk t bit = t 1 + t 2 = 512 * t clk t 2 = 384 * t clk packet idle start idle start command data
www.austriamicrosystems.com/as5163 revision 2.7 18 - 36 as5163 datasheet - application information note: other commands are reserved and shall not be used. when single pin programming interface bus is in high impedance state, the logical level of the bus is held by the pull up resis tor r communication . each communication begins by a condition of the bus level which is called start. this is done by forcing the bus in logical low level (done by the programmer or as5163 depending on the communication mode). afterwards the bit information of the command is transmitted as shown in figure 14 . figure 14. bus timing for the write128 command figure 15. bus timing for the read128 command table 15. otp commands and communication interface modes possible interface commands description as5163 communication mode command cmd number of frames unblock resets the interface slave 0x0 1 write128 writes 128 bits (user + factory settings) into the device slave 0x9 (0x1) 8 read128 reads 128 bits (user + factory settings) from the device slave and master 0xa 9 upload transfers the register content into the otp memory slave 0x6 1 download transfers the otp content to the register content slave 0x5 1 fuse command for permanent programming slave 0x4 1 pass2func change operation mode from communication to operation slave 0x7 1 read read related to address the user data slave and master 0xb 2 write write related to address the user data slave 0xc 1 lsb lsb msb lsb msb lsb msb 11 00 lsb msb lsb msb lsb msb 10 00 data1 data0 data3 data2 10 00 data14 msb 20*tbit start idle idle lsb msb lsb msb lsb msb 01 10 lsb msb lsb msb p 000 data1 data0 p 000 data14 msb 20*tbit do not care do not care slave communication mode master communication mode tsw lsb data3 idle start
www.austriamicrosystems.com/as5163 revision 2.7 19 - 36 as5163 datasheet - application information in case of read or read128 command (see figure 15) the idle phase between the command and the answer is 10 tbit (tsw). figure 16. bus timing for the read commands in case of a write command, the device stays in slave communication mode and will not switch to master communication mode. when using other commands like download, upload, etc. instead of r ead or write, it does not matter what is written in the addre ss fields (addr1, addr2). 8.1.3 unblock the unblock command can be used to reset only the one-wire interface of the as5163 in order to recover the possibility to commu nicate again without the need of a por after a stacking event due to noise on the bus line or misalignment with the as5163 protocol. the command is composed by a not idle phase of at least 6 tbit followed by a packet with all 20 bits at zero (see figure 17) . figure 17. unblock sequence idle lsb msb lsb msb lsb msb 01 10 lsb msb lsb msb p 00 0 data1 data0 20*tbit addr2 addr1 slave communication mode master communication mode tsw idle start vh vl = 6 * tbit => 3072* tclk packet[19:0] = 0x00000 start = 512*tclk = 512*tclk 20*tbit => 10240*tclk = 512*tclk idle idle command from ext master not idle
www.austriamicrosystems.com/as5163 revision 2.7 20 - 36 as5163 datasheet - application information 8.1.4 write128 figure 18 illustrates the format of the frame and the command. figure 18. frame organization of the write128 command the command contains 8 frames. with this command, the as5163 receives only frames. this command will transfer the data in the s pecial function registers (sfrs) of the device. the data is not permanent programmed using this command. table 16 describe the organization of the otp data bits. the access is performed with cmd field set to 0x9. the next 7 frames with cmd field set to 0x1. the 2 bytes of the first comman d will be written at address 0 and 1 of the sfrs; the 2 bytes of the second command will be written at address 2 and 3; and so on, in order to co ver all the 16 bytes of the 128 sfrs. note: it is important to always complete the command. all 8 frames are needed. in case of a wrong command or a communication error, a power on reset must be performed. the device will be delivered with the programmed mem_lock_ams otp bit. this bit locks the content of the factory settings. it is impossible to overwrite this particular region. the written information will be ignored. data1 data0 cmd lsb msb lsb msb lsb msb 11 00 data3 data2 cmd lsb msb lsb msb lsb msb 10 00 data5 data4 cmd lsb msb lsb msb lsb msb 10 00 data7 data6 cmd lsb msb lsb msb lsb msb 10 00 data9 data8 cmd lsb msb lsb msb lsb msb 10 00 data11 data10 cmd lsb msb lsb msb lsb 10 00 data13 data12 cmd lsb msb lsb msb lsb 10 00 data15 data14 cmd lsb msb lsb msb lsb 10 00 msb msb msb
www.austriamicrosystems.com/as5163 revision 2.7 21 - 36 as5163 datasheet - application information 8.1.5 read128 figure 19 illustrates the format of the frame and the command. figure 19. frame organization of the read128 command the command is composed by a first frame transmitted to the as5163. the device is in slave communication mode. the device remai ns for the time t switch in idle mode before changing into the master communication mode. the as5163 starts to send 8 frames. this command will read the sfrs. the numbering of the data bytes correlates with the address of the related sfr. an even parity bit is used to guarantee a correct data transmission. each parity (p) is related to the frame data content of th e 16 bit word. the msb of the cmd dummy (p) is reserved for the parity information. do not care do not care cmd lsb msb lsb msb lsb msb 01 10 data1 data0 cmd dummy lsb msb lsb msb p 000 data3 data2 lsb msb lsb msb data5 data4 lsb msb lsb msb data7 data6 lsb msb lsb msb data9 data8 lsb msb lsb msb data11 data10 lsb msb lsb msb data13 data12 lsb msb lsb msb data15 data14 lsb msb lsb msb cmd dummy p 000 cmd dummy p 000 cmd dummy p 000 cmd dummy p 000 cmd dummy p 000 cmd dummy p 000 cmd dummy p 000
www.austriamicrosystems.com/as5163 revision 2.7 22 - 36 as5163 datasheet - application information 8.1.6 download figure 20 shows the format of the frame. figure 20. frame organization of the download command the command consists of one frame received by the as5163 (slave communication mode). the otp cell fuse content will be download ed into the sfrs. the access is performed with cmd field set to 0x5. 8.1.7 upload figure 21 shows the format of the frame. figure 21. frame organization of the upload command the command consists of one frame received by the as5163 (slave communication mode) and transfers the data from the sfrs into t he otp fuse cells. the otp fuses are not permanent programmed using this command. the access is performed with cmd field set to 0x6. 8.1.8 fuse figure 22 shows the format of the frame. figure 22. frame organization of the fuse command the command consists of one frame received by the as5163 (slave communication mode) and it is giving the trigger to permanent p rogram the non volatile fuse elements. the access is performed with cmd field set to 0x4. note: after this command, the device automatically starts to program the built-in programming procedure. it is not allowed to send ot her com- mands during this programming time. this time is specified to 4ms after the last cmd bit. do not care do not care cmd lsb msb lsb msb lsb msb 10 01 do not care do not care cmd lsb msb lsb msb lsb msb 00 11 do not care do not care cmd lsb msb lsb msb lsb msb 00 01
www.austriamicrosystems.com/as5163 revision 2.7 23 - 36 as5163 datasheet - application information 8.1.9 pass2func figure 23 shows the format of the frame. figure 23. frame organizati on of the pass2function command the command consists of one frame received by the as5163 (slave communication mode). this command stops the communication recei ving mode, releases the reset of the dsp of the as5163 device and starts to work in functional mode with the values of the sfr curre ntly written. the access is performed with cmd field set to 0x7. 8.1.10 read figure 24 shows the format of the frame. figure 24. frame organization of the read command the command is composed by a first frame sent to the as5163. the device is in slave communication mode. the device remains for the time t switch in idle mode before changing into the master communication mode. the as5163 starts to send the second frame transmitted by the as5163. the access is performed with cmd field set to 0xb. when the as5163 receives the first frame, it sends a frame with data value of the address specified in the field of the first f rame. table 17 shows the possible readable data information for the as5163 device. an even parity bit is used to guarantee a correct data transmission. the parity bit (p) is generated by the 16 data bits. the m sb of the cmd dummy (p) is reserved for the parity information. do not care do not care cmd lsb msb lsb msb lsb msb 10 11 addr2 addr1 cmd lsb msb lsb msb lsb msb 11 10 data2 data1 cmd dummy lsb msb lsb msb p 000
www.austriamicrosystems.com/as5163 revision 2.7 24 - 36 as5163 datasheet - application information 8.1.11 write figure 25 shows the format of the frame. figure 25. frame organization of the write command the command consists of one frame received by the as5163 (slave communication mode). the data byte will be written to the addre ss. the access is performed with cmd field set to 0xc. table 17 shows the possible write data information for the as5163 device. note: it is not recommended to access otp memory addresses using this command. data addr cmd lsb msb lsb msb lsb msb 01 01
www.austriamicrosystems.com/as5163 revision 2.7 25 - 36 as5163 datasheet - application information 8.2 otp programming data table 16. otp data organization data byte bit number symbol default description data15 (0x0f) 0 ams_test fs ams test area factory settings 1 ams_test fs 2 ams_test fs 3 ams_test fs 4 ams_test fs 5 ams_test fs 6 ams_test fs 7 ams_test fs data14 (0x0e) 0 ams_test fs 1 ams_test fs 2 ams_test fs 3 ams_test fs 4 chipid<0> fs chip id 5 chipid<1> fs 6 chipid<2> fs 7 chipid<3> fs data13 (0x0d) 0 chipid<4> fs 1 chipid<5> fs 2 chipid<6> fs 3 chipid<7> fs 4 chipid<8> fs 5 chipid<9> fs 6 chipid<10> fs 7chipid<11>fs data12 (0x0c) 0 chipid<12> fs 1 chipid<13> fs 2 chipid<14> fs 3 chipid<15> fs 4 chipid<16> fs 5 chipid<17> fs 6 chipid<18> fs 7 chipid<19> fs
www.austriamicrosystems.com/as5163 revision 2.7 26 - 36 as5163 datasheet - application information data11 (0x0b) 0 chipid<20> fs chip id 1 memlock_ams 1 lock of the factory setting area 2kd<0>0 kick down threshold customer settings 3kd<1>0 4kd<2>0 5kd<3>0 6kd<4>0 7kd<5>0 data10 (0x0a) 0 clamplow<0> 0 clamping level low 1 clamplow<1> 0 2 clamplow<2> 0 3 clamplow<3> 0 4 clamplow<4> 0 5 clamplow<5> 0 6 clamplow<6> 0 7 dac_mode 0 dac12/dac10 mode data9 (0x09) 0clamphi<0>0 clamping level high 1clamphi<1>0 2clamphi<2>0 3clamphi<3>0 4clamphi<4>0 5clamphi<5>0 6clamphi<6>0 7 diag_high 0 diagnostic mode, default=0 for failure band low data8 (0x08) 0 offsetin<0> 0 offset 1 offsetin<1> 0 2 offsetin<2> 0 3 offsetin<3> 0 4 offsetin<4> 0 5 offsetin<5> 0 6 offsetin<6> 0 7 offsetin<7> 0 table 16. otp data organization data byte bit number symbol default description
www.austriamicrosystems.com/as5163 revision 2.7 27 - 36 as5163 datasheet - application information data7 (0x07) 0 offsetin<8> 0 offset customer settings 1 offsetin<9> 0 2 offsetin<10> 0 3offsetin<11>0 4 offsetin<12> 0 5 offsetin<13> 0 6op_mode<0>0 selection of analog=?00? or pwm mode=?01? 7op_mode<1>0 data6 (0x06) 0offsetout<0>0 output offset 1offsetout<1>0 2offsetout<2>0 3offsetout<3>0 4offsetout<4>0 5offsetout<5>0 6offsetout<6>0 7offsetout<7>0 data5 (0x05) 0offsetout<8>0 1offsetout<9>0 2offsetout<10>0 3offsetout<11>0 4 kdhys<0> 0 kick down hysteresis 5 kdhys<1> 0 6 pwm frequency<0> 0 select the pwm frequency (4 frequencies) 7 pwm frequency<1> 0 data4 (0x04) 0 bp<0> 0 break point 1 bp<1> 0 2 bp<2> 0 3 bp<3> 0 4 bp<4> 0 5 bp<5> 0 6 bp<6> 0 7 bp<7> 0 table 16. otp data organization data byte bit number symbol default description
www.austriamicrosystems.com/as5163 revision 2.7 28 - 36 as5163 datasheet - application information note: factory settings (fs) are used for testing and programming at ams. these settings are locked (only read access possible). data3 (0x03) 0 bp<8> 0 break point customer settings 1 bp<9> 0 2 bp<10> 0 3 bp<11> 0 4 bp<12> 0 5 bp<13> 0 6 fast_slow 0 output data rate 7 ext_range 0 enables a wider z-range data2 (0x02) 0 gain<0> 0 gain 1 gain<1> 0 2 gain<2> 0 3 gain<3> 0 4 gain<4> 0 5 gain<5> 0 6 gain<6> 0 7 gain<7> 0 data1 (0x01) 0 gain<8> 0 gain 1 gain<9> 0 2 gain<10> 0 3gain<11>0 4 gain<12> 0 5 gain<13> 0 6 invert_slope 0 clockwise /counterclockwise rotation 7 lock_otpcust 0 customer memory lock data0 (0x00) 0 redundancy<0> 0 redundancy bits 1 redundancy<1> 0 2 redundancy<2> 0 3 redundancy<3> 0 4 redundancy<4> 0 5 redundancy<5> 0 6 redundancy<6> 0 7 redundancy<7> 0 table 16. otp data organization data byte bit number symbol default description
www.austriamicrosystems.com/as5163 revision 2.7 29 - 36 as5163 datasheet - application information data content. redundancy (7:0): for a better programming reliability, a redundancy is implemented. in case the programming of one bit fails, then this function can be used. with an address (7:0) one bit can be selected and programmed. lock_otpcust = 1, locks the customer area in the otp and the device is starting up from now on in operating mode. invert_slope = 1, inverts the output characteristic in analog output mode. gain (7:0): with this value one can adjust the steepness of the output slope. ext_range = 1, provides a wider z-range of the magnet by turning off the alarm function. fast_slow = 1, improves the noise performance due to internal filtering. bp (13:0): the breakpoint can be set with resolution of 14 bit. pwm frequency (1:0): four different frequency settings are possible. please refer to table 11 . kdhys (1:0): avoids flickering at the kdown output (pin 11). for settings, refer to table 13 . offsetout (11:0): output characteristic parameter analog_pwm = 1, selects the pwm output mode. offsetin (13:0): output characteristic parameter diag_high = 1: in case of an error, the signal goes into high failure-band. clamphi (6:0): sets the clamping level high with respect to vdd. dac_mode disables filter at dac clamplow (6:0): sets the clamping level low with respect to vdd. kd (5:0): sets the kick-down level with respect to vdd. redundancy code otp bit selection redundancy <7:0> in decimal 0none 1 op_mode<1> 2diag_high 3 pwm frequency<0> 4 - 10 clamphi<6> - clamphi<0> 11 - 17 clamplow<6> - clamplow<0> 18 op_mode<0> 19 - 32 offsetin<13> - offsetin<0> 33 - 46 gain<13> - gain<0> 47 - 60 bp<13> - bp<0> 61 - 72 offsetout<11> - offsetout<0> 73 invert_slope 74 fast_slow 75 ext_range 76 dac_mode 77 lock_otpcust 78 - 83 kd<5> - kd<0> 84 - 85 kdhys<1> - kdhys<0> 86 pwm frequency<1>
www.austriamicrosystems.com/as5163 revision 2.7 30 - 36 as5163 datasheet - application information 8.2.1 read / write user data data content: data only for read: cordic_out(13:0) : 14-bit absolute angular position data. ocf ( o ffset c ompensation f inished): logic high indicates the finished offset compensation algorithm. as soon as this bit is set, the as5163 has completed the startup and the data is valid. cof ( c ordic o ver f low): logic high indicates an out of range error in the cordic part. when this bit is set, the cordic_out(13:0) data is invalid. the absolute output maintains the last valid angular value. this alarm may be resolved by bringing the magnet within t he x-y-z tolerance limits. agc_value (7:0) : magnetic field indication. data for write and read: dsp_res resets the dsp part of the as5163 the default value is 0. this is active low. the interface is not affected by this reset. r1k_10k defines the threshold level for the otp fuses. this bit can be changed for verification purpose. a verification of the program ming of the fuses is possible. the verification is mandatory after programming. 8.2.2 programming procedure note: after programming the otp fuses, a verification is mandatory. the procedure described below must be strictly followed to ensure properly programmed otp fuses. pull-up / pull-down on out pin vdd=5v wait startup time, device enters communication mode write128 command: the trimming bits are written in the sfr memory. read128 command: the trimming bits are read back. upload command: the sfr memory is transferred into the otp ram. fuse command: the otp ram is written in the poly fuse cells. wait fuse time (6 ms) write command (r1k_10k=1): poly fuse cells are transferred into the ram cells compared with 10k resistor. download command: the otp ram is transferred into the sfr memory. read128 command: the fused bits are read back. write command (r1k_10k=0): poly fuse cells are transferred into the ram cells compared with 1k resistor. download command: the otp ram is transferred into the sfr memory. read128 command: the fused bits are read back. pass2func command or por: go to functional mode. for further information, please refer to application note an5163-10 available at www.austriamicrosystems.com table 17. read / write data area region address address bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 r/w user data 0x10 16 cordic_out[7:0] 0x11 17 0 0 cordic_out[13:8] 0x12 18 ocf cof 0 0 0 0 dsp_res r1k_10k 0x17 23 agc_value[7:0] read only read and write
www.austriamicrosystems.com/as5163 revision 2.7 31 - 36 as5163 datasheet - application information 8.2.3 physical placement of the magnet the best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown in figure 26 . figure 26. defined chip center and magnet displacement radius 8.2.4 magnet placement the magnet?s center axis should be aligned within a displacement radius r d of 0.25mm (larger magnets allow more displacement) from the defined center of the ic. the magnet may be placed below or above the device. the distance should be chosen such that the magnetic field on the die surfa ce is within the specified limits (see figure 26) . the typical distance ?z? between the magnet and the package surface is 0.5mm to 1.5mm, provided the recommended magnet material and dimensions (6mm x 3mm) are used. larger distances are possible, as long as, the required magnet ic field strength stays within the defined limits. however, a magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be indicated by an alarm forcing the output into the failure band. figure 27. vertical placement of the magnet area of recommended maximum magnet misalignment defined center r d 3.2mm 3.2mm 2.5mm 2.5mm 1 0.22990.100 0.23410.100 0.77010.150 n s package surface die surface
www.austriamicrosystems.com/as5163 revision 2.7 32 - 36 as5163 datasheet - package drawings and markings 9 package drawings and markings the device is available in a 14-lead thin shrink small outline package. figure 28. package drawings and dimensions notes: 1. dimensions and tolerancing confirm to asme y14.5m-1994 . 2. all dimensions are in miilimeters. angles are in degrees. symbol min nom max a- -1.20 a1 0.05 - 0.15 a2 0.80 1.00 1.05 b0.19-0.30 c0.09-0.20 d 4.905.005.10 e - 6.40 bsc - e1 4.30 4.40 4.50 e - 0.65 bsc - l 0.450.600.75 l1 - 1.00 ref - symbol min typ max r0.09 - - r1 0.09 - - s0.20 - - 10o - 8o 2-12 ref- 3-12 ref- aaa - 0.10 - bbb - 0.10 - ccc - 0.05 - ddd - 0.20 - n14 as5163 yywwmzz
www.austriamicrosystems.com/as5163 revision 2.7 33 - 36 as5163 datasheet - package drawings and markings marking: yywwmzz. jedec package outline standard: mo - 153 thermal resistance r th(j-a) : 89 k/w in still air, soldered on pcb yy ww m zz year (i.e. 04 for 2004) week assembly plant identifier assembly traceability code
www.austriamicrosystems.com/as5163 revision 2.7 34 - 36 as5163 datasheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 0.1 oct 06, 2008 apg initial version 1.1 nov 04, 2008 added package drawings and dimensions 2.4 may 31, 2010 updated according to 2.4 specification document jun 18, 2010 change d dith_disable to dac_mode, updated ordering information . 2.5 sep 21, 2010 rfu updated absolute maximum ratings , operating conditions , magnetic input specification , electrical system specifications , figure 4 , table 9 , table 10 , table 14 , figure 11 , programming procedure , figure 28 , ordering information . deleted chapter on ?choosing the proper magnet?. 2.6 oct 14, 2010 mub updated section 6.3 2.7 oct 28, 2010 updated table 5 , table 6 , table 10 , table 14 , table 15 , page 29, figure 28 .
www.austriamicrosystems.com/as5163 revision 2.7 35 - 36 as5163 datasheet - ordering information 10 ordering information the devices are available as the standard products shown in table 18 . note: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect technical support is found at http://www.austriamicrosyste ms.com/technical-support for further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.com/distributor table 18. ordering information ordering code description delivery form package AS5163-HTSV 12-bit high voltage rotary magnetic encoder tubes 14-pin tssop as5163-htsp tape & reel
www.austriamicrosystems.com/as5163 revision 2.7 36 - 36 as5163 datasheet - copyrights copyrights copyright ? 1997-2010, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the st andard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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