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d a t a sh eet product speci?cation file under integrated circuits, ic06 1998 nov 18 integrated circuits 74hc1gu04 inverter
1998 nov 18 2 philips semiconductors product speci?cation inverter 74hc1gu04 features wide operating voltage: 2.0 to 6.0 v symmetrical output impedance low power dissipation balanced propagation delays very small 5-pin package output capability: standard. description the 74hc1gu04 is a high-speed si-gate cmos device. the 74hc1gu04 provides the inverting single stage function. the standard output currents are 1 2 compared to the 74hcu04. function table see note 1. note 1. h = high voltage level; l = low voltage level. input ina output outy lh hl quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6.0 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; ? (c l v cc 2 f o ) = sum of outputs. 2. for hc1g the condition is v i = gnd to v cc. pinning symbol parameter conditions typ. unit t phl /t plh propagation delay ina to outy c l = 15 pf; v cc =5v 5ns c i input capacitance 5 pf c pd power dissipation capacitance notes 1 and 2 14 pf pin symbol description 1 n.c. not connected 2 ina data input 3 gnd ground (0 v) 4 outy data output 5v cc dc supply voltage
1998 nov 18 3 philips semiconductors product speci?cation inverter 74hc1gu04 ordering information outside north america packages temperature range pins package material code marking 74hc1gu04gw - 40 to +125 c 5 sc-88a plastic sot353 hd fig.1 pin configuration. handbook, halfpage 1 2 3 5 4 mna042 u04 v cc ina outy gnd n.c. fig.2 logic symbol. handbook, halfpage mna043 ina outy 2 4 fig.3 iec logic symbol. handbook, halfpage 2 1 4 mna044 fig.4 logic diagram. handbook, halfpage mna045 ina outy
1998 nov 18 4 philips semiconductors product speci?cation inverter 74hc1gu04 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 134). voltages are referenced to gnd (ground = 0 v). note 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. symbol parameter conditions 74hc1g unit min. typ. max. v cc dc supply voltage 2.0 5.0 6.0 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t amb operating ambient temperature range see dc and ac characteristics per device - 40 +25 +125 c t r , t f input rise and fall times except for schmitt-trigger inputs v cc = 2.0 v -- 1000 ns v cc = 4.5 v -- 500 ns v cc = 6.0 v -- 400 ns symbol parameter conditions min. max. unit v cc dc supply voltage - 0.5 +7.0 v i ik dc input diode current (1) v i <- 0.5 or v i > v cc + 0.5 v - 20 ma i ok dc output diode current (1) v o <- 0.5 or v o > v cc + 0.5 v - 20 ma i o dc output source or sink current standard outputs (1) - 0.5 v < v o < v cc + 0.5 v - 12.5 ma i cc dc v cc or gnd current for types with standard outputs (1) - 25 ma t stg storage temperature range - 65 +150 c p d power dissipation per package 5 pins plastic sc-88a for temperature range: - 40 to +125 c; above +55 c p d derates linearly with 2.5 mw/k - 200 mw
1998 nov 18 5 philips semiconductors product speci?cation inverter 74hc1gu04 dc characteristics for the 74hc1gu04 over recommended operating conditions. voltage are referenced to gnd (ground = 0 v). note 1. all typical values are measured at t amb =25 c. symbol parameter test conditions t amb ( c) unit other v cc (v) - 40 to +85 - 40 to +125 min. typ. (1) max. min. max. v ih high-level input voltage 2.0 1.7 1.4 - 1.7 - v 4.5 3.6 2.6 - 3.6 - v 6.0 4.8 3.4 - 4.8 - v v il low-level input voltage 2.0 - 0.6 0.3 - 0.3 v 4.5 - 1.9 0.9 - 0.9 v 6.0 - 2.6 1.2 - 1.2 v v oh high-level output voltage; all outputs v i =v ih or v il , - i o =20 m a 2.0 1.8 2.0 - 1.8 - v 4.5 4.0 4.5 - 4.0 - v 6.0 5.5 6.0 - 5.5 - v v oh high-level output voltage; standard outputs v i =v ih or v il , - i o = 2.0 ma 4.5 4.13 4.32 - 3.7 - v v i =v ih or v il , - i o = 2.6 ma 6.0 5.63 5.81 - 5.2 - v v ol low-level output voltage; all outputs v i =v ih or v il , i o =20 m a 2.0 - 0 0.2 - 0.2 v 4.5 - 0 0.5 - 0.5 v 6.0 - 0 0.5 - 0.5 v v ol low-level output voltage; standard outputs v i =v ih or v il , i o = 2.0 ma 4.5 - 0.15 0.33 - 0.4 v v i =v ih or v il , i o = 2.6 ma 6.0 - 0.16 0.33 - 0.4 v i i input leakage current v i =v cc or gnd 6.0 -- 1.0 - 1.0 m a i cc quiescent supply current v i =v cc or gnd, i o =0 6.0 -- 10 - 20 m a
1998 nov 18 6 philips semiconductors product speci?cation inverter 74hc1gu04 ac characteristics gnd = 0 v; t r =t f = 6.0 ns; c l =50pf. note 1. all typical values are measured at t amb =25 c. symbol parameter test conditions t amb ( c) unit waveforms v cc (v) - 40 to +85 - 40 to +125 min. typ. (1) max. min. max. t phl /t plh propagation delay ina to outy see figs 5 and 6 2.0 - 10 90 - 105 ns 4.5 - 718 - 21 ns 6.0 - 615 - 18 ns ac waveforms fig.5 the input (ina) to output (outy) propagation delays. handbook, halfpage mna046 ina input outy output t phl t plh v m (1) v m (1) (1) hc1g v m = 50%; v i = gnd to v cc . fig.6 load circuitry for switching times. definitions for test circuit: c l = load capacitance including jig and probe capacitance. (see ac characteristics for values). r t = termination resistance should be equal to the output impedance z o of the pulse generator. handbook, halfpage v cc v i v o mna034 d.u.t. c l 50 pf r t pulse generator
1998 nov 18 7 philips semiconductors product speci?cation inverter 74hc1gu04 typical transfer characteristics fig.7 v cc = 2.0 v; i o =0. handbook, halfpage 02 1 v i (v) i cc (ma) v o (v) 1 0.5 0 2 1 0 mna047 fig.8 v cc = 4.5 v; i o =0. handbook, halfpage 05 2.5 v i (v) i cc (ma) v o (v) 10 5 0 5 2.5 0 mna048 fig.9 v cc = 6.0 v; i o =0. handbook, halfpage 06 3 v i (v) i cc (ma) v o (v) 20 10 0 6 3 0 mna049 fig.10 test set-up for measuring forward transconductance g fs = d i o / d v i at v o is constant. handbook, halfpage mna050 v cc r bias = 560 k w input 0.47 m f 100 m f output a gnd i o v i (f = 1 khz)
1998 nov 18 8 philips semiconductors product speci?cation inverter 74hc1gu04 application information some applications for the hc1gu04 are: linear amplifier (see fig.11) in crystal oscillator design (see fig.12). note to the application information. all values given are typical unless otherwise specified. handbook, halfpage u04 r1 r2 v cc z l mna052 1 m f gnd fig.11 hc1gu04 used as a linear amplifier. z l >10k w ; a ol = 20 (typical) ; r1 3 3k w ,r2 1m w . typical unity gain bandwidth product is 5 mhz. c1 see fig.13. a ol = open loop amplification. a u = voltage amplification. a u a ol 1 r1 r2 ------- - 1a ol ) + ( + ------------------------------------------------ C = v o max (p-p) v cc 1.5 v centered at 1 2 -- - v cc C ? fig.12 crystal oscillator configuration. c1 = 47 pf (typical). c2 = 22 pf (typical). r1 = 1 to 10 m w (typical). r2 optimum value depends on the frequency and required stability against changes in v cc or average minimum i cc (i cc is typically 2 ma at v cc = 3 v and f = 1 mhz). handbook, halfpage mna053 u04 out r2 r1 c1 c2 external components for resonator ( f < 1 mhz) frequency (khz) r1 (m w ) r2 (k w ) c1 (pf) c2 (pf) 10 to 15.9 2.2 220 56 20 16 to 24.9 2.2 220 56 10 25 to 54.9 2.2 100 56 10 55 to 129.9 2.2 100 47 5 130 to 199.9 2.2 47 47 5 200 to 349.9 2.2 47 47 5 350 to 600 2.2 47 47 5 where: all values given are typical and must be used as an initial set-up.
1998 nov 18 9 philips semiconductors product speci?cation inverter 74hc1gu04 optimum value for r2 frequency (khz) r2 (k w ) optimum for 3 2.0 8.0 minimum required i cc minimum in?uence due to change in v cc 6 1.0 4.7 minimum required i cc minimum in?uence by v cc 10 0.5 2.0 14 0.5 1.0 >14 replace r2 by c3 with a typical value of 35 pf fig.13 typical input capacitance as a function of the input voltage. (1) v cc = 2.0 v. (2) v cc = 4.5 v. (3) v cc = 6.0 v. handbook, halfpage 08 46 2 v i (v) 80 40 20 60 0 mna054 input capacitance (pf) (1) (2) (3)
1998 nov 18 10 philips semiconductors product speci?cation inverter 74hc1gu04 package outline references outline version european projection issue date iec jedec eiaj sot353 wb m b p d e 1 e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface mounted package; 5 leads sot353 unit a 1 max b p cd e (2) e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 97-02-28 sc-88a
1998 nov 18 11 philips semiconductors product speci?cation inverter 74hc1gu04 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1998 nov 18 12 philips semiconductors product speci?cation inverter 74hc1gu04 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1998 nov 18 13 philips semiconductors product speci?cation inverter 74hc1gu04 notes
1998 nov 18 14 philips semiconductors product speci?cation inverter 74hc1gu04 notes
1998 nov 18 15 philips semiconductors product speci?cation inverter 74hc1gu04 notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1998 sca60 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors 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communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 160 1010, fax. +43 160 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. 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novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 printed in the netherlands 245106/00/01/pp16 date of release: 1998 nov 18 document order number: 9397 750 03667

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