View IR2157S_2030511.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

features programmable preheat time & frequency programmable ignition ramp protection from failure-to-strike lamp filament sensing & protection protection from operation below resonance protection from low-line condition & automatic restart (mimics a magnetic ballast) advanced information data sheet no. pd60108b ir2157 fully integrated ballast control ic typical connection + v bus + rectified ac line v bus return r ph r run c start r start r t c t c ign c ph r dt c bs d boot r suppl y c vcc r cs l res c res r ghs r gls c block c snubber r snubber 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ir2157 vdc cph rph rt run ct dt sd com vcc n/c vb vs ho cs lo r1 r2 c1 c2 r3 d1 d2 r5 r4 q1 q2 thermal overload protection programmable deadtime integrated 600v level-shifting gate driver internal 15.6v zener clamp diode on vcc true micropower startup (150ua) latch immunity protection on all leads esd protection on all leads description the ir2157 is a fully integrated, fully protected 600v ballast control ic designed to drive virtually all types of rapid start fluorescent lamp ballasts. externally program- mable features such as preheat time & frequency, ignition ramp characteristics, and running mode operating frequency provide a high degree of flexibility for the ballast design engineer. comprehensive protection features such as protection from failure of a lamp to strike, filament failures, low dc bus conditions, thermal overload, or lamp failure during normal operation, as well as an automatic restart function, have been included in the design. the heart of this control ic is a variable frequency oscillator with externally programmmable deadtime. precise control of a 50% duty cycle is accomplished using a t-flip-flop. the ir2157 is available in both 16 pin dip and 16 pin narrow body soic packages. packages 16 lead soic (narrow body) 16 lead pdip
ir2157 2 advanced information uvlo mode 1 / 2 -bridge off i qcc @ 150 m a cph = 0v oscillator off preheat mode 1 / 2 -bridge @ f ph cph charging @ i ph = 1 m a rph = 0v run = open circuit cs disabled ignition ramp mode f ph ramps to f min cph charging @ i ph = 1 m a rph = open circuit run = open circuit cs 1v threshold enabled run mode f min ramps to f run cph charges to 7.6v clamp rph = open circuit run = 0v cs 0.2v threshold enabled vcc > 11.4v (uv+) and vdc > 5.1v (bus ok) and sd < 1.7v (lamp ok) and t j < 175c (t jmax ) cph > 4.0v (end of preheat mode) cph > 5.1v (end of ignition ramp) vcc < 9.5v (vcc fault or power down) or vdc < 3.0v (dc bus/ac line fault or pow e or sd > 2.0v (lamp fault or lamp remova power turned on fault mode fault latch set 1 / 2 -bridge off i qcc @ 150 m a cph = 0v vcc = 15.6v oscillator off t j > 175c (over-temperature) cs > 1.0v (failure to strike lamp or hard switching) or t j > 175c (over-temperature) cs > 1.0v (over-current or hard switching) or cs < 0.2v (no-load or below resonance) or t j > 175c (over-temperature) sd > 2.0v (lamp removal) or vcc < 9.5v (power turned off)
ir2157 3 advanced information note 1: this ic contains a zener clamp structure between the chip v cc and com which has a nominal breakdown voltage of 15.6v. please note that this supply pin should not be driven by a dc, low impedance power source greater than the v clamp specified in the electrical characteristics section. absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. symbol definition min. max. units v b high side floating supply voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v lo low side output voltage -0.3 v cc + 0.3 i omax maximum allowable output current due to miller effect -500 500 i rt r t pin current -5 5 v ct c t pin voltage -0.3 v cc + 0.3 v i cph cph pin current -5 5 ma v rph rph pin voltage -0.3 v cc + 0.3 v run run pin voltage -0.3 v cc + 0.3 v dt deadtime pin voltage -0.3 5.5 v cs current sense pin voltage -0.3 5.5 v sd shutdown pin voltage -0.3 5.5 i cc supply current (note 1) 20 ma dv/dt allowable offset voltage slew rate -50 50 v/ns p d package power dissipation @ t a +25c (16 lead pdip) 1.60 (16 lead soic) 1.25 rth ja thermal resistance, junction to ambient (16 lead p dip) 75 (16 lead soic) 100 t j junction temperature -55 150 t s storage temperature -55 150 c t l lead temperature (soldering, 10 seconds) 300 v c/w ma v
ir2157 4 advanced information recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v b s high side floating supply voltage v cc - 0.7 v clamp v s steady state high side floating supply offset voltage -3.0 600 v cc supply voltage v ccuv+ v clamp i cc supply current note 2 10 ma v dc v dc lead voltage 0 vcc v c t c t lead capacitance 220 pf r dt deadtime resistance 1.0 k w i rt r t lead current (note 3) -500 -50 ua i rph rph lead current (note 3) 0 450 ua i run run lead current (note 3) 0 450 ua i sd shutdown lead current -1 1 ma i cs current sense lead current -1 1 ma t j junction temperature -40 125 o c v electrical characteristics v cc = v bs = v bias = 15v +/- 0.25v, r t = 40.0k w , c t = 470 pf, rph and run leads no connection, v cph = 0.0v, r dt = 6.1k w , v cs = 0.5v, v sd = 0.0v, c l = 1000pf, t a = 25 o c unless otherwise specified. symbol definition min. typ. max. units test conditions v ccuv+ v cc supply undervoltage positive going 11.4 v cc rising from 0v threshold v ccuv- v cc supply undervoltage positive going 9.6 v cc falling from 15v threshold v hystuv v cc supply undervoltage lockout hysteresis 1.8 i qccuv uvlo mode quiescent current 150 v cc = 10v rising i qccflt fault-mode quiescent current (undervoltage 200 lockout, shutdown, over-current, over-temp) i qcc quiescent v cc supply current 3.8 r t no connection, c t connected to com i qcc50k v cc supply current, f= 50khz 4.5 r t =36k w , r dt = 5.6k w , c t =220pf v clamp v cc zener clamp voltage 15.6 v i cc = 10ma supply characteristics v m a note 2: enough current should be supplied into the vcc lead to keep the internal 15.6v zener clamp diode on this lead regulating its voltage. note 3: due to the fact that the rt input is a voltage-controlled current source, the total rt pin current is sum of all of the parallel current sources connected to that pin. for optimum oscillator current mirror performance, this total current should be kept between 50ma and 500ma. during the preheat mode, the total current flowing out of the rt pin consists of the rph pin current plus the current due to the rt resistor. during the run mode, the total rt pin current consists of the run pin current plus the the current due to the rt resistor. ma
ir2157 5 advanced information oscillator i/o characteristics symbol definition min. typ. max. units test conditions f osc oscillator frequency 30 r t = 32k w , r dt = 6.1k w , c t =470pf 100 r t = 6.1k w , r dt = 6.1k w , c t =470pf df/dv oscillator frequency voltage stability 0.5 %/v v ccuv + < v cc < 15v df/dt oscillator frequency temperature stability 0.02 %/c -40 o c < tj < 125 o c d oscillator duty cycle 50 % v ct+ upper c t ramp voltage threshold 4.0 v ct- lower c t ramp voltage threshold 2.0 v ctflt fault-mode c t pin voltage 0 mv sd = 5v, cs = 2v, or tj > tsd v rt r t pin voltage 2.0 v v rtflt fault-mode r t pin voltage 0 sd = 5v, cs = 2v, or tj > tsd tdlo lo output deadtime 2.0 toho ho output deadtime 2.0 dtd/dv deadtime voltage stability 0.5 %/v v ccuv + < v cc < 15v dtd/dt deadtime temperature stability 0.02 %/c -40 o c < tj < 125 o c mv khz m sec symbol definition min. typ. max. units test conditions i cph cph pin charging current 1.0 m av cph = 0v v cphign cph pin lgnition mode threshold voltage 4.0 v cphrun cph pin run mode threshold voltage 5.15 v cphclmp cph pin clamp voltage 7.6 i cph = 1ma v cphflt fault-mode cph pin voltage 0 mv sd = 5v, cs = 2v, or tj > tsd preheat characteristics v electrical characteristics (cont.) floating supply characteristics symbol definition min. typ. max. units test conditions i qbs0 quiescent v bs supply current 0 v ho = v s i qbs1 quiescent v bs supply current 30 v ho = v b vbsmin minimum required vbs voltage for proper 4 5 v ho functionality i lk offset supply leakage current 50 m a v b = v s = 600v m a v
ir2157 6 advanced information symbol definition min. typ. max. units test conditions v sdth+ rising shutdown pin threshold voltage 2.0 v v sdhys shutdown pin threshold hysteresis 150 mv v csth+ over-current sense threshold voltage 1.0 v csth- under-current sense threshold voltage 0.2 t cs over-current sense propogation delay 160 nsec delay from cs to lo or ho v dc+ low v bus /rectified line input upper threshold 5.15 v dc- low v bus /rectified line input lower threshold 3.0 t sd thermal shutdown junction temperature 175 o c protection circuitry characteristics v electrical characteristics (cont.) v rph characteristics symbol definition min. typ. max. units test conditions i rphlk open circuit rph pin leakage current 0.1 m a v rph = 5v,v rph = 5v v rphflt fault-mode rph pin voltage 0 mv sd = 5v, cs = 2v, or tj > tsd run characteristics symbol definition min. typ. max. units test conditions i runlk open circuit run pin leakage current 0.1 m av run = 5v v runflt fault-mode run pin voltage 0 mv sd = 5v, cs = 2v, or tj > tsd symbol definition min. typ. max. units test conditions vol low-level output voltage 0 100 i o = 0 v oh high level output voltage 0 100 v bias - v o, i o = 0 t r turn-on rise time 85 150 t f turn-off fall time 45 100 gate driver output characteristics mv nsec note 4: when the ic senses an overtemperature condition (tj > 175oc), the ic is latched off. in order to reset this fault latch, the sd pin must be cycled high and then low, or the vcc supply to the ic must be cycled below the falling undervoltage lockout threshold (vccuv-).
ir2157 7 advanced information functional block diagram over- temp detect level shift pulse filter & latch 2 4.0v 5.1v 3 5 7.6v 3.0v 5.1v 1 1.0ua 4 2.0v i rt 6 i ct = i rt 7 4.0v 2.0v cph rph rt run ct dt vdc q s r2 q r1 q t rq 16 14 15 vs ho vb 12 10 11 com lo vcc 15.6v 8 sd 2.0v 9 0.2v 1.0v cs q s rq qd r q clk qs r q under- voltage detect lead # symbol description 1v dc dc bus sensing input 2c ph preheat timing capacitor 3r ph preheat frequency resistor & ignition capacitor 4r t oscillator timing resistor 5 run run frequency resistor 6c t oscillator timing capacitor 7d t deadtime programming 8 sd shutdown input 9 cs current sensing input 10 lo low-side gate driver output 11 com ic power & signal ground 12 v cc logic & low-side gate driver supply 13 n/c unused 14 v b high-side gate driver floating supply 15 v s high voltage floating return 16 ho high-side gate driver output lead assignments & definitions 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ir2157 vdc cph rph rt run ct dt sd com vcc n/c vb vs ho cs lo
ir2157 8 advanced information 16 lead soic (narrow body) 01-3064 00 16 lead pdip 01-3065 00
ir2157 9 advanced information supply bypassing and pc board layout rules component selection and placement on the pc board is extremely important when using power control ics vcc should be bypassed to com as close to the ic terminals as possible with a low esr/esl capacitor, as shown in figure 1 below. a rule of thumb for the value of this bypass capacitor is to keep its minimum value at least 2500 times the value of the total input capacitance (ciss) of the power transistors being driven. this decoupling capacitor can be split between a higher valued electrolytic type and a lower valued ceramic type connected in parallel, although a good quality electrolytic (e.g., 10mf) placed immediately adjacent to the vcc and com terminals will work well. in a typical application circuit, the supply voltage to the ic is normally derived by means of a high value startup resistor (1/4w) from the rectified line voltage, in combination with a charge pump from the output of the half-bridge. with this type of supply arrangement, the internal 15.6v zener clamp diode from vcc to com will determine the steady state ic supply voltage. connecting the ic ground (com) to the power ground both the low power control circuitry and low side gate driver output stage grounds return to this pin within the ic. the com pin should be connected to the bottom terminal of the current sense resistor in the source of the low side power mosfet using an individual pc board trace, as shown in figure 2. in addition, the ground return path of the timing components and vcc decoupling capacitor should be connected directly to the ic com pin, and not via separate traces or jumpers to other ground traces on the board. these connection technique prevents high current ground loops from interfering with sensitive timing component operation, and allows the entire control circuit to reject common-mode noise due to output switching. description of operation & component selection tips ir2157 c vcc (surface mount) d boot (surface mount) c boot (surface mount) c vcc (through hole) pin 1 figure 1: supply bypassing pcb layout example ir2157 pin 1 r cs ( throu g h hole ) c vcc ( throu g h hole ) c vcc ( surface mount ) v bus return timin g components figure 2: com pin connection pcb layout example
ir2157 10 advanced information the control sequence & timing component selection the ir2157 uses the following control sequence (figure 3) to drive rapid start fluorescent lamps. the control sequence used in the ir2157 allows the run mode operating frequency of the ballast to be higher than the ignition frequency (i.e., fstart > fph > frun > fign). this control sequence is recommended for lamp types where the ignition frequency is too close to the run frequency to ensure proper lamp striking for all production resonant lc component tolerances (please note that it is possible to use the ir2157 in systems where fstart > fph > fign > frun, simply by leaving the run pin open). six pins in the ic are used to control the startup, preheat, ignition ramp, and run modes of operation, and to allow ballast and lamp engineers the flexibility to optimize their designs for virtually any lamp type. the heart of this controller is an oscillator which resembles those found in many popular pwm voltage regulator ics. in its simplest form, this oscillator consists of a timing resistor and capacitor connected to ground. the voltage across the timing capacitor ct is a sawtooth, where the rising portion of the ramp is determined by the current in the rt pin, and the falling portion of the ramp is determined by an external deadtime resistor rdt. the oscillograph in figure 4 illustrates the relationship between the oscillator capacitor waveform and the gate driver outputs. the deadtime can be programmed by means of the external rdt resistor, given a certain range of ct capacitor values, using the graph shown in figure 5. the rt input is a voltage-controlled current source, where the voltage is regulated to be approximately 2.0v. in order to maintain proper linearity between the rt pin current and the ct capacitor charging current, the value of the rt pin current should be kept between 50a and 500a. the rt pin can also be used as a feedback point for closed loop control. f ph f run f min frequency t f start v cph 5v v rph 2v v run 2v preheat mode ignition ramp mode run mode figure 3: ir2157 control sequence figure 4
ir2157 11 advanced information 0.1 1 10 1 10 100 rdt ( kohms ) tdead ( usec ) ct = 220 pf ct = 470 pf ct = 1 nf figure 5: deadtime versus r dt during the startup mode , the operating frequency is determined by the parallel combination of rph, rstart , and rt , combined with the values of cstart, ct and rdt , as shown in figure 6. this frequency is normally chosen to ensure that the instantaneous voltage across the lamp during the first few cycles of operation does not exceed the strike potential of the lamp. as the voltage across cstart charges up to the rt pin voltage, the output frequency exponentially decays to the preheat frequency. during the preheat mode, the operating frequency is determined by the parallel combination of rph and rt , combined with the value of ct and rdt . this frequency, along with the preheat time, is normally chosen to ensure that adequate heating of the lamp filaments occurs. typically, a 4.5:1 ratio of 2 4.0v 5.1v 3 5 7.6v 1.0ua 4 2.0v i rt 6 i ct = i rt 7 4.0v 2.0v cph rph rt run ct dt q s r2 q r1 under- voltage detect c ph c ign r t c start r start c t r dt r ph r run figure 6: oscillator section block diagram with external component connection
ir2157 12 advanced information the preheat time is programmed by means of the preheat capacitor, cph, an internal 1ma current source, and an internal threshold on the cph pin of 4.0v, according to the following formula: at the end of the preheat time, the internal, open- drain transistor holding the rph pin to ground turns off, and the voltage on this pin charges exponentially up to the rt pin potential. during this ignition ramp mode, the output frequency exponentially decays to a minimum value. the rate of decay of this frequency is a function of the rph * cph time constant. because the ignition ramp mode ends when the voltage on the cph pin reaches 5.15v, the ignition ramp is always 1/4th as long as the preheat time. when the cph pin reaches 5.15v, an open-drain transistor on the run pin turns on, and the external rrun resistor is then in parallel with the rt resistor. the run mode operating frequency is therefore a function of the parallel combination of rrun and rt , and this means that the operating power of the lamp can be programmed by means of rrun . 0 50 100 150 0 5 10 15 20 25 30 35 40 rt ( k ohms ) freq ( khz ) ct=220pf , rdt=11k ct=470pf , rdt=6.2k ct=1nf , rdt=3k 0 50 100 150 200 250 0 5 10 15 20 25 30 35 40 rt ( k ohms ) freq ( khz ) ct=220pf , rdt=5.6k ct=470pf , rdt=2.7k ct=1nf , rdt=1.2k figure 8: fosc versus effective rt (tdead = 2.0 usec) figure 9: fosc versus effective rt (tdead = 1.0 usec) t 4e6 c , or ph ph = c = 250e - 9 t ph ph the following graphs, figures 8 and 9, illustrate the relationship between the effective rt resistance (i.e., the parallel combination of resistors which programs the ct capacitor charging current) and the operating frequency. the hot filament-to-cold filament resistance is desired for maximum lamp life, as shown in figure 7 figure 7: lamp filament voltage during the preheat, ignition ramp and run modes.
ir2157 13 advanced information lamp protection & automatic restart circuitry operation three pins on the ir2157 are used for protection, as shown in figure 10 below. these are vdc (dc bus monitor), sd (unlatched shutdown), and cs (latched shutdown). over- temp detect 2 4.0v 5.1v 7.6v 3.0v 5.1v 1 1.0ua 7 cph dt vdc q t rq 8 sd 2.0v 9 0.2v 1.0v cs q s rq qd r q clk q s r q under- voltage detect from oscillator section +v bus from lamp lower cathode r cs r3 c2 r4 r5 r1 c1 r2 q2 figure 10: lamp protection & automatic restart circuitry block diagram with external component connection. sensing the dc bus voltage the first of these protection pins senses the voltage on the dc bus by means of an external resistor divider and an internal comparator with hysteresis. when power is first supplied to the ic at system startup, 3 conditions are required before oscillation is initiated: 1.) the voltage on the vcc pin must exceed the rising undervoltage lockout threshold (11.5v), 2.) the voltage at the vdc pin must exceed 5.1v, and 3.) the voltage on the sd pin must be below approximately 1.85v. if a low dc bus condition occurs during normal operation, or if power to the ballast is shut off, the dc bus will collapse prior to the vcc of the chip (assuming the vcc is derived from a charge pump off of the output of the half-bridge). in this case, the voltage on the vdc pin will shut the oscillator off, thereby protecting the power transistors from potentially hazardous hard switching. approximately 2v of hysteresis has been designed into the internal comparator sensing the vdc pin, in order to account for variations in the dc bus voltage under varying load conditions. when the dc bus recovers, the chip restarts from the beginning of the control sequence, as shown in timing diagram 11 below.
ir2157 14 advanced information run mode low vdc ct 4 vdc 3 5 cph 8 lo 15 ho-vs 15 restart figure 11: vdc pin fault and auto restart lamp presence detection and automatic restart the second protection pin, sd, is used for both unlatched shutdown and automatic restart functions. the sd pin would normally be connected to an external circuit which senses the presence of the lamp (or lamps), as shown in figure 12. when the sd pin exceeds 2.0v (approximately 150mv of hysteresis is included to increase noise immunity), signaling either a lamp fault or lamp removal, the oscillator is disabled, both gate driver outputs are pulled low, and the chip is put into the micropower mode. since a lamp fault would normally lead to a lamp exchange, when a new lamp is inserted into the fixture, the sd pin would be pulled back to near the ground potential. under these rectified ac line c vcc r supply d1 d2 q2 q1 r snubber c snubber v bus return +v bus 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ir2157 vdc cph rph rt run ct dt sd com vcc n/c vb vs ho cs lo d boot c boot r cs r3 r gls r ghs c res r4 r5 c2 c block l res figure 12: lamp presence detection circuit connection (shaded area) run mode sd mode ct 4 cph 8 lo 15 ho-vs 15 restart sd 2 conditions a reset signal would restart the chip from the beginning of the control sequence, as shown in the timing diagram in figure 13. figure 13: sd pin fault and auto restart
ir2157 15 advanced information thus, for a lamp removal and replacement, the ballast automatically restarts the lamp in the proper manner, maximizing lamp life and minimizing stress on the power mosfets or igbts. the sd pin contains an internal 7.5v zener diode clamp, thereby reducing the number of external components required. half-bridge current sensing and protection the third pin used for protection is the cs pin, which is normally connected to a resistor in the source of the lower power mosfet, as shown in figure 14. the cs pin is used to sense fault conditions such a failure of a lamp to strike, over-current during normal operation, hard switching, no load, and operation below resonance. if any one of these conditions is sensed, the fault latch is set, the oscillator is disabled, the gate driver outputs go low, and the chip is put into the micropower mode. the cs pin performs its sensing functions on a cycle-by-cycle basis in order to maximize ballast reliability. failure-to-strike, and for the over-current, hard switching fault conditions, the 1v, positive-going cs threshold is enabled at the end of the preheat time. for the under-current and under-resonance conditions, there is a negative- going threshold of 0.2v which is enabled at the onset of the run mode. the sensing of this 0.2v threshold is synchronized with the falling edge of the lo output. figures 15, 16 and 17 are oscillographs of fault conditions. figure 15 shows a failure of the lamp to strike, figure 16 shows a hard switching condition and figure 17 shows an under-current condition. rectified ac line 1 / 2 bridge output c vcc r supply d1 d2 q2 q1 r snubber c snubber v bus return +v bus 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ir2157 vdc cph rph rt run ct dt sd com vcc n/c vb vs ho cs lo d boot c boot r cs r3 r gls r ghs figure 14: half-bridge current sensing circuit connection (shaded area) figure 15: lamp failure to strike figure 16: hard switching condition
ir2157 16 advanced information recovery from such a fault condition is accomplished by cycling either sd pin or the vcc pin. when a lamp is removed, the sd pin goes high, the fault latch is reset, and the chip is held off in an unlatched state. lamp replacement causes the sd pin to go low again, reinitiating the startup sequence. the fault latch can also be reset by the undervoltage lockout signal, if vcc falls below the lower undervoltage threshold. bootstrap supply considerations power is normally supplied to the high-side circuitry by means of a simple charge pump from vcc, as shown in figure 19 below. rectified ac line 1 / 2 bridge output c vcc r supply d1 d2 q2 q1 r snubber c snubber v bus return +v bus 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ir2157 vdc cph rph rt run ct dt sd com vcc n/c vb vs ho cs lo d boot c boot r cs r3 r gls r ghs figure 17: operation below resonance figure 18: auto restart for lamp replacement figure 19: typical bootstrap supply connection with vcc charge pump from half-bridge output (shaded area) a high voltage, fast recovery diode dboot (the so- called bootstrap diode) is connected between vcc (anode) and vb (cathode), and a capacitor cboot (the so-called bootstrap capacitor) is connected between the vb and vs pins. during half-bridge switching, when mosfet q2 is on and q1 is off, the bootstrap capacitor cboot is charged from the vcc decoupling capacitor, through the bootstrap diode dboot, and through q2. alternately, when q2 is off and q1 is on, the bootstrap diode is reverse-biased,
ir2157 17 advanced information and the bootstrap capacitor (which floats on the source of the upper power mosfet) serves as the power supply to the upper gate driver cmos circuitry. since the quiescent current in this cmos circuitry is very low (typically 45ma in the on-state), the majority of the drop in the vbs voltage when q1 is on occurs due to the transfer of charge from the bootstrap capacitor to the gate of the power mosfet. vb should be bypassed to vs as close as possible to the pins of the ic with a low esr/esl capacitor. a pcb layout example is shown in figure 20. a rule of thumb for the value of this capacitor is to keep its minimum value at least 50 times the value of the total input capacitance (ciss) of the mosfet or igbt being driven. in addition, the vs pin should be connected directly to the high side power mosfet source. c vcc (surface mount) d boot (surface mount) c boot (surface mount) c vcc (through hole) ir2157 pin 1 figure 20: supply bypassing pcb layout example characteristic curves 0 0.025 0.05 0.075 0.1 0.125 0.15 024681012 vcc ( volts ) i q cc ( ma ) t = -25 t = 25c t = 75c t = 125c 2.5 3 3.5 4 11.5 12.5 13.5 14.5 vcc ( volts ) i q cc ( ma ) t = -25 t = 25c t = 75c t = 125c 0 5 10 15 20 25 30 14.5 15 15.5 16 16.5 vcc ( volts ) i q cc ( ma ) t = -25 t = 25c t = 75c t = 125c 0.001 0.01 0.1 1 10 100 0246810121416 vcc ( volts ) i q cc ( ma ) figure 21: i qcc versus v cc figure 22: i qcc versus v cc and temperature (v cc < v cc+ ) figure 23: i qcc versus v cc and temperature (v cc > v cc+ ) figure 24: v clamp versus i qcc and temperature
ir2157 18 advanced information figure 27: f osc versus v cc and temperature (rt=330k w , ct=300pf) 52 52.25 52.5 52.75 53 53.25 53.5 53.75 54 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) fosc ( khz ) t = -25c t = 25c t = 75c t = 125c 190 192.5 195 197.5 200 202.5 205 207.5 210 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) fosc ( khz ) t = -25c t = 25c t = 75c t = 125c figure 30: t fall versus v cc and temperature figure 29: t dead versus v cc and temperature figure 25: v ccuv+ and v ccuv- versus temperature 9 9.5 10 10.5 11 11.5 12 -25 0 25 50 75 100 125 tem p erature ( c ) vccuv ( v ) vccuv+ vccuv- figure 26: i qbs1 versus v bs 0 10 20 30 40 50 60 70 80 0 2 4 6 8 10 12 14 16 18 20 vbs ( volts ) i q bs1 ( ua ) t = -25c t = 25c t = 75c t = 125c figure 28: f osc versus v cc and temperature (rt=6.2k w , ct=300pf) 900 910 920 930 940 950 960 970 980 990 1000 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) tdead ( nsec ) t = -25c t = 25c t = 75c t = 125c 20 30 40 50 60 70 80 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) tfall ( nsec ) t = -25c t = 25c t = 75c t = 125c
ir2157 19 advanced information figure 33: cs- threshold versus v cc and temperature figure 36: vdc+ threshold versus v cc and temperature figure 35: sd hysterisis versus v cc and temperature figure 31: t rise versus v cc and temperature figure 32: cs+ threshold versus v cc and temperature figure 34: sd+ threshold versus v cc and temperature 40 60 80 100 120 140 160 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) trise ( nsec ) t = -25c t = 25c t = 75c t = 125c 1 1.02 1.04 1.06 1.08 1.1 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) cs+ ( volts ) t = -25c t = 25c t = 75c t = 125c 0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) cs- ( volts ) t = -25c t = 25c t = 75c t = 125c 2 2.025 2.05 2.075 2.1 2.125 2.15 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) sd+ ( volts ) t = -25c t = 25c t = 75c t = 125c 0.1 0.125 0.15 0.175 0.2 0.225 0.25 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) sd h y sterisis ( volts ) t = -25c t = 25c t = 75c t = 125c 5 5.05 5.1 5.15 5.2 5.25 5.3 5.35 5.4 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) vdc+ ( volts ) t = -25c t = 25c t = 75c t = 125c
ir2157 20 advanced information world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 322 3331 ir great britain: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 15 lincoln court, brampton, ontario l6t 3z2 tel: (905) 453-2200 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo, japan 171 tel: 81 3 3983 0086 ir southeast asia: 1 kim seng promenade, great world city west tower, 13-11, singapore 237994 tel: 65 838 4630 ir taiwan: 16 fl. suite d..207, sec.2, tun haw south road, taipei, 10673, taiwan tel: 886-2-2377-9936 http://www.irf.com/ data and specifications subject to change without notice. 3/1/99 figure 39: v cphrun threshold versus v cc and temperature figure 37: vdc- threshold versus v cc and temperature figure 38: v cphign threshold versus v cc and temperature figure 40: i cph versus v cc and temperature 3 3.05 3.1 3.15 3.2 3.25 3.3 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) vdc- ( volts ) t = -25c t = 25c t = 75c t = 125c 3.9 3.95 4 4.05 4.1 4.15 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) vcphign ( volts ) t = -25c t = 25c t = 75c t = 125c 5 5.05 5.1 5.15 5.2 5.25 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) vcphrun ( volts ) t = -25c t = 25c t = 75c t = 125c 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 11 11.5 12 12.5 13 13.5 14 14.5 15 vcc ( volts ) icph ( ua ) t = -25c t = 25c t = 75c t = 125c

▲Up To Search▲

Price & Availability of IR2157S

	To Download IR2157S Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .