? semiconductor components industries, llc, 2001 june, 2001 rev. 0 1 publication order number: nbsg16/d nbsg16 product preview 2.5v / 3.3vsige differential receiver/driver with rsecl* outputs *reduced swing ecl the sg16 is a silicon germanium differential receiver/driver. the device is functionally equivalent to the ep16 and lvep16 devices with much higher bandwidth and lower emi capabilities. inputs contain internal 50 termination resistors and accept necl (negative ecl), pecl (positive ecl), hstl, gtl, ttl, cmos, cml, or lvds. outputs are rsecl (reduced swing ecl), 400 mv. for lvds, cml, or cmos outputs, use the device product numbers nbsgl16, nbsgm16, or nbsgc16. the v bb and v mm pins are internally generated voltage supplies available to this device only. the v bb is used for singleended necl or pecl inputs and the v mm pin is used for cmos inputs. for all singleended input conditions, the unused differential input is connected to v bb or v mm as a switching reference voltage. v bb or v mm may also rebias ac coupled inputs. when used, decouple v bb and v mm via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb and v mm outputs should be left open. ? maximum frequency > 12 ghz typical ? 40 ps typical rise and fall times ? rspecl output with rspecl, pecl, hstl, gtl, ttl, cmos, cml, or lvds inputs with operating range: v cc = 2.375 v to 3.6 v with v ee = 0 v ? rsnecl output with rsnecl or necl inputs with operating range: v cc = 0 v with v ee = 2.375 v to 3.6 v ? rsecl output level (400 mv peaktopeak output), differential output only ? 75 k pulldown resistor on d and d , 36.5 k pullup resistor on d ? 50 internal input resistors ? compatible with existing 2.5 v/3.3 v lvep, ep, and lvel devices ? esd protection: (tbd) ? v bb and v mm reference voltage output ? meets or exceeds jedec spec eia/jesd78 ic latchup test (tbd) ? moisture sensitivity level 3: ase requires drypack ? flammability rating: tbd ? transistor count: 167 devices this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. http://onsemi.com l = wafer lot y = year w = work week *for additional information, refer to application note and8002/d bga16 ba suffix case 489 marking diagram* sg 16 device package shipping ordering information nbsg16ba 4x4 bga16 810 units/tray nbsg16bar2 4x4 bga16 2500 tape & reel lyw
nbsg16 http://onsemi.com 2 50 pin description pin d*, d ** q, q rsecl data outputs function ecl, hstl, gtl, ttl, cmos. cml, lvds compatible inputs v bb ecl reference voltage output v cc positive supply v ee negative supply nc no connect * pin will default low when left open. ** pin will default to a slightly higher potential than d when both are left open. figure 1. pinout (top view) v ee d d vtd v ee v bb vtd nc nc v ee v cc v cc v mm v ee q q a b c d 12 34 50 (b2) vtd (b1) d (c1) d (c2) vtd v mm (d3) q (b4) q (c4) v bb (d2) v ee (a1, a4, d1, d4) v cc (b3, c3) vtd 50 internal input termination resistor vtd 50 internal input termination resistor v mm cmos reference voltage output, v cc /2 figure 2. logic diagram 75 75 36.5 maximum ratings (note 1.) symbol parameter condition 1 condition 2 rating units v cc positive power supply v ee = 0 v 3.8 v v ee negative power supply v cc = 0 v 3.8 v v i positive input v ee = 0 v v i v cc 3.8 v v i positive in ut negative input v ee = 0 v v cc = 0 v v i v cc v i v ee 3 . 8 3.8 v v i out output current continuous surge 25 50 ma ma i bb v bb sink/source 1 ma i mm v mm sink/source 1 ma ta operating temperature range 40 to +85 c t stg storage temperature range 65 to +150 c q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 16 bga 16 bga 149 127 c/w c/w q jc thermal resistance (junction to case) std bd 16 bga tbd c/w t sol wave solder tbd 265 c 1. maximum ratings are those values beyond which device damage may occur.
nbsg16 http://onsemi.com 3 dc characteristics, input with rspecl output v cc = 2.5 v; v ee = 0 v (note 2.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 25 ma v oh output high voltage (note 3.) 1400 mv v ol output low voltage (note 3.) 1000 mv v bb pecl output voltage reference 1200 v ihcmr input high voltage common mode range (note 4.) 1.2 2.5 1.2 2.5 1.2 2.5 v v mm cmos output voltage reference v cc /2 1250 mv r t internal termination resistor 50 w i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: sige circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 2. input and output parameters vary 1:1 with v cc . v ee can vary +0.125 v to 1.1 v. 3. all loading with 50 ohms to v cc 2.0 volts. 4. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. dc characteristics, input with rspecl output v cc = 3.3 v; v ee = 0 v (note 5.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 25 ma v oh output high voltage (note 6.) 2200 mv v ol output low voltage (note 6.) 1800 mv v bb pecl output voltage reference 2000 v ihcmr input high voltage common mode range (note 7.) 1.2 3.3 1.2 3.3 1.2 3.3 v v mm cmos output voltage reference v cc /2 1650 mv r t internal termination resistor 50 w i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: sige circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 5. input and output parameters vary 1:1 with v cc . v ee can vary +0.925 v to 0.3 v. 6. all loading with 50 ohms to v cc 2.0 volts. 7. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
nbsg16 http://onsemi.com 4 dc characteristics, necl or rsnecl input with necl output v cc = 0 v; v ee = 3.6 v to 2.375 v (note 8.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 25 ma v oh output high voltage (note 9.) 1100 mv v ol output low voltage (note 9.) 1500 mv v bb necl output voltage reference 1300 mv v ihcmr input high voltage common mode range (differential) (note 10.) v ee +1.2 0.0 v ee +1.2 0.0 v ee +1.2 0.0 v v mm cmos output voltage reference v ee /2 mv i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: sige circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 8. input and output parameters vary 1:1 with v cc . 9. all loading with 50 ohms to v cc 2.0 volts. 10. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. ac characteristics v cc = 0 v; v ee = 3.6 v to 2.375 v or v cc = 2.375 v to 3.6 v; v ee = 0 v 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum frequency (see figure 3. f max /jitter) (note 11.) > 12 ghz t plh , t phl propagation delay to p to p output differential 150 ps t skew duty cycle skew (note 12.) tbd ps t jitter cycletocycle jitter (see figure 3. f max /jitter) (note 11.) tbd ps v pp input voltage swing 150 400 mv t r t f output rise/fall times q, q (20% 80%) 40 ps 11. measured using a 400 mv source, 50% duty cycle clock source. all loading with 50 ohms to v cc 2.0 v. 12. skew is measured between outputs under identical transitions. duty cycle skew is defined only for differential operation whe n the delays are measured from the cross point of the inputs to the cross point of the outputs.
nbsg16 http://onsemi.com 5 0 100 200 300 400 500 600 700 800 900 0 2000 4000 6000 8000 10000 12000 frequency (mhz) 1 2 3 4 5 6 7 8 figure 3. f max /jitter 9 tbd v outpp (mv) jitter out ps (rms) v tt = v cc 2.0 v driver device receiver device q qb d db 50 50 v tt figure 4. typical termination for output driver and device evaluation (refer to application note and8020 termination of ecl logic devices) resource reference of application notes an1404 eclinps circuit performance at nonstandard v ih levels an1405 ecl clock distribution techniques an1406 designing with pecl (ecl at +5.0 v) an1504 metastability and the eclinps family an1568 interfacing between lvds and ecl an1650 using wireor ties in eclinps designs an1672 the ecl translator guide and8001 odd number counters design and8002 marking and date codes and8009 eclinps plus spice i/o model kit and8020 termination of ecl logic devices for an updated list of application notes, please see our website at http://onsemi.com.
nbsg16 http://onsemi.com 6 package dimensions bga16 ba suffix plastic 4 x 4 bga flip chip package case 489 issue o 0.20 laser mark for pin 1 identification in this area d e m a1 a2 a 0.10 z 0.15 z rotated 90 clockwise detail k 5 view mm e 3 x s m x 0.15 y z 0.08 z 3 b 16 x feducial for pin a1 identification in this area 4321 a b c d 4 16 x notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimension b is measured at the maximum solder ball diameter, parallel to datum plane z. 4. datum z (seating plane) is defined by the spherical crowns of the solder balls. 5. parallelism measurement shall exclude any effect of mark on top surface of package. dim min max millimeters a 1.40 max a1 0.25 0.35 a2 1.20 ref b 0.30 0.50 d 4.00 bsc e 4.00 bsc e 1.00 bsc s 0.50 bsc k x y m m z
nbsg16 http://onsemi.com 7 notes
nbsg16 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nbsg16/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada
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