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  edi8f3232c 32kx32 sram module 1 edi8f3232c rev. 6 1/98 eco #9601 features pin configurations and block diagram 32kx32 static ram cmos, high speed module the edi8f3232c is a high speed megabit static ram module organized as 32kx32. this module is constructed from four 32kx8 static rams in soj packages on an epoxy laminate (fr4) board. four chip enables (e?-e3) are used to independently enable the four bytes. reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. the edi8f3232c is offered in both 64 lead simm and 64 pin zip packages, which enables one megabit of memory to be placed in less than 1.2 square inches of board space. all inputs and outputs are ttl compatible and operate from a single 5v supply. fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use. a?-a14 w g e? e1 e2 e3 dq?-dq7 dq8-dq15 dq16-dq23 dq24-dq31 15 8 8 8 8 32kx32 bit cmos static random access memory ? access times 12, 15, 20, and 25ns ? individual byte selects ? output enable function ? fully static, no clocks ? ttl compatible i/o high density packaging ? 64 pin simm, no. 54 ? 64 pin zip, no. 57 ? jedec standard pinout ? common data inputs and outputs single +5v (10%) supply operation zip simm pin names pin names a0-a14 address inputs e?-e3 chip enable w write enable g output enable dq?-dq31 common data input/output vcc power (+5v10%) vss ground nc no connection vss pd2 dq8 dq9 dq10 dq11 a? a1 a2 dq12 dq13 dq14 dq15 vss nc e1 e3 nc g dq24 dq25 dq26 dq27 a3 a4 a5 vcc a6 dq28 dq29 dq30 dq31 pd1 dq? dq1 dq2 dq3 vcc a7 a8 a9 dq4 dq5 dq6 dq7 w a14 e? e2 nc vss dq16 dq17 dq18 dq19 a10 a11 a12 a13 dq20 dq21 dq22 dq23 vss 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 electronic designs incorporated ? one research drive ? westborough, ma 01581usa ? 508-366-5151 ? fax 508-836-4850 ? electronic designs europe ltd. ? shelley house, the avenue ? lightwater, surrey gu18 5rf united kingdom ? 01276 472637 ? fax: 01276 473748 http://www.electronic-designs.com pd1=open pd2 = vss vss pd2 dq8 dq9 dq10 dq11 a? a1 a2 dq12 dq13 dq14 dq15 vss nc e1 e3 nc g dq24 dq25 dq26 dq27 a3 a4 a5 vcc a6 dq28 dq29 dq30 dq31 pd1 dq? dq1 dq2 dq3 vcc a7 a8 a9 dq4 dq5 dq6 dq7 w a14 e? e2 nc vss dq16 dq17 dq18 dq19 a10 a11 a12 a13 dq20 dq21 dq22 dq23 vss 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63
2 edi8f3232c rev. 6 1/98 eco #9601 edi8f3232c 32kx32 sram module absolute maximum ratings* recommended dc operating conditions dc electrical characteristics parameter sym conditions min typ* max units operating power icc1 w, e = vil, ii/o = 0ma, 12ns -- 640 ma supply current min cycle 15ns -- 600 ma 20ns -- 560 ma 25ns -- 520 ma standby (ttl) power icc2 e 3 vih, vin vil -- 225 ma supply current vin 3 vih full standby power icc3 e 3 vcc-0.2v -- 80 ma supply current vin 3 vcc-0.2v or cmos vin 0.2v input leakage current ili vin = 0v to vcc -- -- 20 a output leakage current ilo v i/o = 0v to vcc -- -- 20 a output high voltage voh ioh =-4.0ma 2.4 -- -- v output low voltage vol iol = 8.0ma -- -- 0.4 v capacitance (f=1.0mhz, vin=vcc or vss) parameter sym max unit parameter sym max unit address lines ci 60 pf data lines cd/q 20 pf chip enable line cc 20 pf control lines cw 60 pf these parameters are sampled, not 100% tested. ac test conditions *stress greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. parameter sym min typ max units supply voltage vcc 4.5 5.0 5.5 v supply voltage vss 0 0 0 v input high voltage vih 2.2 -- 6.0 v input low voltage vil -0.3 -- 0.8 v (note: for tehqz,tghqz and twlqz, cl = 5pf) voltage on any pin relative to vss -0.5v to 7.0v operating temperature ta (ambient) commercial 0c to +70c industrial -40c to +85c storage temperature plastic -55c to +125c power dissipation 4 watts output current. 20 ma input pulse levels vss to 3.0v input rise and fall times 5ns input and output timing levels 1.5v output load 1ttl, cl =30pf *typical: ta = 25c, vcc = 5.0v g e w mode output power x h x standby high z icc2, icc3 h l h output deselect high z icc1 l l h read dout icc1 x l l write din icc1 truth table
edi8f3232c 32kx32 sram module 3 edi8f3232c rev. 6 1/98 eco #9601 ac characteristics read cycle symbol 12ns 15ns 20ns 25ns parameter jedec alt. min max min max min max min max units read cycle time tavav trc 12 15 20 25 ns address access time tavqv taa 12 15 20 25 ns chip enable access time telqv tacs 12 15 20 25 ns chip enable to output in low z (1) telqx tclz 5 5 5 5 ns chip disable to output in high z (1) tehqz tchz 0 5 0 9 0 11 0 13 ns output hold from address change tavqx toh 3 3 3 3 ns output enable to output valid tglqv toe 6 8 10 12 ns output enable to output in low z (1) tglqx tolz 0 0 0 0 ns output disable to output in high z(1) tghqz tohz 0 5 0 8 0 10 0 10 ns read cycle 1 - w high, g, e low note 1: parameter guaranteed, but not tested. tavav tavqv tavqx data 2 a q address 1 address 2 data 1 tghqz telqv telqx e g q tehqz a tavav tglqv tglqx tavqv read cycle 2 - w high
4 edi8f3232c rev. 6 1/98 eco #9601 edi8f3232c 32kx32 sram module ac characteristics write cycle note 1: parameter guaranteed, but not tested. write cycle 1 - w controlled a e w d q tavav telwh tavwh twlwh tavwl tdvwh twhdx twhqx high z twlqz data valid twhax write cycle 2 - e controlled a w e d q tavav tavel tehax tdveh tehdx teleh taveh data valid high z twleh symbol 12ns 15ns 20ns 25ns parameter jedec alt. min max min max min max min max units write cycle time tavav twc 12 15 20 25 ns chip enable to end of write telwh tcw 10 12 13 15 ns teleh tcw 10 12 13 15 ns address setup time tavwl tas 0 0 0 0 ns tavel tas 0 0 0 0 ns address valid to end of write tavwh taw 10 12 13 15 ns taveh taw 10 12 13 15 ns write pulse width twlwh twp 10 11 12 15 ns twleh twp 10 11 12 15 ns write recovery time twhax twr 0 0 0 0 ns tehax twr 0 0 0 0 ns data hold time twhdx tdh 0 0 0 0 ns tehdx tdh 0 0 0 0 ns write to output in high z (1) twlqz twhz 0 3 0 3 0 3 0 5 ns data to write time tdvwh tdw 7 8 9 10 ns tdveh tdw 7 8 9 10 ns output active from end of write (1) twhqx twlz 0 0 0 0 ns
edi8f3232c 32kx32 sram module 5 edi8f3232c rev. 6 1/98 eco #9601 part number speed package (ns) no. edi8f3232c12mmc 12 54 edi8f3232c15mmc 15 54 edi8f3232c20mmc 20 54 edi8f3232c25mmc 25 54 edi8f3232c12mzc 12 57 edi8f3232c15mzc 15 57 edi8f3232c20mzc 20 57 edi8f3232c25mzc 25 57 note: to order an industrial grade product change the last c in the suffix to i, eg. edi8f3232c25mzc becomes edi8f3232c25mzi. package no. 54 64 pin simm module package description 0.520 max 3.584 0.050 typ 0.213 max 0.250 typ 0.400 0.250 0.080 p64 0.62r 3.855 31 x 0.050 1.550 ref. p1 0.125 dia. typ. (2 plcs.) 0.400 0.125 min package no. 57 64 pin zip module 0.100 typ 0.530 max 3.660 3.640 0.130 0.120 0.050 0.022 0.018 0.250 typ 0.050 0.165 0.135 0.100 typ 0.008 0.014 0.050 typ 0.225 max ordering information
6 edi8f3232c rev. 6 1/98 eco #9601 edi8f3232c 32kx32 sram module electronic designs incorporated ? one research drive ? westborough, ma 01581usa ? 508-366-5151 ? fax 508-836-4850 ? electronic designs europe ltd. ? shelley house, the avenue ? lightwater, surrey gu18 5rf united kingdom ? 01276 472637 ? fax: 01276 473748 http://www.electronic-designs.com electronic designs inc. reserves the right to change specifications without notice. cage no. 66301


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