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pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use pm5352 s/uni-star saturn user network interface (star) data sheet issue 2: february 2000
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use i public revision history issue no. issue date details of change 2 february, 2000 added additional bytes to software initialization (section 8.1) to further reduce power consumption. dc characteristics section was added. 1 december, 1999 released data sheet (replaces draft data sheet issue 2)
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use ii table of contents 1 features .............................................................................................. 1 1.1 general ..................................................................................... 1 1.2 the sonet receiver .............................................................. 2 1.3 the receive atm processor .............................................. 3 1.4 the receive pos processor .............................................. 3 1.5 the sonet transmitter ....................................................... 4 1.6 the transmit atm processor ............................................ 4 1.7 the transmit pos processor ........................................... 5 2 applications ....................................................................................... 6 3 references......................................................................................... 7 4 datasheet overview........................................................................ 9 5 pin diagram ....................................................................................... 10 6 pin description.................................................................................11 6.1 line side interface signals ..............................................11 6.2 section and line status dcc signals ........................... 14 6.3 atm (utopia) and packet over sonet (pos-phy) system interface ................................................................ 15 6.4 microprocessor interface signals ............................ 34 6.5 jtag test access port (tap) signals ............................ 36 6.6 analog signals..................................................................... 37 6.7 power and ground ............................................................. 37 7 microprocessor interface ....................................................... 45 8 operations........................................................................................ 56 8.1 device initialization............................................................ 56
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use iii 9 test features description ........................................................ 57 9.1 master test register ........................................................ 57 9.2 jtag test port ...................................................................... 59 10 dc characteristics ....................................................................... 69 11 ordering and thermal information........................................ 70 12 mechanical information.............................................................. 71
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 1 1 features 1.1 general ? single chip atm user-network interface operating at 155.52 mbit/s. ? implements the atm forum user network interface specification and the atm physical layer for broadband isdn according to ccitt recommendation i.432. ? implements the point-to-point protocol (ppp) over sonet/sdh specification according to rfc 1619/1662 of the ppp working group of the internet engineering task force (ietf). ? processes duplex 155.52 mbit/s sts-3c (stm-1) data streams with on-chip clock and data recovery and clock synthesis. ? exceeds bellcore gr-253-core jitter tolerance and intrinsic jitter criteria. ? exceeds bellcore gr-253-core jitter transfer and phase variation criteria. ? provides control circuitry required to exceed bellcore gr-253-core wan clocking requirements related to wander transfer, holdover and long term stability when using an external vcxo. ? compatible with atm forum?s utopia level 2 specification with multi- phy addressing and parity support. ? implements the pos-phy 16-bit system interface for packet over sonet/sdh (pos) applications. this system interface is similar to utopia level 2, but adapted to packet transfer. both byte-level and packet-level transfer modes are supported. ? provides a standard 5 signal ieee 1149.1 jtag test port for boundary scan board test purposes. ? provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring. ? low power 3.3v cmos with pecl and ttl compatible inputs and cmos/ttl outputs, with 5v tolerance inputs (system side interface is 3.3v only).
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 2 ? industrial temperature range (-40 c to +85 c). ? 304 pin super bga package. 1.2 the sonet receiver ? provides a serial interface at 155.52 mbit/s. ? recovers the clock and data. ? frames to and de-scrambles the recovered stream. ? detects signal degrade (sd) and signal fail (sf) threshold crossing alarms based on received b2 errors. ? captures and debounces the synchronization status (s1) byte in a readable register. ? filters and captures the automatic protection switch channel (k1, k2) bytes in readable registers and detects aps byte failure. ? counts received section bip-8 (b1) errors, received line bip-24 (b2) errors, line far end block errors (febe), and received path bip-8 (b3) errors and path far end block errors (febe). ? detects loss of signal (los), out of frame (oof), loss of frame (lof), line alarm indication signal (lais), line remote defect indication (lrdi), loss of pointer (lop), path alarm indication signal (pais), path remote defect indication (prdi) and path extended remote defect indicator (perdi). ? extracts the section and line data communication channels (d1-d3 and d4-12) as selected in internal register banks and serializes them at 192 kbit/s (d1-d3) and 576 kbit/s (d4-d12) for optional external processing. ? extracts the 16 or 64 byte section trace (j0) sequence and the 16 or 64 byte path trace (j1) sequence into internal register banks. ? interprets the received payload pointer (h1, h2) and extracts the sts- 3c (stm-1) synchronous payload envelope and path overhead. ? provides a divide by 8 recovered clock (19.44 mhz). ? provides a 8khz receive frame pulse.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 3 1.3 the receive atm processor ? extracts atm cells from the received sts-3c (stm-1) synchronous payload envelope using atm cell delineation. ? provides atm cell payload de-scrambling. ? performs header check sequence (hcs) error detection and correction, and idle/unassigned cell filtering. ? detects out of cell delineation (ocd) and loss of cell delineation (lcd). ? counts number of received cells, idle cells, errored cells and dropped cells. ? provides a synchronous 8-bit wide, four-cell fifo buffer. 1.4 the receive pos processor ? generic design that supports packet based link layer protocols, like ppp, hdlc and frame relay. ? performs self synchronous pos data de-scrambling on spe payload (x 43 +1 polynomial). ? performs flag sequence detection and terminates the received pos frames. ? performs frame check sequence (fcs) validation. the pos processor supports the validation of both crc-ccitt and crc-32 frame check sequences. ? performs control escape de-stuffing. ? checks for packet abort sequence. ? checks for octet aligned packet lengths and for minimum and maximum packet lengths. automatically deletes short packets (software configurable), and marks those exceeding the maximum length as errored. ? provides a synchronous 256 byte fifo buffer accessed through a 16- bit data bus on the pos-phy system interface.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 4 1.5 the sonet transmitter ? synthesizes the 155.52 mhz transmit clock from a 19.44 mhz reference. ? provides a differential ttl serial interface (can be adapted to pecl levels) at 155.52 mbit/s with both line rate data (txd+/-) and clock (txc+/-). ? provides a transmit frame pulse input to align the transport frames to a system reference. ? provides a transmit byte clock (divide by eight of the synthesized line rate clock) to provide a timing reference for the transmit outputs. ? optionally inserts register programmable aps (k1, k2) and synchronization status (s1) bytes. ? optionally inserts path alarm indication signal (pais), path remote defect indication (prdi), line alarm indication signal (lais) and line remote defect indication (lrdi). ? inserts path bip-8 codes (b3), path far end block error (g1) indications, line bip-24 codes (b2), line far end block error (m1) indications, and section bip-8 codes (b1) to allow performance monitoring at the far end. ? optionally inserts the section and line data communication channels (d1-d3 or d4-12) via a 192 kbit/s (d1-d3) and 576 kbit/s (d4-d12) serial stream. ? optionally inserts the 16 or 64 byte section trace (j0) sequence and the 16 or 64 byte path trace (j1) sequence from internal register banks. ? scrambles the transmitted sts-3c (stm-1) stream and inserts the framing bytes (a1,a2). ? inserts atm cells or pos frames into the transmitted sts-3c (stm-1) synchronous payload envelope. 1.6 the transmit atm processor ? provides idle/unassigned cell insertion.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 5 ? provides hcs generation/insertion, and atm cell payload scrambling. ? counts number of transmitted and idle cells. ? provides a synchronous 8-bit wide, four cell fifo buffer. 1.7 the transmit pos processor ? generic design that supports any packet based link layer protocol, like ppp, hdlc and frame relay. ? performs self synchronous pos data scrambling (x 43 + 1 polynomial). ? encapsulates packets within a pos frame. ? performs flag sequence insertion. ? performs byte stuffing for transparency processing. ? performs frame check sequence generation. the pos processor supports the generation of both crc-ccitt and crc-32 frame check sequences. ? aborts packets under the direction of the host or when the fifo underflows. ? provides a synchronous 256 byte fifo buffer accessed through the16-bit data bus on the pos-phy system interface.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 6 2 applications ? dslam uplinks ? access concentrators ? wan and edge atm switches. ? lan switches and hubs. ? layer 3 switches. ? multiservice switches (fr, atm, ip, etc..).
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 7 3 references ? bell communications research - gr-253-core ?sonet transport systems: common generic criteria?, issue 2, december 1995. ? bell communications research - gr-436-core ?digital network synchronization plan?, issue 1 revision 1, june 1996.. ? itu-t recommendation g.703 - "physical/electrical characteristics of hierarchical digital interfaces", 1991. ? itu-t recommendation g.704 - "general aspects of digital transmission systems; terminal equipment - synchronous frame structures used at 1544, 6312, 2048, 8488 and 44 736 kbit/s hierarchical levels", july, 1995. ? itu, recommendation g.707 - "network node interface for the synchronous digital hierarchy", 1996. ? itu recommendation g781, ?structure of recommendations on equipment for the synchronous design hierarchy (sdh)?, january 1994. ? itu, recommendation g.783 - "characteristics of synchronous digital hierarchy (sdh) equipment functional blocks", 1996. ? itu recommendation i.432, ?isdn user network interfaces?, march 93. ? atm forum - atm user-network interface specification, v3.1, october, 1995. ? atm forum - ?utopia, an atm phy interface specification, level 2, version 1?, june, 1995. ? ietf network working group ? rfc-1619 ?point to point protocol (ppp) over sonet/sdh specification?, may 1994. ? ietf network working group - rfc-1661 ?the point to point protocol (ppp)?, july 1994. ? ietf network working group - rfc-1662 ?ppp in hdlc like framing?, july 1994.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 8 ? pmc-971147 ?saturn compliant interface for packet over sonet physical layer and link layer devices, level 2?, issue 3, february 1998. ? pmc-950820 ?sonet/sdh bit error threshold monitoring application note?, issue 2, september 1998.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 9 4 datasheet overview the pm5352 s/uni-star is functionally equivalent to a single channel pm5351 s/uni-tetra (tetra channel #4). the devices are software compatible and pin compatible. this datasheet provides a complete pin- out description for the s/uni-star, as well as any differences between these devices (including boundary scan register, test mode 0 register). for a complete functional and register description, please refer to the pmc- 971240.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 10 5 pin diagram the s/uni-star is available in a 304 pin sbga package having a body size of 31 mm by 31 mm and a ball pitch of 1.27 mm. 23 22212019181716151413121110987654321 a vdd vss tdat[12] tdat[15] phy_oen vss d[2] vss a[0] a[3] a[7] vss a[10] wrb tdo vss n/c vss n/c ravd1_b ravs1_b vss vdd b vss vdd vss tdat[13] stpa n/c d[1] d[4] d[6] a[2] a[6] a[9] csb rstb tms tck n/c n/c qavs_2 n/c vss vdd vss c tdat[7] vss vdd tdat[10] tdat[14] teop bias d[3] d[5] a[1] a[5] a[8] ale intb trstb n/c n/c qavd_2 n/c ravd1_c vdd vss n/c d tdat[4] tdat[6] tdat[9] vdd tdat[11] vdd terr d[0] vdd d[7] a[4] vdd rdb tdi vdd n/c n/c vdd ravs1_c vdd n/c n/c vss e tdat[0] tdat[3] tdat[5] tdat[8] n/c vss vss n/c f vss tmod tdat[2] vdd vdd ravs1_a n/c vss g vdd tadr[0] tadr[2] tdat[1] ravd1_a n/c vss vss h vss tprty vdd tadr[1] n/c ravs2_a ravd2_a vss j tca / ptpa tenb tsoc / tsop vdd vdd vss n/c ravd2_c k n/c dtca / dtpa bias tfclk bottom view ravs2_c ravs2_b n/c n/c l reop rerr n/c n/c ravd2_b tavd1_a tavs1_a tavd1_b m vss rval drca / drpa vdd vdd tavs1_b ravd3_b vss n n/c n/c n/c rca / prpa ravd3_c ravs3_b n/c n/c p rsoc / rsop renb rfclk radr[1] atb2 atb1 atb0 ravs3_c r radr[2] radr[0] vdd vdd vdd n/c n/c atb3 t vss vdd rprty rdat[13] ravs3_a n/c n/c vss u rdat[15] rdat[14] rdat[12] rdat[9] txcp vss ravd3_a n/c v vss rdat[11] rdat[8] vdd vdd txcn vss vss w rdat[10] rdat[7] rdat[5] rdat[2] ravs4_a sd txdp vss y rdat[6] rdat[4] rdat[1] vdd rmod vdd n/c n/c vdd n/c n/c vdd n/c n/c vdd vss tfpi vdd ravs4_c vdd ravd4_a rx- txdn aa rdat[3] vss vdd rdat[0] n/c n/c n/c rld n/c n/c n/c n/c tldclk tsdclk tld vss vss qavd_1 c- ravd4_c vdd vss rx+ ab vss vdd vss n/c rldclk rsd n/c n/c ralrm rclk rfpo n/c tfpo n/c n/c vss tsd vss qavs_1 c+ vss vdd vss ac vdd vss rsdclk n/c n/c vss n/c vss n/c n/c n/c vss tclk n/c n/c vss vss vss refclk ravd4_b ravs4_b vss vdd
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 11 6 pin description 6.1 line side interface signals pin name type pin no. function refclk input ac5 the reference clock input (refclk) must provide a jitter-free 19.44 mhz reference clock. it is used as the reference clock by both clock recovery and clock synthesis circuits. when the wan synchronization controller is used, refclk is supplied using a vcxo. in this application, the transmit direction can be looped timed to any of the line receivers in order to meet wander transfer and holdover requirements. . rxd+ rxd- differential pecl inputs aa1 y2 the receive differential data inputs (rxd+, rxd-) contain the nrz bit serial receive stream. the receive clock is recovered from the rxd+/- bit stream. please refer to the operation section for a discussion of pecl interfacing issues. sd single- ended pecl input w3 the signal detect pin (sd) indicates the presence of valid receive signal power from the optical physical medium dependent device. a pecl high indicates the presence of valid data and a pecl low indicates a loss of signal. it is mandatory that sd be terminated into the equivalent network that rxd+/- is terminated into. . rclk output ab14 the receive byte clock (rclk) provides a timing reference for the s/uni-star receive outputs. rclk is a divide by eight of the recovered line rate clock (19.44 mhz). .
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 12 pin name type pin no. function rfpo output ab13 the receive frame pulse output (rfpo), when the framing alignment is found (the oof register bit is logic zero), is an 8 khz signal derived from the receive line clock. rfpo pulses high for one rclk cycle every 2430 rclk cycles (sts-3c (stm-1)). rfpo is updated on the rising edge of rclk. ralrm output ab15 the receive alarm (ralrm) output indicates the state of the receive framing. ralrm is low if no receive alarms are active. ralrm is high if line ais (lais), path ais (pais), line rdi (lrdi), path rdi (prdi), enhanced path rdi (perdi), loss of signal (los), loss of frame (lof), out of frame (oof), loss of pointer (lop), loss of cell delineation (lcd), signal fail ber (sfber), signal degrade ber (sdber), path trace identification mismatch (tim), path signal label mismatch (pslm) is detected in the channel. each alarm can be individually enabled using bits in the s/uni-star channel alarm control registers #1 and #2. ralrm is updated on the rising edge of rclk. . txd+ txd- differential ttl outpu t (externally converted to pecl) w2 y1 the transmit differential data outputs (txd+, txd-) contain the 155.52 mbit/s transmit stream. . txc+ txc- differential ttl outpu t (externally converted to pecl) u4 v3 the transmit differential clock outputs (txc+, txc-) contain the 155.52 mbit/s transmit clock. txc+/- must be enabled by setting the txc_oe register bit to logic one.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 13 pin name type pin no. function tfpi input y7 the active high framing position (tfpi) signal is an 8 khz timing marker for the transmitter. tfpi is used to align the sonet/sdh transport frame generated by the s/uni-star device to a system reference. tfpi is internally used to align a master frame pulse counter. when tfpi is not used, this counter is free-running. tfpi should be brought high for a single tclk period every 2430 (sts-3c (stm-1)) tclk cycles, or a multiple thereof. tfpi shall be tied low if such synchronization is not required. tfpi cannot be used as an input to a loop-timed channel. for tfpi to operate correctly it is required that the tclk/tfpo output be configured to output the csu byte clock. the tfpi_en register bits allow use of the global framing pulse counter and tfpi for framing alignment. tfpi is sampled on the rising edge of tclk, but only when the ttsel register bit is set to logic zero. when ttsel is set to logic one, tfpi is unused. tfpo output ab11 the transmit frame pulse output (tfpo) pulses high for one tclk cycle every 2430 tclk cycles and provides an 8 khz timing reference. tfpo can be enabled using tfpo_ch[1:0] configuration register bits, with the restriction that the device must be self-timed (not in loop-timed or line-loopback modes). tfpo is updated on the rising edge of tclk. tclk output ac11 the transmit byte clock (tclk) output provides a timing reference for the s/uni-star self-timed channel. tclk always provide a divide by eight of the synthesized line rate clock and thus has a nominal frequency of 19.44 mhz. tfpi is sampled on the rising edge of tclk. tclk does not apply to internally loop-timed channels, in which case rclk provides transmit timing information.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 14 6.2 section and line status dcc signals pin name type pin no. function rsd output ab18 the receive section dcc (rsd) signal contains the section data communications channel (d1-d3) rsdclk output ac21 the receive section dcc clock (rsdclk) is used to clock out the section dcc. rsdclk is a 192 khz clock used to update the rsd output. rsdclk is generated by gapping a 216 khz clock. tsd input ab7 the transmit section dcc (tsd) signal contains the section data communications channel (d1-d3). tsd is sampled on the rising edge of tsdclk. tsdclk output aa10 the transmit section dcc clock (tsdclk) is used to clock in the section dcc. tsdclk is a 192 khz clock used to sample the tsd input. tsdclk is generated by gapping a 216 khz clock. rld output aa16 the receive line dcc (rld) signal contains the line data communications channel (d4-d12). rldclk output ab19 the receive line dcc clock (rldclk) is used to clock out the line dcc. rldclk is a 576 khz clock used to update the rld output. rldclk is generated by gapping a 2.16 mhz clock. tld input aa9 the transmit line dcc (tld) signal contains the line data communications channel (d4-d12). tld is sampled on the rising edge of tldclk. tldclk output aa11 the transmit line dcc clock (tldclk) is used to clock in the line dcc. tldclk is a 576 khz clock used to sample the tld input. tldclk is generated by gapping a 2.16 mhz clock.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 15 6.3 atm (utopia) and packet over sonet (pos-phy) system interface pin name type pin no. function tdat[15] tdat[14] tdat[13] tdat[12] tdat[11] tdat[10] tdat[9] tdat[8] tdat[7] tdat[6] tdat[5] tdat[4] tdat[3] tdat[2] tdat[1] tdat[0] input (atm) a20 c19 b20 a21 d19 c20 d21 e20 c23 d22 e21 d23 e22 f21 g20 e23 utopia transmit cell data bus (tdat[15:0]). this data bus carries the atm cell octets that are written to the selected transmit fifo. tdat[15:0] is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tdat[15:0] is sampled on the rising edge of tfclk. tdat[15] tdat[14] tdat[13] tdat[12] tdat[11] tdat[10] tdat[9] tdat[8] tdat[7] tdat[6] tdat[5] tdat[4] tdat[3] tdat[2] tdat[1] tdat[0] input (pos) a20 c19 b20 a21 d19 c20 d21 e20 c23 d22 e21 d23 e22 f21 g20 e23 pos-phy transmit packet data bus (tdat[15:0]). this data bus carries the pos packet octets that are written to the selected transmit fifo. tdat[15:0] is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tdat[15:0] is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 16 pin name type pin no. function tprty input (atm) h22 utopia transmit bus parity (tprty) signal. the transmit parity (tprty) signal indicates the parity of the tdat[15:0] bus. a parity error is indicated by a status bit and a maskable interrupt. cells with parity errors are inserted in the transmit stream, so the tprty input may be unused. odd or even parity selection is made using the rxptyp register bit. tprty is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tprty is sampled on the rising edge of tfclk. tprty input (pos) h22 pos-phy transmit bus parity (tprty) signal. the transmit parity (tprty) signal indicates the parity of the tdat[15:0] bus. a parity error is indicated by a status bit and a maskable interrupt. packets with parity errors are inserted in the transmit stream, so the tprty input may be unused. odd or even parity selection is made using the rxptyp register bit. tprty is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tprty is sampled on the rising edge of tfclk tsoc input (atm) j21 utopia transmit start of cell (tsoc) signal. the transmit start of cell (tsoc) signal marks the start of cell on the tdat bus. when tsoc is high, the first word of the cell structure is present on the tdat bus. it is not necessary for tsoc to be present for each cell. an interrupt may be generated if tsoc is high during any word other than the first word of the cell structure. tsoc is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tsoc is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 17 pin name type pin no. function tsop input (pos) j21 pos-phy transmit start of packet (tsop) signals. tsop indicates the first word of a packet. tsop is required to be present at the beginning of every packet for proper operation. tsop is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tsop is sampled on the rising edge of tfclk. tenb input (atm) j22 utopia transmit multi-phy write enable (tenb) signal. the tenb signal is an active low input which is used along with the tadr[2:0] inputs to initiate writes to the transmit fifo?s. tenb works as follows. when sampled high, no write is performed, but the tadr[2:0] address is latched to identify the transmit fifo to be accessed. when tenb is sampled low, the word on the tdat bus is written into the transmit fifo that is selected by the tadr[2:0} address bus. a complete 53 octet cell must be written to the transmit fifo before it is inserted into the transmit stream. idle cells are inserted when a complete cell is not available. while tenb is deasserted, tadr[2:0] can be used for polling tca. tenb is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 18 pin name type pin no. function tenb input (pos) j22 pos-phy transmit multi-phy write enable (tenb) signal. the s/uni-star supports both byte-level and packet-level transfer. packet-level transfer operates in a similar fashion to utopia, with a selection phase when tenb is deasserted and a transfer phase when tenb is asserted. while tenb is asserted, tadr[2:0] is used for polling ptpa and the currently selected phy status is provided on stpa. byte level transfer works on a cycle basis. when tenb is asserted, data is transferred to the selected phy. nothing happens when tenb is deasserted. polling is not available and packet availability is indicated by dtpa. tenb is sampled on the rising edge of tfclk. tadr[2] tadr[1] tadr[0] input (atm) g21 h20 g22 transmit address (tadr[2:0]). the tadr[2:0] bus is used for device selection and device polling in accordance with the utopia level 2 standard. when tadr[2:0] is set to the same value as the phy_adr[2:0] inputs than the transmit interface of this s/uni-star is either being selected or polled. note that the null-phy address 0x7 is an invalid address and cannot be used to select the s/uni- star. tadr[2:0] is sampled on the rising edge of tfclk. tadr[2] tadr[1] tadr[0] input (pos) g21 h20 g22 pos-phy transmit write address (tadr[2:0]) signals. the tadr[2:0] bus is used to select the fifo (and hence port) that is written to using the tenb signal. in packet level transfer mode, tadr[2:0] is also used for polling on ptpa. note that address 0x7 is the null-phy address and cannot be used to select thes/uni-star. tadr[2:0] is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 19 pin name type pin no. function tca output (atm) j23 utopia transmit multi-phy cell available (tca) the tca signal indicates when a cell is available in the transmit fifo for the port polled by tadr[2:0] when tenb is asserted. when high, tca indicates that the transmit fifo is not full and a complete cell may be written. when tca goes low, it can be configured to indicate either that the transmit fifo is near full or that the transmit fifo is full. tca will transition low on the rising edge of tfclk after the payload word 19 (tcalevel0=0) or 23 (tcalevel0=1) is sampled if the phy being polled is the same as the phy in use. to reduce fifo latency, the fifo depth at which tca indicates "full" can be set to one, two, three or four cells. note that regardless of what fill level tca is set to indicate "full" at, the transmit cell processor can store 4 complete cells. tca is tri-stated when either the null-phy address (0x7) or an address not matching the address set by phy_adr[2:0] is latched from the tadr[2:0] inputs when tenb is high. tca is updated on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 20 pin name type pin no. function ptpa j23 pos-phy polled transmit multi-phy packet available (ptpa). ptpa transitions high when a programmable minimum number of bytes is available in the polled transmit fifo (tpahwm[7:0] register bits). once high, ptpa indicates that the transmit fifo is not full. when ptpa transitions low, it optionally indicates that the transmit fifo is full or near full (tpalwm[7:0] register bits). ptpa allows to poll the phy address selected by tadr[2:0] when tenb is asserted. ptpa is tri-stated when either the null-phy address (0x7) or an address not matching the address set by phy_adr[2:0] is latched from the tadr[2:0] inputs when tenb is high. ptpa is only available in pos-phy packet-level transfer mode, as selected by the pos_plvl register bit. ptpa is tristated in byte-level transfer mode. ptpa is updated on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 21 pin name type pin no. function stpa output (pos) b19 pos-phy selected multi-phy transmit packet available (stpa) signal. stpa transitions high when a predefined (tpahwm[7:0] register bits) minimum number of bytes is available in the selected transmit fifo (the fifo that data is written into). once high, stpa indicates that the transmit fifo is not full. when stpa transitions low, it optionally indicates that the transmit fifo is full or near full (tpalwm[7:0] register bits). stpa always provide status indication for the selected phy in order to avoid fifo overflows while polling is performed. the phy layer device shall tristate stpa when tenb is deasserted. stpa shall also be tristated when either the null-phy address (0x7h) or an address not matching the address set by phy_adr[2:0] is presented on the tadr[2:0] signals when tenb is sampled high (deasserted during the previous clock cycle). stpa is only available in pos-phy packet-level transfer mode, as selected by the pos_plvl register bit. stpa is tristated in byte-level transfer mode. stpa is updated on the rising edge of tfclk. tfclk input (atm) k20 utopia transmit fifo write clock (tfclk). this signal is used to write atm cells to the four cell transmit fifos. tfclk cycles at a 50 mhz or lower instantaneous rate. tfclk input (pos) k20 pos-phy transmit fifo write clock (tfclk). this signal is used to write packet octets into the 256 bytes packet fifo?s. tfclk cycles at a 50 mhz or lower instantaneous rate.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 22 pin name type pin no. function dtca output (atm) k22 utopia direct transmit cell available (dtca). these output signals provide direct status indication of when a cell is available in the transmit fifo for the corresponding port. when high, dtca indicates that the corresponding transmit fifo is not full and a complete cell may be written. when dtca goes low, it can be configured to indicate either that the corresponding transmit fifo is near full or that the corresponding transmit fifo is full. dtca will transition low on the rising edge of tfclk after the payload word 19 (tcalevel0=0) or 23 (tcalevel0=1) is sampled if the phy being polled is the same as the phy in use. to reduce fifo latency, the fifo depth at which dtca indicates "full" can be set to one, two, three or four cells. note that regardless of what fill level dtca is set to indicate "full" at, the transmit cell processor can store 4 complete cells dtca are updated on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 23 pin name type pin no. function dtpa output (pos) k22 pos-phy direct transmit packet available (dtpa). these output signals provide direct status indication of when some programmable number of bytes is available in the transmit fifo, for the corresponding port. when transitioning high, dtpa indicates that the transmit fifo has enough room to store data. the transition level is selected by the txfp transmit packet available low water-mark (tpalwm[7:0]) register. when dtpa transitions low, it indicates that the transmit fifo is either full or near full as selected by the txfp transmit packet available high water-mark (tpahwm[7:0]) register. this last option provides the link layer system with some look ahead capability in order to avoid fifo overruns and smoothly transition between phy?s. dtpa are updated on the rising edge of tfclk. tmod input (pos) f22 pos-phy transmit word modulo (tmod) signal. tmod indicates the size of the current word. tmod is only used during the last word transfer of a packet, at the same time teop is asserted. during a packet transfer every word must be complete except the last word, which can be composed of 1 or 2 bytes. tmod set high indicates a 1-byte word (present on msb?s, lsb?s are discarded) while tmod set low indicates a 2-byte word. tmod is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. tmod is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 24 pin name type pin no. function teop input (pos) c18 pos-phy transmit end of packet (teop). the active high teop signal marks the end of a packet on the tdat[15:0] bus. when teop is high, the last word of the packet is present on the tdat[15:0] data bus and tmod indicates how many bytes this last word is composed of. it is legal to set tsop high at the same time teop is high. this provides support for one or two byte packets, as indicated by the value of tmod. teop is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. teop is sampled on the rising edge of tfclk. terr input (pos) d17 pos-phy transmit error (terr). the transmit error indicator (terr) is used to indicate that the current packet must be aborted. terr should only be asserted during the last word transfer of a packet. packets marked with terr will be appended with the abort sequence (0x7d-0x7e) when transmission. terr is considered valid only when tenb is simultaneously asserted and the s/uni-star is selected via tadr[2:0]. terr is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 25 pin name type pin no. function rdat[15] rdat[14] rdat[13] rdat[12] rdat[11] rdat[10] rdat[9] rdat[8] rdat[7] rdat[6] rdat[5] rdat[4] rdat[3] rdat[2] rdat[1] rdat[0] output (atm) u23 u22 t20 u21 v22 w23 u20 v21 w22 y23 w21 y22 aa23 w20 y21 aa20 utopia receive cell data bus (rdat[15:0]). this data bus carries the atm cells that are read from the receive fifo selected by radr[2:0]. rdat[15:0] is tri-stated when renb is high. rdat[15:0] is tristated when renb is high. rdat[15:0] is also tristated when either the null- phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs when renb is high. rdat[15:0] is updated on the rising edge of rfclk. rdat[15] rdat[14] rdat[13] rdat[12] rdat[11] rdat[10] rdat[9] rdat[8] rdat[7] rdat[6] rdat[5] rdat[4] rdat[3] rdat[2] rdat[1] rdat[0] output (pos) u23 u22 t20 u21 v22 w23 u20 v21 w22 y23 w21 y22 aa23 w20 y21 aa20 pos-phy receive packet data bus (rdat[15:0]). this data bus carries the pos packet octets that are read from the selected receive fifo. rdat[15:0] is considered valid only when rval is asserted. rdat[15:0] is tristated when renb is high. rdat[15:0] is also tristated when either the null- phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs. rdat[15:0] is updated on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 26 pin name type pin no. function rprty output (atm) t21 utopia receive parity (rprty). the receive parity (rprty) signal indicates the parity of the rdat bus. rprty reflects the parity of rdat[15:0]. odd or even parity selection is made by using the rxptyp register bit (in atm cell processors, the four rxcp shall be programmed with the same parity setting).rprty is tristated when renb is high. rprty is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs when renb is high. rprty is updated on the rising edge of rfclk. rprty output (pos) t21 pos-phy receive parity (rprty). the receive parity (rprty) signal indicates the parity of the rdat bus. odd or even parity selection is made by using the rxptyp register bit (in pos frame processors; the four rxfp shall be programmed with the same parity setting). rprty is tristated when renb is high. rprty is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs. rprty is updated on the rising edge of rfclk. rsoc output (atm) p23 utopia receive start of cell (rsoc). rsoc marks the start of cell on the rdat bus. rsoc is tristated when renb is deasserted. rsoc is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs when renb is high. rsoc is sampled on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 27 pin name type pin no. function rsop output (pos) p23 pos-phy receive start of packet (rsop). rsop marks the first word of a packet transfer. rsop is tristated when renb is deasserted. rsop is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs. rsop/rsop is sampled on the rising edge of rfclk renb input (atm) p22 utopia receive multi-phy read enable (renb). the renb signal is used to initiate reads from the receive fifo?s. renb works as follows. when renb is sampled high, no read is performed and rdat[15:0], rprty and rsoc are tristated, and the address on radr[2:0] is latched to select the device or port for the next fifo access. when renb is sampled low, the word on the rdat bus is read from the selected receive fifo. renb must operate in conjunction with rfclk to access the fifo?s at a high enough rate to prevent fifo overflows. the system may de-assert renb at anytime it is unable to accept another byte. renb is sampled on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 28 pin name type pin no. function renb input (pos) p22 pos-phy receive multi-phy read enable (renb). the s/uni-star supports both byte-level and packet-level transfer. packet-level transfer operates as described above, with a selection phase when renb is deasserted and a transfer phase when renb is asserted. while renb is asserted, radr[2:0] is used for polling rpa. byte level transfer works on a cycle basis. when renb is asserted data is transferred from the selected phy and radr[2:0] is used to select the phy. nothing happens when renb is deasserted. polling is not possible; packet availability is directly indicated by drpa. during a data transfer, rval shall be monitored since it will indicate if the data is valid. once rval is deasserted, renb or radr[2:0] must be used to select a new phy for data transfer. renb must operate in conjunction with rfclk to access the fifo?s at a high enough rate to prevent fifo overflows. the system may de-assert renb at anytime it is unable to accept another byte. renb is sampled on the rising edge of rfclk. radr[2] radr[1] radr[0] input (atm) r23 p20 r22 receive address (radr[2:0]). the radr[2:0] bus is used for device selection and device polling in accordance with the utopia level 2 standard. when radr[2:0] is set to the same value as the phy_adr[2:0] inputs than the receive interface of this s/uni-star is either being selected or polled. note that the null phy address 7h is an invalid address and cannot be used to select the s/uni- star. radr[2:0] is sampled on the rising edge of tfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 29 pin name type pin no. function radr[2] radr[1] radr[0] input (pos) r23 p20 r22 pos-phy receive read address (radr). the radr signal is used to select the fifo (and hence port) that is read from using the renb signal. the radr bus is used to select the fifo (and hence port) that is written to using the tenb signal and the fifo's whose packet available signal is visible on the prpa polling output. note that address 0x7h is the null-phy address and will not be identified with the s/uni-star. radr is sampled on the rising edge of rfclk. rca output (atm) n20 utopia receive multi-phy cell available (rca). rca indicates when a cell is available in the receive fifo ( when the star is selected by radr[2:0]). rca can be configured to be de-asserted when either zero or four bytes remain in the selected/addressed fifo. rca will thus transition low on the rising edge of rfclk after payload word 24 (rcalevel0=1) or 19 (rcalevel0=0) is output if the phy being polled is the same as the phy in use. rca is tristated when either the null-phy address (0x7h) or an address not matching the device address is latched from the radr[2:0] inputs when renb is high. rca is updated on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 30 pin name type pin no. function prpa output (pos) n20 pos-phy polled multi-phy receive packet available (prpa) signal. prpa indicates when data is available in the polled receive fifo. when prpa is high, the receive fifo has at least one end of packet or a predefined number of bytes to be read (the number of bytes might be user programmable). prpa is low when the receive fifo fill level is below the assertion threshold and the fifo contains no end of packet. prpa allows to poll every phy while transferring data from the selected phy. prpa is driven by a phy layer device when its address is polled on radr[2:0]. a phy layer device shall tristate prpa when either the null-phy address (0x7h) or an address not matching the address set by the phy_adr[2:0] register bits is provided on radr[2:0]. prpa is only available in pos-phy packet-level transfer mode, as selected by the pos_plvl register bit. prpa is tristated in byte-level transfer mode. prpa is updated on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 31 pin name type pin no. function rval output (pos) m22 pos-phy receive data valid (rval). rval indicates the validity of the receive data signals. when rval is high, the receive signals (rdat, rsop, reop, rmod, rprty and rerr) are valid. when rval is low, all receive signals are invalid and must be disregarded. rval will transition low on a fifo empty condition or on an end of packet. . no data will be removed from the receive fifo while rval is deasserted. once deasserted, rval will remain deasserted until the current phy is deselected. rval allows to monitor the selected phy during a data transfer, while monitoring other phy?s is done using drpa. rval is tristated when renb is deasserted. rval is also tristated when either the null-phy address (0x7h) or an address not matching the phy layer device address is presented on the radr[2:0] signals. rval is updated on the rising edge of rfclk. rfclk input (atm) p21 utopia receive fifo read clock (rfclk). rfclk is used to read atm cells from the receive fifo?s. rfclk must cycle at a 50 mhz or lower instantaneous rate, but at a high enough rate to avoid fifo overflows. rfclk input (atm) p21 pos-phy receive fifo read clock (rfclk). this signal is used to read packets from the receive fifo?s. rfclk must cycle at a 50 mhz or lower instantaneous rate, but at a high enough rate to avoid fifo overflows.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 32 pin name type pin no. function drca output (atm) m21 utopia direct receive cell available (drca). these output signals provides direct status indication of when a cell is available in the receive fifo for the corresponding port. drca can be configured to be de-asserted when either zero or four bytes remain in the selected/addressed fifo. drca will thus transition low on the rising edge of rfclk after payload word 24 (rcalevel0=1) or 19 (rcalevel0=0) is output if the phy being polled is the same as the phy in use. drca[x] is updated on the rising edge of rfclk. drpa output (pos) m21 pos-phy direct receive packet available drpa provides a direct status indication. drpa indicates when data is available in the receive fifo. when drpa is high, the receive fifo has at least one end of packet or a programmable minimum number of bytes to be read. drpa is otherwise low. the polarity of drpa can be inverted with the rpainv register bit. drpa is updated on the rising edge of rfclk. rmod output (pos) y19 pos-phy receive modulo (rmod). the rmod signal indicates the number of bytes carried by the rdat[15:0] bus during the last word of a packet transfer. during a packet transfer every word must be complete except the last word which can be composed of 1 or 2 bytes. rmod set high indicate a single byte word (present on msb?s, lsb?s are discarded) while rmod set low indicates a two byte word. rmod is only used in pos mode. rmod is tristated when renb is deasserted. rmod is also tristated when either the null-phy address (0x7h) or an address not matching the address space set by phy_adr[2:0] is latched from the radr[2:0] inputs when renb is high. rmod is updated on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 33 pin name type pin no. function reop output (pos) l23 pos-phy receive end of packet (reop). the reop signal marks the end of packet on the rdat[15:0] bus. when the rxfp-50 is selected, reop is set high to mark the last word of the packet presented on the rdat[15:0] bus. during this same cycle rmod is used to indicate if the last word has 1 or 2 bytes. it is legal to set rsop high at the same time reop is high. this provides support for one or two bytes packets, as indicated by the value of rmod. reop is only used in pos mode. reop is tristated when renb is deasserted. reop is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs when renb is high. reop is updated on the rising edge of rfclk. rerr output (pos) l22 pos-phy receive error (rerr). the rerr signal indicates that the current packet is aborted. rerr can only be asserted during the last word transfer, at the same time reop is asserted. rerr is only used in pos mode. rerr is tristated when renb is deasserted. rerr is also tristated when either the null-phy address (0x7h) or an address not matching the address space is latched from the radr[2:0] inputs when renb is high. rerr is updated on the rising edge of rfclk.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 34 pin name type pin no. function phy_oen input (atm/ pos) a19 the phy output enable (phy_oen) signal controls the operation of the system interface. when set to logic zero, all system interface outputs are held tristate. when phy_oen is set to logic one, the interface is enabled. phy_oen can be overwritten by the phy_en master system interface configuration register bit. phy_oen and phy_en are or?ed together to enable the interface. when the s/uni-star is the only phy layer device on the bus, phy_oen can safely be tied to logic one. when the s/uni-star shares the bus with other devices, then phy_oen must be tied to logic zero, and the phy_en register bit used to enable the bus once its phy_adr[2:0] is programmed in order to avoid conflicts. 6.4 microprocessor interface signals pin name type pin no. function csb input b11 the active-low chip select (csb) signal is low during s/uni-star register accesses. note that when not being used, csb must be tied high. if csb is not required (i.e., registers accesses are controlled using the rdb and wrb signals only), csb must be connected to an inverted version of the rstb input. rdb input d11 the active-low read enable (rdb) signal is low during s/uni-star register read accesses. the s/uni-star drives the d[7:0] bus with the contents of the addressed register while rdb and csb are low. wrb input a10 the active-low write strobe (wrb) signal is low during a s/uni-star register write accesses. the d[7:0] bus contents are clocked into the addressed register on the rising wrb edge while csb is low.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 35 pin name type pin no. function d[0] d[1] d[2] d[3] d[4] d[5] d[6] d[7] i/o d16 b17 a17 c16 b16 c15 b15 d14 the bi-directional data bus d[7:0] is used during s/uni-star register read and write accesses. a[0] a[1] a[2] a[3] a[4] a[5] a[6] a[7] a[8] a[9] input a15 c14 b14 a14 d13 c13 b13 a13 c12 b12 the address bus a[9:0] selects specific registers during s/uni-star register accesses. except for s/uni-star global registers. a[10]/trs input a11 the test register select (trs) signal selects between normal and test mode register accesses. trs is high during test mode register accesses, and is low during normal mode register accesses. rstb input pull-up b10 the active-low reset (rstb) signal provides an asynchronous s/uni-star reset. rstb is a schmitt triggered input with an integral pull-up resistor. ale input pull-up c11 the address latch enable (ale) is active-high and latches the address bus a[7:0] when low. when ale is high, the internal address latches are transparent. it allows the s/uni-star to interface to a multiplexed address/data bus. ale has an integral pull-up resistor.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 36 pin name type pin no. function intb output open- drain c10 the active-low interrupt (intb) signal goes low when a s/uni-star interrupt source is active and that source is unmasked. the s/uni-star may be enabled to report many alarms or events via interrupts. examples of interrupt sources are loss of signal (los), loss of frame (lof), line ais, line remote defect indication (lrdi) detect, loss of pointer (lop), path ais, path remote defect indication detect and others. intb is tristated when the interrupt is acknowledged via an appropriate register access. intb is an open drain output. 6.5 jtag test access port (tap) signals pin name type pin no. function tck input b8 the test clock (tck) signal provides timing for test operations that are carried out using the ieee p1149.1 test access port. tms input pull-up b9 the test mode select (tms) signal controls the test operations that are carried out using the ieee p1149.1 test access port. tms is sampled on the rising edge of tck. tms has an integral pull-up resistor. tdi input pull-up d10 the test data input (tdi) signal carries test data into the s/uni-star via the ieee p1149.1 test access port. tdi is sampled on the rising edge of tck. tdi has an integral pull-up resistor. tdo tristate a9 the test data output (tdo) signal carries test data out of the s/uni-star via the ieee p1149.1 test access port. tdo is updated on the falling edge of tck. tdo is a tristate output which is inactive except when scanning of data is in progress.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 37 pin name type pin no. function trstb input pull-up c9 the active-low test reset (trstb) signal provides an asynchronous s/uni-star test access port reset via the ieee p1149.1 test access port. trstb is a schmitt triggered input with an integral pull-up resistor. note that when not being used, trstb must be connected to the rstb input. 6.6 analog signals pin name type pin no. function c+ c- analog ab4 aa5 the analog cp and cn pins are provided for applications that must meet sonet/sdh jitter transfer specifications. a tbd nf ceramic capacitor can be attached across c+ and c-. atb0 atb1 atb2 atb3 analog i/o p2 p3 p4 r1 the analog test bus (atb). these pins are used for manufacturing testing only and should be connected ground. 6.7 power and ground pin name type pin no. function bias bias voltage k21 c17 i/o bias (bias). when tied to +5v via a 1 k ? resistor, the bias input is used to bias the wells in the input and i/o pads so that the pads can tolerate 5v on their inputs without forward biasing internal esd protection devices. when bias is tied to +3.3v, the inputs and bi-directional inputs will only tolerate 3.3v level inputs.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 38 pin name type pin no. function vdd power a1 a23 b2 b22 c3 c21 d4 d6 d9 d12 d15 d18 d20 f4 f20 j4 j20 m4 m20 r4 r20 v4 v20 y4 y6 y9 y12 y15 y18 y20 aa3 aa21 ab2 ab22 ac1 ac23 r21 t22 h21 g23 the digital power (vdd) pins should be connected to a well-decoupled +3.3 v dc supply.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 39 pin name type pin no. function vss ground a2 a6 a8 a12 a16 a18 a22 b1 b3 b21 b23 c2 c22 f1 f23 h1 h23 m1 m23 t1 t23 v1 v23 aa2 aa22 ab1 ab3 ab21 ab23 ac2 ac6 ac8 ac12 ac16 ac18 ac22 the digital ground (vss) pins should be connected to ground.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 40 pin name type pin no. function vss ground - e2 d1 g1 g2 w1 v2 e3 j3 u3 ab6 aa7 y8 the digital ground (vss) pins should be connected to ground. vss ground ac7 aa8 ab8
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 41 pin name type pin no. function n/c no connect - k23 l20 l21 n23 n22 n21 aa13 y13 ac14 aa12 ab12 ac13 aa14 ac15 y14 c1 d2 e1 f2 t2 u1 e4 d3 h4 g3 r3 r2 ab17 y16 aa17 ac20 aa19 ab20 ab9 y10 ac9 no connect
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 42 pin name type pin no. function n/c no connect - aa15 ab16 ac17 ac19 y17 aa18 ab10 ac10 y11k 2 k1 n2 n1 b4 c5 t3 j2 d8 d7 c8 c7 b18 b7 b6 a7 a5. no connect qavd analog power aa6 c6 the quiet analog power (qavd) pins for the analog core. qavd should be connected to analog +3.3v. qavs analog ground ab5 b5 the quiet analog ground (qavs) pins for the analog core. qavs should be connected to analog gnd.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 43 pin name type pin no. function avd analog power g4 a4 c4 h2 l4 j1 u2 m2 n4 y3 ac4 aa4 l3 l1 the analog power (avd) pins for the analog core. avd should be connected to analog +3.3v. avs analog ground f3 a3 d5 h3 k3 k4 t4 n3 p1 w4 ac3 y5 l2 m3 the analog ground (avs) pins for the analog core. avs should be connected to analog gnd. notes on pin description: 1. all s/uni-star inputs and bi-directionals present minimum capacitive loading and operate at ttl logic levels except: the sd, rxd+ and rxd- inputs which operate at pseudo-ecl (pecl) logic levels 2. the rdat[7:0], rprty, rsoc, reop, rmod, rerr, rca, tca, tclk and rclk outputs have a 4 ma drive capability. the txd+ and txd- outputs are met to be terminated in a passive network and interface at pecl levels.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 44 3. it is mandatory that every ground pin (vss) be connected to the printed circuit board ground plane to ensure a reliable device operation. 4. it is mandatory that every power pin (vdd) be connected to the printed circuit board power plane to ensure a reliable device operation. 5. all analog power and ground can be sensitive to noise. they must be isolated from the digital power and ground. care must be taken to decouple these pins from each other and all other analog power and ground pins. 6. due to esd protection structures in the pads it is necessary to exercise caution when powering a device up or down. esd protection devices behave as diodes between power supply pins and from i/o pins to power supply pins. under extreme conditions it is possible to blow these esd protection devices or trigger latch up. please adhere to the recommended power supply sequencing as described in the operation section of pm5351 s/uni-tetra datasheet . 7. some device pins can be made 5v tolerant by connecting the bias pins to a 5v power supply, while some other pins are 3.3v only. in summary, the system interface (atm or pos) is 3.3v only while the microprocessor interface, sonet and line interfaces are 5v tolerant. 3.3v only i/o?s: rdat[15:0], rsoc/rsop, rprty, renb, reop, rmod, rerr, rval, tdat[15:0], tsoc/tsop, tprty, tenb, teop, tmod, terr, rca/rpa, drca/drpa, tca/ptpa, stpa, dtca/dtpa, radr[3:0], tadr[3:0], phy_oen 5v tolerant i/o?s: refclk, rclk, rfpo, ralrm, tclk, tfpo, tfpi, rsd, rsdclk, tsd, tsdclk. rld, rldclk, tld, tldclk., d[7:0], a[10:0], wrb, rdb, csb, rstb, intb, ale, trstb, tck, tms, tdi, tdo,
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 45 7 microprocessor interface the microprocessor interface block provides normal and test mode registers, and the logic required to connect to the microprocessor interface. the normal mode registers are required for normal operation, and test mode registers are used to enhance the testability of the s/uni-star. the register set is accessed as shown in table 1. in the following section every register is documented and identified using the register number (reg #).. addresses that are not shown are not used and must be treated as reserved. table 1: register memory map reg # address a[10:0] description 00 000 s/uni-star master reset and identity 01 001 s/uni-star master configuration 02 002 s/uni-star master system interface config 03 003 s/uni-star master clock monitor 04 004 s/uni-star master interrupt status 05 305 s/uni-star channel reset and performance monitoring update 06 206 s/uni-star channel configuration 07 307 s/uni-star channel control 08 308 s/uni-star channel control extensions 09 309 reserved 0a 30a s/uni-star channel interrupt status 1 0b 30b s/uni-star channel interrupt status 2 0c 00c cspi control and status (clock synthesis) 0d 00d reserved 0e 30e crsi control and status (clock recovery) 0f 30f reserved 10 310 rsop control/interrupt enable 11 311 rsop status/interrupt status 12 312 rsop section bip-8 lsb 13 313 rsop section bip-8 msb 14 314 tsop control 15 315 tsop diagnostic 16 316 reserved 17 317 reserved 18 318 rlop control/status 19 319 rlop interrupt enable/status 1a 31a rlop line bip-24 lsb
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 46 reg # address a[10:0] description 1b 31b rlop line bip-24 1c 31c rlop line bip-24 msb 1d 31d rlop line febe lsb 1e 31e rlop line febe 1f 31f rlop line febe msb 20 320 tlop control 21 321 tlop diagnostic 22 322 tlop transmit k1 23 323 tlop transmit k2 24 324 s/uni-star channel transmit synchronization message (s1) 25 325 s/uni-star channel transmit j0/z0 26 326 reserved 27 327 reserved 28 328 sstb control 29 329 sstb status 2a 32a sstb indirect address 2b 32b sstb indirect data 2c 32c reserved 2d 32d reserved 2e 32e reserved 2f 32f reserved 30 330 rpop status/control (extd=0) 30 330 rpop status/control (extd=1) 31 331 rpop interrupt status (extd=0) 31 331 rpop interrupt status (extd=1) 32 332 rpop pointer interrupt status 33 333 rpop interrupt enable (extd=0) 33 333 rpop interrupt enable (extd=1) 34 334 rpop pointer interrupt enable 35 335 rpop pointer lsb 36 336 rpop pointer msb and rdi filter control 37 337 rpop path signal label 38 338 rpop path bip-8 lsb 39 339 rpop path bip-8 msb 3a 33a rpop path febe lsb 3b 33b rpop path febe msb 3c 33c rpop auxiliary rdi 3d 33d rpop path bip-8 configuration 3e 33e reserved 3f 33f reserved
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 47 reg # address a[10:0] description 40 340 tpop control/diagnostic 41 341 tpop pointer control 42 342 reserved 43 343 tpop current pointer lsb 44 344 tpop current pointer msb 45 345 tpop arbitrary pointer lsb 46 346 tpop arbitrary pointer msb 47 347 tpop path trace 48 348 tpop path signal label 49 349 tpop path status 4a 34a reserved 4b 34b reserved 4c 34c reserved 4d 34d reserved 4e 34e reserved 4f 34f reserved 50 350 sptb control 51 351 sptb status 52 352 sptb indirect address 53 353 sptb indirect data 54 354 sptb expected path signal label 55 355 sptb path signal label status 56 356 sptb reserved 57 357 sptb reserved 58 358 reserved 59 359 reserved 5a 35a reserved 5b 35b reserved 5c 35c reserved 5d 35d reserved 5e 35e reserved 5f 35f reserved 60 360 rxcp configuration 1 61 361 rxcp configuration 2 62 362 rxcp fifo/utopia control & config 63 363 rxcp interrupt enables and counter status 64 364 rxcp status/interrupt status 65 365 rxcp lcd count threshold (msb) 66 366 rxcp lcd count threshold (lsb) 67 367 rxcp idle cell header pattern 68 368 rxcp idle cell header mask
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 48 reg # address a[10:0] description 69 369 rxcp corrected hcs error count 6a 36a rxcp uncorrected hcs error count 6b 36b rxcp received cell count lsb 6c 36c rxcp received cell count 6d 36d rxcp received cell count msb 6e 36e rxcp idle cell count lsb 6f 36f rxcp idle cell count 70 370 rxcp idle cell count msb 71 371 reserved 72 372 reserved 73 373 reserved 74 374 reserved 75 375 reserved 76 376 reserved 77 377 reserved 78 378 reserved 79 379 reserved 7a 37a reserved 7b 37b reserved 7c 37c reserved 7d 37d reserved 7e 37e reserved 7f 37f reserved 80 380 txcp configuration 1 81 381 txcp configuration 2 82 382 txcp transmit cell status 83 383 txcp interrupt enable/status 84 384 txcp idle cell header control 85 385 txcp idle cell payload control 86 386 txcp transmit cell counter lsb 87 387 txcp transmit cell counter 88 388 txcp transmit cell counter msb 89 389 reserved 8a 38a reserved 8b 38b reserved 8c 38c reserved 8d 38d reserved 8e 38e reserved 8f 38f reserved 90 390 s/uni-star channel auto line rdi control 91 391 s/uni-star channel auto path rdi control
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 49 reg # address a[10:0] description 92 392 s/uni-star channel auto enhanced path rdi control 93 393 s/uni-star channel receive rdi and enhanced rdi control extensions 94 394 s/uni-star channel receive line ais control 95 395 s/uni-star channel receive path ais control 96 396 s/uni-star channel receive alarm control #1 97 397 s/uni-star channel receive alarm control #2 98 398 reserved 99 399 reserved 9a 39a reserved 9b 39b reserved 9c 39c reserved 9d 39d reserved 9e 39e reserved 9f 39f reserved a0 3a0 rxfp-50 configuration a1 3a1 rxfp-50 configuration/interrupt enables a2 3a2 rxfp-50 interrupt status a3 3a3 rxfp-50 minimum packet size a4 3a4 rxfp-50 maximum packet size (lsb) a5 3a5 rxfp-50 maximum packet size (msb) a6 3a6 rxfp-50 receive initiation level a7 3a7 rxfp-50 receive packet available high mark a8 3a8 rxfp-50 receive byte counter (lsb) a9 3a9 rxfp-50 receive byte counter aa 3aa rxfp-50 receive byte counter ab 3ab rxfp-50 receive byte counter (msb) ac 3ac rxfp-50 receive frame counter (lsb) ad 3ad rxfp-50 receive frame counter ae 3ae rxfp-50 receive frame counter (msb) af 3af rxfp-50 aborted frame count (lsb) b0 3b0 rxfp-50 aborted frame count (msb) b1 3b1 rxfp-50 fcs error frame count (lsb) b2 3b2 rxfp-50 fcs error frame count (lsb) b3 3b3 rxfp-50 min length frame count (lsb) b4 3b4 rxfp-50 min length frame count (msb) b5 3b5 rxfp-50 max length frame count (lsb) b6 3b6 rxfp-50 max length frame count (msb) b7 3b7 reserved b8 3b8 reserved
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 50 reg # address a[10:0] description b9 3b9 reserved ba 3ba reserved bb 3bb reserved bc 3bc reserved bd 3bd reserved be 3be reserved bf 3bf reserved c0 3c0 txfp-50 interrupt enable/status configuration 1 c1 3c1 txfp-50 configuration 2 c2 3c2 txfp-50 control c3 3c3 txfp-50 transmit packet available low water mark c4 3c4 txfp-50 transmit packet available high water mark c5 3c5 txfp-50 transmit byte counter (lsb) c6 3c6 txfp-50 transmit byte counter c7 3c7 txfp-50 transmit byte counter c8 3c8 txfp-50 transmit byte counter (msb) c9 3c9 txfp-50 transmit frame counter (lsb) ca 3ca txfp-50 transmit frame counter cb 3cb txfp-50 transmit frame counter (msb) cc 3cc txfp-50 transmit user aborted frame count (lsb) cd 3cd txfp-50 transmit user aborted frame count (msb) ce 3ce txfp-50 transmit underrun aborted frame count (lsb) cf 3cf txfp-50 transmit underrun aborted frame count (msb) d0 3d0 wans configuration register d1 3d1 wans interrupt & status register d2 3d2 wans phase word (lsb) d3 3d3 wans phase word d4 3d4 wans phase word d5 3d5 wans phase word (msb) d6 3d6 reserved d7 3d7 reserved d8 3d8 reserved d9 3d9 wans reference period (lsb) da 3da wans reference period (msb) db 3db wans phase counter period (lsb) dc 3dc wans phase counter period (msb) dd 3dd wans phase average period de 3de reserved df 3df reserved
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 51 reg # address a[10:0] description e0 3e0 rase interrupt enable e1 3e1 rase interrupt status e2 3e2 rase configuration/control e3 3e3 rase sf berm accumulation period (lsb) e4 3e4 rase sf berm accumulation period e5 3e5 rase sf berm accumulation period (msb) e6 3e6 rase sf berm saturation threshold (lsb) e7 3e7 rase sf berm saturation threshold (msb) e8 3e8 rase sf berm declaring threshold (lsb) e9 3e9 rase sf berm declaring threshold (msb) ea 3ea rase sf berm clearing threshold (lsb) eb 3eb rase sf berm clearing threshold (msb) ec 3ec rase sd berm accumulation period (lsb) ed 3ed rase sd berm accumulation period ee 3ee rase sd berm accumulation period (msb) ef 3ef rase sd berm saturation threshold (lsb) f0 3f0 rase sd berm saturation threshold (msb) f1 3f1 rase sd berm declaring threshold (lsb) f2 3f2 rase sd berm declaring threshold (msb) f3 3f3 rase sd berm clearing threshold (lsb) f4 3f4 rase sd berm clearing threshold (msb) f5 3f5 rase aps k1 f6 3f6 rase aps k2 f7 3f7 rase synchronization status s1 f8 3f8 reserved f9 3f9 reserved fa 3fa reserved fb 3fb reserved fc 3fc reserved fd 3fd reserved fe 3fe reserved ff 3ff reserved 400 s/uni-star master test register 701 - 7ff reserved for test
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 52 notes on register memory map: ? for all register accesses, csb must be low. ? addresses that are not shown must be treated as reserved. a[10] is the test resister select (trs) and should be set to logic zero for normal mode register access.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 53 register 0x01: s/uni-star master configuration bit type function default bit 7 r/w peclv 0 bit 6 r/w reserved 0 bit 5 r/w reserved 0 bit 4 r/w reserved 0 bit 3 r/w txc_oe 0 bit 2 r/w reserved 0 bit 1 r/w reserved 1 bit 0 r/w reserved 1 txc_oe: the differential line rate clock output enable (txc_oe). txc_oe enables the txc+/- outputs. when txc_oe is set to logic zero txc+/- is not active (high impedance). when txc_oe is set to logic one, txc+/- provides a line rate clock output. peclv: the pecl receiver input voltage (peclv) bit configures the pecl receiver level shifter. when peclv is set to logic zero, the pecl receivers are configured to operate with a 3.3v input voltage. when peclv is set to logic one, the pecl receivers are configured to operate with a 5.0v input voltage. reserved: the reserved bits must be programmed to their default value proper operation.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 54 register 0x03: s/uni-star master clock monitor bit type function default bit 7 r rclk x bit 6 - reserved x bit 5 - reserved x bit 4 r reserved x bit 3 r tclka x bit 2 r rfclka x bit 1 r tfclka x bit 0 r refclka x this register provides activity monitoring on s/uni-star clocks. when a monitored clock signal makes a low to high transition, the corresponding register bit is set high. the bit will remain high until this register is read, at which point, all the bits in this register are cleared. a lack of transitions is indicated by the corresponding register bit reading low. this register should be read at periodic intervals to detect clock failures. refclka: the refclk active (refclka) bit monitors for low to high transitions on the refclk reference clock input. refclka is set high on a rising edge of refclk, and is set low when this register is read. tfclka: the tfclk active (tfclka) bit monitors for low to high transitions on the tfclk transmit fifo clock input. tfclka is set high on a rising edge of tfclk, and is set low when this register is read. rfclka: the rfclk active (rfclka) bit monitors for low to high transitions on the rfclk receive fifo clock input. rfclka is set high on a rising edge of rfclk, and is set low when this register is read.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 55 tclka: the tclk active (tclka) bit monitors for low to high transitions on the tclk output. tclka is set high on a rising edge of tclk, and is set low when this register is read. rclka: rclk active (rclka) bit monitors for low to high transitions on the rclk output. rclka is set high on a rising edge of rclk, and is set low when this register is read.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 56 8 operations 8.1 device initialization the s/uni-star needs to be initialized to reduce power consumption. the following sequence should be executed to ensure proper power consumption prior to operation of the device. 1 write register 0x00f with 0x0f 2 write register 0x10f with 0x0f 3 write register 0x20f with 0x0f 4 write register 0x001 with 0x33 5 write register 0x205 with 0x80 6 write register 0x007 with 0x01 7 write register 0x107 with 0x01
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 57 9 test features description simultaneously asserting (low) the csb, rdb and wrb inputs causes all digital output pins and the data bus to be held in a high-impedance state. this test feature may be used for board testing. test mode registers are used to apply test vectors during production testing of the s/uni-star. test mode registers (as opposed to normal mode registers) are selected when trs (a[10]) is high. test mode registers may also be used for board testing. when all of the tsbs within the s/uni-star are placed in test mode 0, device inputs may be read and device outputs may be forced via the microprocessor interface (refer to the section "test mode 0" for details). in addition, the s/uni-star also supports a standard ieee 1149.1 five- signal jtag boundary scan test port for use in board testing. all digital device inputs may be read and all digital device outputs may be forced via the jtag test port. table 2: test mode register memory map address register 0x000-0x3ff normal mode registers 0x400 master test register 0x401-0x7ff reserved for test 9.1 master test register notes on test mode register bits: 1. writing values into unused register bits has no effect. however, to ensure software compatibility with future, feature-enhanced versions of the product, unused register bits must be written with logic zero. reading back unused bits can produce either a logic one or a logic zero; hence, unused register bits should be masked off by software when read. 2. writable test mode register bits are not initialized upon reset unless otherwise noted.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 58 register 0x400: master test bit type function default bit 7 unused x bit 6 w reserved x bit 5 w pmcatst x bit 4 w pmctst x bit 3 w dbctrl 0 bit 2 r/w iotst 0 bit 1 w hizdata 0 bit 0 r/w hizio 0 this register is used to enable s/uni-star test features. all bits, except pmctst, pmcatst and bypass are reset to zero by a reset of the s/uni-star using either the rstb input or the master reset register. pmctst and bypass are reset when csb is logic one. pmcatst is reset when both csb is high and rstb is low. pmctst, pmcatst and bypass can also be reset by writing a logic zero to the corresponding register bit. hizio, hizdata: the hizio and hizdata bits control the tri-state modes of the s/uni-star . while the hizio bit is a logic one, all output pins of the s/uni-star except the data bus and output tdo are held tri-state. the microprocessor interface is still active. while the hizdata bit is a logic one, the data bus is also held in a high-impedance state which inhibits microprocessor read cycles. the hizdata bit is overridden by the dbctrl bit. iotst: the iotst bit is used to allow normal microprocessor access to the test registers and control the test mode in each tsb block in the s/uni-star for board level testing. when iotst is a logic one, all blocks are held in test mode and the microprocessor may write to a block's test mode 0 registers to manipulate the outputs of the block and consequentially the device outputs (refer to the "test mode 0 details" in the "test features" section).
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 59 dbctrl: the dbctrl bit is used to pass control of the data bus drivers to the csb pin. when the dbctrl bit is set to logic one and either iotst or pmctst are logic one, the csb pin controls the output enable for the data bus. while the dbctrl bit is set, holding the csb pin high causes the s/uni-star to drive the data bus and holding the csb pin low tri-states the data bus. the dbctrl bit overrides the hizdata bit. the dbctrl bit is used to measure the drive capability of the data bus driver pads. pmctst: the pmctst bit is used to configure the s/uni-star for pmc's manufacturing tests. when pmctst is set to logic one, the s/uni-star microprocessor port becomes the test access port used to run the pmc "canned" manufacturing test vectors. the pmctst bit is logically "ored" with the iotst bit, and can be cleared by setting csb to logic one or by writing logic zero to the bit. pmcatst: the pmcatst bit is used to configure the analog portion of the s/uni-star for pmc's manufacturing tests. reserved: the reserved bit must be programmed to logic one for proper operation. 9.2 jtag test port the s/uni-star jtag test access port (tap) allows access to the tap controller and the 4 tap registers: instruction, bypass, device identification and boundary scan. using the tap, device input logic levels can be read, device outputs can be forced, the device can be identified and the device scan path can be bypassed. for more details on the jtag port, please refer to the operations section. table 3: instruction register (length - 3 bits) instructions selected register instruction codes, ir[2:0] extest boundary scan 000 idcode identification 001 sample boundary scan 010
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 60 instructions selected register instruction codes, ir[2:0] bypass bypass 011 bypass bypass 100 stctest boundary scan 101 bypass bypass 110 bypass bypass 111 table 4: identification register length 32 bits version number 0h part number 5351h manufacturer's identification code 0cdh device identification 053510cdh table 5: boundary scan register (length ? 155 bits) pin/enable reg. bit cell type id control n/c 154 t 1 hiz_oeb n/c 153 t 0 hiz_oeb n/c 152 t 1 hiz_oeb ralrm 151 t 1 hiz_oeb rdat[0] 150 t 0 rx_utopia_oeb rdat[1] 149 t 0 rx_utopia_oeb rdat[2] 148 t 1 rx_utopia_oeb rdat[3] 147 t 1 rx_utopia_oeb rdat[4] 146 t 0 rx_utopia_oeb rdat[5] 145 t 0 rx_utopia_oeb rdat[6] 144 t 0 rx_utopia_oeb rdat[7] 143 t 0 rx_utopia_oeb
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 61 pin/enable reg. bit cell type id control rdat[8] 142 t 1 rx_utopia_oeb rdat[9] 141 t 0 rx_utopia_oeb rdat[10] 140 t 0 rx_utopia_oeb rdat[11] 139 t 0 rx_utopia_oeb rdat[12] 138 t 1 rx_utopia_oeb rdat[13] 137 t 0 rx_utopia_oeb rdat[14] 136 t 1 rx_utopia_oeb rdat[15] 135 t 0 rx_utopia_oeb rprty 134 t 1 rx_utopia_oeb vdd 133 i 1 vdd 132 i 0 radr[0] 131 i 0 radr[1] 130 i 1 radr[2] 129 i 0 rfclk 128 i 1 renb 127 i 0 rval 126 t 0 rx_utopia_oeb reop 125 t 0 rx_utopia_oeb rerr 124 t 0 rx_utopia_oeb rsoc_rsop 123 t 0 rx_utopia_oeb n/c 122 t 0 hiz_oeb n/c 121 t 0 hiz_oeb n/c 120 t 0 hiz_oeb dtca_dtpa 119 t 0 hiz_oeb rca_prpa 118 t 0 rca_prpa_oeb n/c 117 t 0 hiz_oeb n/c 116 t 0 hiz_oeb n/c 115 t 0 hiz_oeb drca_drpa 114 t 0 hiz_oeb
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 62 pin/enable reg. bit cell type id control tca_ptpa 113 t 0 tca_ptpa_oeb tfclk 112 i 0 tenb 111 i 0 tsoc_tsop 110 i 0 tprty 109 i 0 vdd 108 i 0 vdd 107 i 0 tadr[0] 106 i 0 tadr[1] 105 i 0 tadr[2] 104 i 0 tmod 103 i 0 tdat[0] 102 i 0 tdat[1] 101 i 0 tdat[2] 100 i 0 tdat[3] 99 i 0 tdat[4] 98 i 0 tdat[5] 97 i 0 tdat[6] 96 i 0 tdat[7] 95 i 0 tdat[8] 94 i 0 tdat[9] 93 i 0 tdat[10] 92 i 0 tdat[11] 91 i 0 tdat[12] 90 i 0 tdat[13] 89 i 0 tdat[14] 88 i 0 tdat[15] 87 i 0 stpa 86 t 0 stpa_oeb stpa_oeb 85 e 0
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 63 pin/enable reg. bit cell type id control teop 84 i 0 terr 83 i 0 phy_oen 82 i 0 d_oeb[0] 81 e 0 d[0] 80 b 0 d_oeb[0] d_oeb[1] 79 e 0 d[1] 78 b 0 d_oeb[1] d_oeb[2] 77 e 0 d[2] 76 b 0 d_oeb[2] d_oeb[3] 75 e 0 d[3] 74 b 0 d_oeb[3] d_oeb[4] 73 e 0 d[4] 72 b 0 d_oeb[4] d_oeb[5] 71 e 0 d[5] 70 b 0 d_oeb[5] d_oeb[6] 69 e 0 d[6] 68 b 0 d_oeb[6] d_oeb[7] 67 e 0 d[7] 66 b 0 d_oeb[7] a[0] 65 i 0 a[1] 64 i 0 a[2] 63 i 0 a[3] 62 i 0 a[4] 61 i 0 a[5] 60 i 0 a[6] 59 i 0 a[7] 58 i 0 a[8] 57 i 0 a[9] 56 i 0
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 64 pin/enable reg. bit cell type id control a[10] 55 i 0 csb 54 i 0 ale 53 i 0 rdb 52 i 0 wrb 51 i 0 rstb 50 i 0 intb 49 o 0 hiz_oeb 48 e 0 rx_utopia_o eb 47 e 0 tca_ptpa_oe b 46 e 0 rca_prpa_oe b 45 e 0 tfpi 44 i 0 refclk 43 i 0 vss 42 i 0 vss 41 i 0 vss 40 i 0 tsd 39 i 0 vss 38 i 0 vss 37 i 0 vss 36 i 0 tld 35 i 0 n/c 34 t 0 hiz_oeb n/c 33 t 0 hiz_oeb n/c 32 t 0 hiz_oeb tsdclk 31 t 0 hiz_oeb n/c 30 t 0 hiz_oeb n/c 29 t 0 hiz_oeb
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 65 pin/enable reg. bit cell type id control n/c 28 t 0 hiz_oeb tldclk 27 t 0 hiz_oeb tfpo 26 t 0 hiz_oeb tclk 25 t 0 hiz_oeb n/c 24 t 0 hiz_oeb n/c 23 t 0 hiz_oeb n/c 22 t 0 hiz_oeb rfpo 21 t 0 hiz_oeb n/c 20 t 0 hiz_oeb n/c 19 t 0 hiz_oeb n/c 18 t 0 hiz_oeb rclk 17 t 0 hiz_oeb n/c 16 t 0 hiz_oeb n/c 15 t 0 hiz_oeb n/c 14 t 0 hiz_oeb rld 13 t 0 hiz_oeb n/c 12 t 0 hiz_oeb n/c 11 t 0 hiz_oeb n/c 10 t 0 hiz_oeb rsd 9 t 0 hiz_oeb n/c 8 t 0 hiz_oeb n/c 7 t 0 hiz_oeb n/c 6 t 0 hiz_oeb rldclk 5 t 0 hiz_oeb n/c 4 t 0 hiz_oeb n/c 3 t 0 hiz_oeb n/c 2 t 0 hiz_oeb rsdclk 1 t 0 hiz_oeb rmod 0 t 0 rx_utopia_oeb
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 66 notes: 1. n/c specifies a bsc that is present but not bonded out to a package pin. 2. vdd and vss specify bscs that are connected to device pins which are permanently tied to vdd and vss respectively. 3. d_oenb[7:0] is the active low output enable for d[7:0]. 4. rx_utopia_oeb is the active low output enable for rsoc/rsop, rdat[15:0], rxprty, rmod, rerr, rval. 5. tca_ptpa_oeb is the active low output enable for tca/ptpa. 6. rca_prpa_oeb is the active low output enable for rca/prpa. 7. stpa_oeb is the active low output enable for stpa. 8. when set high, intb will be set to high impedance. 9. hiz_oeb is the active low output enable for all out_cell types except those listed above. 10. a[7] is the first bit of the boundary scan chain. 9.2.1 boundary scan cells in the following diagrams, clock-dr is equal to tck when the current controller state is shift-dr or capture-dr, and unchanging otherwise. the multiplexer in the center of the diagram selects one of four inputs, depending on the status of select lines g1 and g2. the id code bit is as listed in the boundary scan register table located above.
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 67 figure 1: input observation cell (in_cell) input pad d c clock-dr scan chain out input to internal logic shift-dr scan chain in 1 2 mux 1 2 1 2 1 2 i.d. code bit idcode g1 g2 figure 2: output cell (out_cell) extest d c d c g1 g2 12 mux g1 1 1 mux output or enable from system logic scan chain in scan chain out output or enable shift-dr clock-dr update-dr 12 12 12 idoode i.d. code bit
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 68 figure 3: bidirectional cell (io_cell) d c d c g1 1 1 mux output from internal logic scan chain in scan chain out extest output to pin shift-dr clock-dr update-dr input from pin input to internal logic g1 1 2 mux 1 2 1 2 1 2 g2 idcode i.d. code bit figure 4: layout of output enable and bidirectional cells output enable from internal logic (0 = drive) input to internal logic output from internal logic scan chain in scan chain out i/o pad out_cell io_cell
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 69 10 dc characteristics the following is the typical and maximum current consumption of the pm5352 s/uni-star while in atm mode and pos mode (with and without use of the txc clock pin). parameter unit upper limit spec typical iddop in atm mode (with txc disabled) ma 280 215ma iddop in atm mode (with txc enabled) ma 310 235ma iddop in pos mode (with txc disabled) ma 330 245ma iddop in pos mode (with txc enabled) ma 360 265ma
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 70 11 ordering and thermal information table 6: ordering information part no. description PM5352-BI 304-pin ball grid array (sbga) table 7: thermal information part no. ambient temperature theta ja theta jc PM5352-BI -40c to 85c 22 c/w 1 c/w
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 71 12 mechanical information figure 5:- mechanical drawing 304 pin super ball grid array (sbga)
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) proprietary and confidential to pmc-sierra, inc., and for its customers? internal use 72 notes
pm5352 s/uni star data sheet pmc-1990421 issue 2 saturn user network interface 155 (star) none of the information contained in this document constitutes an express or implied warranty by pmc-sierra, inc. as to the suf ficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchanta bility, performance, compatibility with other parts or systems, of any of the products of pmc-sierra, inc., or any portion thereof, referred to in this document. pmc-sierra, inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not l imited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. in no event will pmc-sierra, inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not pmc-sierra, inc. has been advised of the possibility of such damage. ? 2000 pmc-sierra, inc. pmc-1990421 r2 issue date: february 2000 proprietary and confidential to pmc-sierra, inc., and for its customers? internal use contacting pmc-sierra, inc. pmc-sierra, inc. 105-8555 baxter place burnaby, bc canada v5a 4v7 tel: (604) 415-6000 fax: (604) 415-6200 document information: document@pmc-sierra.com corporate information: info@pmc-sierra.com application information: apps@pmc-sierra.com (604) 415-4533 web site: http://www.pmc-sierra.com

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