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1 80 61 20 21 40 41 60 gio30/ad0 gio17/sw17 gio16/sw16 ex1clk ex0clk ipclk ex1dat ex0dat ipdat epx5 da gio21/sw1/int1 gio20/sw0/int0 gio13/sw13 gio12/sw12 gio11/sw11 gio10/sw10 atn/cts sclk/isel miso/txd pwm1 pwm0 r7 r6 r5 r4 r3 r2 r1 r0 vdd avref avss epx10 epx9 epx1 epx0 gio33/ad3 gio32/ad2 gio31/ad1 ss/rts wkup epx6 epx7 epx8 epx4 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 c10 c11 c12 c13 ur8hc007-001-fq c14 c15 epx3 epx2 gio14/sw14 gio15/sw15 gio00/led0 gio01/led1 gio02/led2 gio03/led3 vss osco osci ps2en hsus reset vss1 lid pwrok mosi/rxd juno tm ur8hc007-001 input device and power management companion ic for jupiter devices juno, zero-power, self power management, and message loss-less wake-up are trademarks of semtech corporation. semtech is a registered trademark of semtech corporation. all other trademarks belong to their respective companies. copyright @1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 1 hid & system management products, h/pc ic family description features ? typically consumes less than 1 a scans a fully programmable 8 x 16 matrix that supports japanese, english and european keyboards operates continuously between 3 volts and 5 volts offers unique power management capabilities that work in harmony with windows ? ce power modes always runs in ?stop? mode without data or event loss provides three zero-power tm ps/2 ports for the hot-plug connection of external keyboards/mice & internal mouse, including mousewheels uses proprietary circuitry, so ?stop? mode is entered even when ps/2 devices are connected and active available in 1.7mm high package to accommodate slim designs gpio pins provide interrupt at both falling and rising edge of signals, ideal for lid functions, power, ring indicators, docking signals, battery measurement, etc. has additional gpio available for leds, switches, etc. offers internal control of lcd brightness/contrast, audio, etc. as well as four 10-bit a/d channels for power management monitoring cost-effective, reducing overall system costs by integrating features that would typically require multiple additional components provides programmable features that allow for maximum design differentiation without customization other juno tm versions offer control of internal pointing device jupiter devices/professional pcs h/pcs, web phones, & g3 terminals juno tm 01 is a member of a series of multi-functional companion ics for jupiter-class devices and other devices using risc-based processors. the ic interfaces the system via either asynchronous serial or the serial peripheral interface (spi), and provides keyboard scanning, special general purpose i/o (gpio) and unique system power management capabilities. the zero-power tm juno tm will power down even between key presses. semtech?s proprietary circuitry (patent pending) allows the ic to power down even when ps/2 devices are connected and active. typical power consumption is less than 1 a, a first for embedded ics. the juno tm provides continuous operation between 3v and 5v and scans a fully programmable 8 x 16 keyboard matrix. the ic is equipped with three zero-power tm ps/2 ports for the hot-plug connection of an external ps/2 keyboard and mouse as well as an internal ps/2 mouse, including those with mousewheels. in addition, the juno tm offers special general purpose i/o (gpio), ideal for use for lid functions, power switches, ring indicators, docking signals, battery measurement, leds, etc. the integration of features, many of them programmable, on one ic increases flexibility and reduces component count and cost. pin assignments applications
functional diagram ordering code copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 2 package options 80-pin, plastic lqfp other materials technical reference manual juno tm evaluation kit pitch in mm?s 0.5 type document evaluation kit ta = 0c to +75c UR8HC007-001-XX-FQ part number doc8-007-001-tr-xxx evk8-007-001-xxx xx = optional for customization xxx = denotes revision number gio30-33 / a/d0-3 analog outputs 14 bit pwm0 14 bit pwm1 8 bit d/a power management unit configuration status and control registers dual mode serial communications port analog inputs 10 bit a/d (shared with gi03) gio00-03 / led0-3 gio10-17 / sw / int gio20-21 / int0-1 internal ps/2 pointer external ps/2 port 1 external ps/2 port 2 keyboard matrix scanner sclk / isel mosi/rxd miso/txd ss/rts atn/cts pwrok lid hsus clock data clock data clock data 4 4 3 4 col 0-15 row 0-7 8 2 embedded pointer 10 hid manager gpio
pin definitions copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 3 pin numbers mnemonic lqfp type name and function power supply vdd 71 pwr positive supply voltage avref 72 ai positive analog reference voltage avss 73 pwr ground : analog signal vss 30 pwr ground : negative supply voltage vss1 24 pwr auxiliary ground; must be tied to pin 30 reset _reset 25 i controller hardware reset pin : when at low-level, this pin holds the ur8hc007in a reset state. this pin must be held at a logic-low until power supply voltage (vdd) reaches the minimum operating level (2.7v). oscillator pins osci 28 i oscillator input : connect ceramic resonator with built-in load capacitors or cmos clock from external oscillator 4 mhz operating frequency _osco 29 o oscillator output : connect ceramic resonator with built-in load capacitors or keep open if external oscillator is used keyboard / event wake-up _wkup 59 i/pd wake-up : wakes up the chip if there is a key press in the scanned keyboard matrix (active-low) or drives the pin high when running scanned matrix pins row0-row7 70-63 i row matrix outputs col0-col15 54-39 o column matrix outputs ps/2 ports ps2en 27 o control output : when low, disables ps/2 communications by holding the ps/2 clock lines low ipdat 9 i5v/nd5v ps/2 data line for internal pointing device ipclk 6 i5v/nd5v ps/2 clock line for internal pointing device ex0dat 8 i5v/nd5v ps/2 data line for external device 0 ex0clk 5 i5v/nd5v ps/2 clock line for external device 0 ex1dat 7 i5v/nd5v ps/2 data line for external device 1 ex1clk 4 i5v/nd5v ps/2 clock line for external device 1
pin numbers mnemonic lqfp type name and function general purpose input/ouput gio0 gio00/led0-gio3/led3 34-31 i/o general purpose input/output pin, led driver gio1 gio10/sw10-gio15/sw15 17-14 i/o general purpose input/output pin, 36-35 switch input gio16/sw16-gio17/sw17 3-2 i5v/nd5v general purpose input/output pin, switch input note: in order to have a negative edge interrupt capability for sw10 - sw17, the corresponding switch inputs should also be connected to the extended resistive network acting on the _wkup pin. switch closure must be tied to ground; the ic will remain in high power consumption mode until all the switches are released. gio2 gio20/sw0/int0 13 i/o, iint general purpose input/output pin, gio21/sw1/int1 12 switch input. capable of interrupt on both positive and negative edges gio3 - analog input gio30/ad0 1 i/o/ai general purpose input/output pin, a/d input 0 gio31/ad1 80 i/o/ai general purpose input/output pin, a/d input 1 gio32/ad2 79 i/o/ai general purpose input/output pin, a/d input 2 gio33/ad3 78 i/o/ai general purpose input/output pin, a/d input 3 analog output pwm0 62 o channel 0 of pulse width modulator pwm1 61 o channel 1 of pulse width modulator da 11 ao d/a output (range: avss to avref) reserved for embedded pointing device epx0 77 i/o/ai driver, a/d epx1 76 i/o/ai driver, a/d epx2 37 i/o control, driver epx3 38 i/o control, driver epx4 55 i/o control, driver epx5 10 i/o/ao control, driver, analog adjustment epx6 58 i/ipup/o left button epx7 57 i/ipup/o middle button epx8 56 i/ipup/o right button epx9 75 i/o/ai driver, a/d epx10 74 i/o/ai driver, a/d system status monitoring _lid 23 iint lid closed signal from the lid switch (active-low). capable of interrupt on both positive and negative edges pwrok 22 iint power ok signal. capable of interrupt on both positive and negative edges pin definitions (con ? t) copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 4
pin definitions (con ? t) copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 5 pin numbers mnemonic lqfp type name and function _hsus 26 i host_suspended signal (active-low). when low, indicates that host computer system is in power-reduced or stop mode. communication interface _ss/_rts 60 i_int slave_select (spi mode) or ready_to_send (asynchronous serial mode). active-low signal input. low-level indicates that the host system has data for the ur8hc007- 001 peripheral device or the host system is ready to accept data from the ur8hc007-001 peripheral device. capable of interrupt on negative edge. pin 60 and pin 18 should both be "low" for data exchange to occur. _atn/_cts 18 o attention (spi mode) or clear_to_send (asynchronous serial mode). active-low signal output. low-level indicates that the ur8hc007-001 peripheral device has data for the host system or the ur8hc007 peripheral device is ready to accept data from the host system. pin 18 and pin 60 should both be "low" for data exchange to occur. miso/txd 20 i/o / o master-in-slave-out (spi mode) or transmit data (asynchronous serial mode, idle = "high" = 1) mosi/rxd 21 i master-out-slave-in (spi mode) or receive data (asynchronous serial mode) sclk/isel 19 i serial clock (spi mode) or interface select (asynchronous serial mode). tie "low" to select asynchronous serial mode. in spi mode, use the following clock sequence: idle-high / negative-edge (shift data) \ positive- edge (latch data), idle-high. note 1: an underscore in front of the pin mnemonic denotes an active low signal.
juno tm family communications interface copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 6 the juno ? family of controllers implements two modes of serial communications: the "synchronous peripheral interface (spi) mode and the asynchronous serial mode. the spi is a synchronous bi- directional, multi-slave interface that supports bit rates up to 500 kb/s. several hosts and companion chips implement the spi protocol in order to communicate with a wide range of peripherals such as eeproms, a/d converters, mcus and other system components. alternatively, the spi may be implemented through software on the host side. the juno ? family implements the _atn as an additional hand-shake signal in order to support low power operation of the bus. the asynchronous serial mode interface (uart type) operates at a fixed baud rate of 62.5 kb/s. both interfaces are implemented through the same set of four pins. the ic determines the mode of communication with the host during power-up by reading the value of the sclk/isel pin. if the pin is tied low, the asynchronous serial mode is enabled. if it is high, the spi mode is enabled. please refer to the juno tm technical reference manual for a description of handshake and critical timing parameters for each interface. the diagrams below describe the spi and asynchronous communications interfaces, respectively. spi communications interface host (master) mosi miso sclk _ss _atn usar juno ? (slave) slave 2 _ss asynchronous serial communications interface host ur8hc007 cts rts rxd txd cts rts rxd txd isel gnd ur8hc007 (slave 1) slave 2
protocols, commands and reports copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 7 overview the juno ? ur8hc007 implements and supports four types of transaction messages. 1. commands from the ur8hc007 to the host system 2. commands from the host system to the ur8hc007 3. human input device (hid) reports to the system 4. event alert messages to the system the protocol is fundamentally implemented through a set of general packet commands that allow handling and reporting of each individual controller register and each bit within each register. in this manner, the system achieves maximum flexibility in manipulating the operation of the ur8hc007 controller. general message structure communications between the juno ? ur8hc007 and the host processor are implemented using a set of packet protocols and commands. the general structure of a message is shown in the following diagram: general message format the protocol header identifies the type of transaction. the following table lists the available protocols. protocol headers protocols used in commands issued by the host protocol header simple commands 80h write register bit 81h read register bit 82h write register 83h read register 84h write block 85h read block 86h protocols used in responses, reports and alerts issued by the controller protocol header simple commands 80h report register bit & event alerts 81h report register 83h report block 85h pointing device data report 87h keyboard device data report 88h protocol header command/report identifier message body (if applicable) lrc
protocols, commands and reports, (con ? t) copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 8 hid data report the pointing device data reports format covers both absolute (where applicable) and relative positioning devices. in addition, it provides support for mousewheel-type of input devices. keyboard data report the keyboard data reports return changes on the keyboard matrix or the external ps/2 keyboard device. keys are uniquely identified according to the key number table listed in appendix a of the juno tm technical reference manual . the key up or key release number is the result of a logical or of the key number with 80h. lrc (longitudinal redundancy check) the lrc is calculated for the whole packet, including the protocol header. the lrc is calculated by first taking the bitwise exclusive or of all bytes from the message. if the most significant bit (msb) of the lrc is set, the lrc is modified by clearing the msb and changing the state of the next most significant bit. thus, the packet check byte will never consist of a valid lrc with the most significant bit set. general commands format for protocols used by either the host or the ur8hc007, a set of simple commands is implemented. these support the basic communication protocol and handle reset and errors in transmission. a simple command would have the following structure: simple command structure following is a summary of the simple commands used by both the host and the ur8hc007: simple commands summary command protocol cmd code description initialize simple 20h forces the recipient to enter the known default power-on state initialization complete simple 21h issued as a hand-shake response only to the "initialize" command. resend request simple 25h issued upon error in the reception of a package. the recipient will resend the last transmitted packet header (80h) command code lrc
registers copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 9 the juno ? implements a set of internal registers that can be used to control and monitor the operation of the various functional units of the controller ic. these registers can be accessed through the read/write register commands described in the commands chapter of the juno ? technical reference manual . the register architecture of the juno ? allows for maximum flexibility and expandability of the controller operation. at the same time, by using the default values for each register, a system can utilize all the basic functionality of the ic controller with minimum host driver intervention. registers ? page organization registers ? page 0 control and status registers page number register 00 01 255 register offset registers ? page 1 scanned matrix and alternate layout keys registers page number register 00 01 255 register offset 0 1 page number register figure 1: registers ? page organization
power management modes of operation power management copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 10 the ur8hc007 has three modes of operation relating to its power consumption. the "stop" mode is the lowest power consumption mode. in this mode, the crystal is stopped and the ic consumes only 1 a of leakage current. this is the default mode to which the ic will revert any time an event or a signal condition does not force it to exit this mode. the "wait" mode is entered each time it is necessary for a timer to be running in order to perform a system function. such functions include the led blinking mode and the use of one of the pwm channels. typical power consumption in this mode is several hundred a. the "run" mode is entered briefly, only to process an event or while an interrupt-generating signal condition persists. the controller ic will remain in this mode only for as long a signal prohibits it from reentering a lower power consumption mode or for as long as it is necessary to process a host-related transaction (a few milliseconds). the juno ? ur8hc007 family of controllers implements two power management methods: system-coordinated power management and self power management ? (spm). system-coordinated power management primarily determines the tasks performed and the type of reports communicated to the host. the juno ? monitors the system states through the pwrok (power ok), _lid (lid closed) and _hsus (host suspended) lines. in addition to these signal inputs, the ur8hc007 family provides a set of registers, described in the "registers" chapter of the juno tm technical reference manual , that can be used by the host to control the pm-related performance of the controller through software. according to the status of these lines (or register settings), the juno ? will enable or disable specific tasks and reports suited to the current power and system management state of the host. self power management ? describes a method implemented by the juno ? controller that, independently of any system intervention, results in the lowest power consumption possible within the given parameters of its operation. through self power management ? , the juno ? controllers are capable of typically operating at only 1 a, independent of the state of the system. self power management ? primarily determines the actual power consumption of the controller ic. the juno ? implements the semtech-patented self power management ? method to achieve the minimum power consumption possible, independent of the host power management state. even when the host is in the active state, the ic can still operate most of the time at only 1 a, even with external ps/2 devices attached to it. critical suspend spm host suspend lid closed* pwrok=0 pwrok=0 pwrok=0 pwrok=1 and _lid=0 pwrok=1 and _lid=1 and _hsus=0 pwrok=1 and _lid=1 and _hsus=1 pwrok=1 and _lid=1 and _hsus=1 pwrok=1 and _lid=0 pwrok=1 and _lid=1 and _hsus=1 pwrok=1 and _lid=1 and _hsus=0 pwrok=1 and _lid=1 and _hsus=0 pwrok=1 and _lid=0 figure 2: juno tm state diagram
zero-power tm operation of ps/2 ports ps/2 ports copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 11 the juno ? implements the semtech-patented "message loss- less wake-up ? " method to operate all three ps/2 ports. this method enables the controller to interface with devices attached to its ps/2 ports while still operating in the "stop" mode. typical power consumption of the ps/2 ports is therefore 1 a. if a ps/2 device reports a data packet, the controller will exit the "stop" mode for as long as it takes to process the device message and relay the information, if necessary, to the host system. this operation is done transparently to the host, without any message loss or any response delays from the input devices. this unique technology allows computers to operate at their minimum power consumption state even with ps/2 devices attached. systems that employ an internal pointing device, such as a touch pad or a force stick, can benefit the most from this feature, since the pointing device will force the controller to exit its "stop" mode only when there is data to be reported. the ur8hc007-001 provides three ps/2 ports for the hot-plug connection of external keyboards, external pointing devices, and an internal pointing device. all of the internal and external devices are active at all times. data from external and internal devices are merged and seamlessly presented to the system. 5-volt tolerant ps/2 ports the ur8hc007 controller can be powered by a power supply between 3 volts and 5 volts (+/- 10%). even when the controller is powered by a 3-volt supply, the three ps/2 ports can directly interface with 5-volt powered devices ? without the need of any external level-shifting circuitry. the host can enable or disable all the external ps/2 ports simultaneously, in sync with the 5-volt power plane that powers them. alternatively, it can select any ps/2 port selectively, through the "hid enable/disable control" register. ps/2 mouse handling the juno tm provides a port for the connection of an internal ps/2 pointing device. this port supports mousewheel functionality. a pointing device connected to a host system ? s ps/2 port consumes a significant amount of power as it must always be ? on. ? a pointing device connected to one of juno ? s ? ps/2 ports consumes minimal power because the juno ? will power down even when the pointing device is connected and active.
hid manager keyboard encoding copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 12 the ur8hc007 human input device (hid) manager is responsible for the configuration and handling of hid devices that are embedded or attached to the controller. the hid manager has the following responsibilities: 1. enabling and disabling embedded and attached input devices through the "hid enable/disable control" register 2. formatting and relaying input device reports to the host 3. controlling the configuration and operation of both embedded and attached input devices the hid manager consists of four functional blocks: the ps/2 port manager; the keyboard manager; the pointing device manager; and the direct port manager. the function of each manager is explained in full in the juno tm technical reference manual . the ur8hc007-001 will encode an 8-row by 16-column keyboard matrix. oems may reprogram the matrix by sending commands to the ic from the system. the juno tm supports english, japanese and european keyboards. in addition, the ic supports both sticky keys and notebook-style keyboards. the keyboard below, the fujitsu fkb7654, is the default keyboard for the ur8hc007-001. tab q w e ctrl alt fn z space alt ctrl r t y u i o p z x c v b n m , . / <>? cap lock a s d f g h j k l ; ! 1 @ 2 # 3 $ 4 % 5 ^ 6 & 7 * 8 79 5 46 2 1 0 . / 3 + 8 ( 9 ) 0 _ - + = bk sp [ : ' " \ | ] {} shift shift esc f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 sl nl pau brk ins prt del srq pgup pgup pgup pgup ~ ` enter the juno tm provides many gpio pins which enable oems to differentiate their products easily. four gpio ports provide interrupt at both falling and rising edge of signals. two of these pins are dedicated for use as a lid indicator and digital power monitor. the other two may be used for a ring indicator, docking signal, soft power button, etc. three gpio pins provide a/d input and are ideal for battery measurement. three gpio pins provide two pulse width modulation (pwm) channels and one d/a channel and may be used for analog control functions such as lcd brightness/contrast or audio volume control. four gpio pins with high drive ability are set aside as led drivers or i/o. eight gpio pins can be used as system control outputs or inputs, for example, for switches. fujitsu fkb7654 other juno tm series members general purpose input output other members of the juno tm series of companion ics offers advanced, ergonomic control of an internal pointing device. enabled pointing devices include touch pads, touch screens or force sticks. if the application requires an internal pointing device, using a pointing- enabled juno tm will eliminate the need for a dedicated mouse encoder ic.
sample schematic for the ur8hc007-001-fq copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 13 reserved fo reserved fo r embedd embedd e d pointer pointer lid closed lid open from chipset and/or power supply asyn cronous inter face syncr onous inter face communication interface to / from to / from k e y board board matrix matrix to page 2 to page 2 ps/2 i/o ps/2 i/o internal ps/2 pointe internal ps/2 pointe r gio port 0 gio port 1 gio port 2 gio port 3 analog o u t v+ v+ v+ v+ v+ +5v +5v +5v +5v q2 q2 td_npn td_npn q1 q1 td_pnp td_pnp rn1 rn1 10k 9 8 7 6 5 4 3 2 1 r1 r1 10k c1 c1 .1 f y1 y1 4.00 mhz 4.00 mhz sw1 sw1 spdt spdt 1 2 3 u3 u3 volt_det volt_det 1 2 3 u2 u2 74hct4053 74hct4053 x0 x0 12 12 x1 x1 13 13 y0 y0 2 y1 y1 1 z0 z0 5 z1 z1 3 inh inh 6 a 11 11 b 10 10 c 9 x 14 14 y 15 15 z 4 vdd vdd 16 16 vss vss 8 vee vee 7 r3 r3 10k r2 r2 10k c3 c3 47pf 47pf c2 c2 47pf 47pf ur8hc007-001-fq ur8hc007-001-fq gio21/sw1/ gio21/sw1/ int1 int1 12 12 gio20/sw0/ gio20/sw0/ int0 int0 13 13 gio15/sw15 gio15/sw15 35 35 gio14/sw14 gio14/sw14 36 36 epx2 epx2 37 37 epx3 epx3 38 38 gio00/led0 gio00/led0 34 34 gio01/led1 gio01/led1 33 33 gio02/led2 gio02/led2 32 32 gio03/led3 gio03/led3 31 31 gio32/ad2 gio32/ad2 79 79 gio31/ad1 gio31/ad1 80 80 gio30/ad0 gio30/ad0 1 gio33/ad3 gio33/ad3 78 78 epx1 epx1 76 76 epx0 epx0 77 77 epx9 epx9 75 75 r2 r2 68 68 epx10 epx10 74 74 r3 r3 67 67 r7 r7 63 63 epx6 epx6 58 58 r6 r6 64 64 epx7 epx7 57 57 r5 r5 65 65 epx8 epx8 56 56 r4 r4 66 66 r1 r1 69 69 ex0clk ex0clk 5 r0 r0 70 70 ex1clk ex1clk 4 epx4 epx4 55 55 ex1dat ex1dat 7 ex0dat ex0dat 8 pwrok pwrok 22 22 lid 23 23 hsus hsus 26 26 gio16/sw16 gio16/sw16 3 gio17/sw17 gio17/sw17 2 pwm1 pwm1 61 61 epx5 epx5 10 10 pwm0 pwm0 62 62 da da 11 11 gio12/sw12 gio12/sw12 15 15 ss/rts ss/rts 60 60 gio11/sw11 gio11/sw11 16 16 atn/cts atn/cts 18 18 gio10/sw10 gio10/sw10 17 17 gio13/sw13 gio13/sw13 14 14 ps2en ps2en 27 27 mosi/rxd mosi/rxd 21 21 miso/txd miso/txd 20 20 sclk/isel sclk/isel 19 19 osci osci 28 28 osco osco 29 29 vss1 vss1 24 24 vss vss 30 30 avss avss 73 73 c15 c15 39 39 ipclk ipclk 6 c14 c14 40 40 c13 c13 41 41 vdd vdd 71 71 avref avref 72 72 c12 c12 42 42 c11 c11 43 43 c10 c10 44 44 c9 c9 45 45 c8 c8 46 46 c7 c7 47 47 ipdat ipdat 9 c6 c6 48 48 c5 c5 49 49 c4 c4 50 50 c3 c3 51 51 c2 c2 52 52 c1 c1 53 53 c0 c0 54 54 reset reset 25 25 wkup wkup 59 59 n o t _host_suspended powe r_ok _slave_s elect or _rts master_out / slave_in o r r x d syncronous s erial clock _attention or _cts master_in / slave_out or txd _wkup ex1clk ex1d a t ex0clk ex0d a t ipclk ipdat i p pwr gnd gio00 gio01 g i o02 g i o03 gio10 gio11 g i o12 g i o13 g i o14 gio15 gio16 g i o17 gio20 g i o21 gio30 gio31 gio32 g i o33 da pwm0 pwm 1
juno tm electrical characteristics copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 14 absolute maximum ratings (vss = 0v, ambient temperature t a is in the range t low to t high ) parameter symbol value unit supply voltage v dd -0.3 to +7.0 v input voltage all pins except 2-9 v in -0.3 to vdd+0.3 v pins 2-9 (ps/2 ports xxxdat, xxxclk, gio16/sw16, gio17/sw17) v in -0.3 to +5.8 v output current total peak for all pins i oh (peak) -80 i ol (peak) 80 ma total average for all pins i oh (avg) -40 i ol (avg) 40 ma all pins except 31-34 peak for each pin i oh (peak) -10 i ol (peak) 10 ma average for each pin i oh (avg) -5 i ol (avg) 5 ma pins 31-34 (gio00/led0 - gio03/led3) peak for each pin i oh (peak) -10 i ol (peak) 20 ma average for each pin i oh (avg) -5 i ol (avg) 15 ma temperature range operating temperature t low to t high -20 to 85 o c storage temperature t stg -40 to 125 o c
recommended operating conditions, digital section (vss = 0v, ambient temperature t a is in the range t low to t high ) parameter symbol min typ max unit supply voltage v dd 2.7 3.0 5.5 v input logic high voltage all pins except 2-9 v ih 0.8v dd v dd v pins 2-9 (ps/2 ports xxxdat, xxxclk, gio16/sw16, gio17/sw17) v ih 0.8v dd 5.5 v input logic low voltage all pins except 28 v il 0 0.2v dd v pin 28 (osci) v il 0 0.16v dd v input current v i = v ss , v dd )i il / i il -5.0 0 5.0 a input pull-up current (pins 56-58 / ip6-ip8, v i = v ss )i pup -120 -10 a output voltage i oh = -1.0 ma v oh v dd -1.0 v i ol = 1.6 ma v ol 0.4 v current consumption (see note 1 below) full speed mode (fosc=4mhz) i dd 3.5 7.0 ma reduced power mode (fosc=4mhz) i dd 750 a stop mode (interrupts active, fosc=0) 1.0 (t a = 25 o c) i dd .1 10(t a = 85 o c ) a recommended operating conditions, analog section (vss = 0v, ambient temperature t a is in the range t low to t high ) parameter symbol min typ max unit analog signal ground av ss 0v analog reference voltage av ref 2.7 v dd v dd v a/d resolution - 10 bits a/d absolute accuracy 4 lsb a/d analog input voltage range v ia av ss avref v a/d analog input current i ia 5.0 a analog reference current (see note 2) (a/d is active) i avref 200 a d/a resolution - 8 bits d/a absolute accuracy - 2.5 % d/a output impedance r o 1 2.5 4.0 kohms analog reference current (see note 3) (d/a is active, output = full scale) i avref 3.2 ma note 1: please see left note 2: please see left note 3: please see left power consumption while operating the pwm channels juno tm electrical characteristics, (con ? t) copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 15 users should consider the built-in pwm channels for generating slowly changing dc control voltages. since continuous clocking is necessary for the pwm operations, the only penalty for using the built-in pwm channels is the requirement for the chip to operate at least in the reduced power mode, with typical current consumption of 750 a. note1: current consumption values do not include any loading on the output pins or analog reference current for the built-in a/d or d/a modules. note 2: since the built-in a/d module consumes current only during short periods of time (when a/d conversion is actually requested), the analog reference current for the built-in a/d module is not a significant contributor to the overall power consumption. note 3: the analog reference current for the built-in d/a module correlates linearly to the output voltage. for d/a output of 0v, the analog reference current is null. for d/a outputs approaching full scale (avref), the maximum analog reference current is indicated in this table. this current is a significant contributor to the overall power consumption. notes for electricals
mechanicals for the ur8hc007 lqfp package copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 16 ? 0.1 ? ?? 0.2 ? ? ?? ? ? ? ? ? symbol min nom max a a 2 b c d e h e l l 1 y b 2 dimension in millimeters h d a 1 0.225 ? ? i 2 1.0 ? ? m d 12.4 ? ? m e 12.4 10? 0? 0.1 1.0 0.7 0.5 0.3 14.2 14.0 13.8 14.2 14.0 13.8 0.5 12.1 12.0 11.9 12.1 12.0 11.9 0.175 0.125 0.105 0.28 0.18 0.13 1.4 0 1.7 e e e e c h e 1 80 61 20 21 40 41 60 h d d m d m e a f b a 1 a 2 l 1 l y b 2 i 2 recommended mount pad detail f
bill of materials for the ur8hc007-001-fq copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 17 quantity manufacturer part# description 1 generic c1296-104-x50 .1f ceramic chip capacitor, z5u, smt, 1206 2 generic c1206-470-n50 47 pf ceramic chip capacitor, npo orx7r, smt, size:1206 1 harris cd74hct4053m smt triple 2-ch ana mult/dem 3 generic r1206-103-tf-5 10k resistor, 5% thick film, smt, 1206 1 cts 745-101-r103ct-nd 10k, 8 resistors, bussed, 10 pins, smt 1 avx pbrc-4.00br 4.00mhz ceramic resonator with caps, smt 2 alco ade-03 switch, 3-position dip, thd
copyright ?1998-2001 semtech corporation doc8-007-001-ds-109 www.semtech.com 18 for sales information and product literature, contact: hid & system mgmt division semtech corporation 568 broadway new york, ny 10012 hidinfo@semtech.com http://www.semtech.com 212 226 2042 telephone 212 226 3215 telefax semtech western regional sales 805-498-2111 telephone 805-498-3804 telefax semtech central regional sales 972-437-0380 telephone 972-437-0381 telefax semtech eastern regional sales 203-964-1766 telephone 203-964-1755 telefax semtech asia-pacific sales office +886-2-2748-3380 telephone +886-2-2748-3390 telefax semtech japan sales office +81-45-948-5925 telephone +81-45-948-5930 telefax semtech korea sales sales +82-2-527-4377 telephone +82-2-527-4376 telefax northern european sales office +44 (0)2380-769008 telephone +44 (0)2380-768612 telefax southern european sales office +33 (0)1 69-28-22-00 telephone +33 (0)1 69-28-12-98 telefax central european sales office +49 (0)8161 140 123 telephone +49 (0)8161 140 124 telefax copyright ?1998-2001 semtech corporation. all rights reserved. juno, zero-power, self power management, and message loss-less wake-up are trademarks of semtech corporation. semtech is a registered trademark of semtech corporation. all other trademarks belong to their respective companies. intellectual property disclaimer this specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. a license is hereby granted to reproduce and distribute this specification for internal use only. no other license, expressed or implied to any other intellectual property rights is granted or intended hereby. authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights.

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