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| july 2002 ? 2002 fairchild semiconductor corporation nds0605 rev b(w) nds0605 p-channel enhancement mode field effect transistor general description these p-channel enhancement mode field effect transistors are produced using fairchild?s proprietary, high cell density, dmos technology. this very high density process has been designed to minimize on- state resistance, provide rugged and reliable performance and fast switching. they can be used, with a minimum of effort, in most applications requiring up to 180ma dc and can deliver current up to 1a. this product is particularly suited to low voltage applications requiring a low current high side switch. features ? ? 0.18a, ? 60v. r ds(on) = 5 ? @ v gs = ? 10 v ? voltage controlled p-channel small signal switch ? high density cell design for low r ds(on) ? high saturation current g d s sot-23 d s g absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage ? 60 v v gss gate-source voltage 20 v i d drain current ? continuous (note 1) ? 0.18 a ? pulsed ? 1 maximum power dissipation (note 1) 0.36 w p d derate above 25 c 2.9 mw/ c t j , t stg operating and storage junction temperature range ? 55 to +150 c t l maximum lead temperature for soldering purposes, 1/16? from case for 10 seconds 300 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1) 350 c/w package marking and ordering information device marking device reel size tape width quantity 605 nds0605 7?? 8mm 3000 units nds0605
nds0610 rev b(w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = ?10 a ?60 v ? bv dss ? t j breakdown voltage temperature coefficient i d = ?10 a,referenced to 25 c ?53 mv/ c i dss zero gate voltage drain current v ds = ?48 v, v gs = 0 v ?1 a v ds = ?48 v,v gs = 0 v t j = 125 c ?500 a i gss gate?body leakage. v gs = 20 v, v ds = 0 v 100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = ?250 a ?1 ?1.7 ?3 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = ?250 a,referenced to 25 c 3 mv/ c r ds(on) static drain?source on?resistance v gs = ?10 v, i d = ?0.5 a v gs = ?4.5 v, i d = ?0.25 a v gs = ?10 v,i d = ?0.5 a,t j =125 c 1.0 1.3 1.7 5.0 7.5 10 ? i d(on) on?state drain current v gs = ?10 v, v ds = ? 10 v ?0.6 a g fs forward transconductance v ds = ?10v, i d = ? 0.2 a 0.07 0.43 s dynamic characteristics c iss input capacitance 79 pf c oss output capacitance 10 pf c rss reverse transfer capacitance v ds = ?25 v, v gs = 0 v, f = 1.0 mhz 4 pf r g gate resistance v gs = ?15 mv, f = 1.0 mhz 10 ? switching characteristics (note 2) t d(on) turn?on delay time 2.5 5 ns t r turn?on rise time 6.3 12.6 ns t d(off) turn?off delay time 10 20 ns t f turn?off fall time v dd = ?25 v, i d = ? 0.2 a, v gs = ?10 v, r gen = 6 ? 7.5 15 ns q g total gate charge 1.8 2.5 nc q gs gate?source charge 0.3 nc q gd gate?drain charge v ds = ?48 v, i d = ?0.5 a, v gs = ?10 v 0.4 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current ? 0.18 a v sd drain?source diode forward voltage v gs = 0 v, i s = ?0.5 a (note 2) ?0.8 ?1.5 v t rr diode reverse recovery time 17 ns q rr diode reverse recovery charge i f = ?0.5a d if /d t = 100 a/s (note 2) 15 nc notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 350c/w when mounted on a minimum pad.. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 s, duty cycle 2.0% nds0605 nds0610 rev b(w) typical characteristics 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0123456 -v ds , drain to source voltage (v) -i d , drain current (a) v gs =-10v -4.5v -3.5v -3.0v -6.0v -4.0v -2.5v 0.8 1 1.2 1.4 1.6 1.8 2 2.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs =-3.0v -3.5v -10v -6.0v -4.5v -4.0v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistanc e i d = -0.5a v gs = -10v 0 1 2 3 4 5 246810 -v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = -0.25a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 0.2 0.4 0.6 0.8 1 1.2 1 1.5 2 2.5 3 3.5 4 4.5 -v gs , gate to source voltage (v) -i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = -10v 0.0001 0.001 0.01 0.1 1 10 0.2 0.4 0.6 0.8 1 1.2 -v sd , body diode forward voltage (v) -i s , reverse drain current (a ) v gs = 0v t a = 125 o c 25 o c -55 o c figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. nds0605 nds0610 rev b(w) typical characteristics 0 2 4 6 8 10 0 0.4 0.8 1.2 1.6 2 q g , gate charge (nc) -v gs , gate-source voltage (v) i d = -0.5a v ds = -12v -24v -48v 0 20 40 60 80 100 0 102030405060 -v ds , drain to source voltage (v) capacitance (pf) c iss c oss c rss f = 1 mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.001 0.01 0.1 1 10 1 10 100 -v ds , drain-source voltage (v) -i d , drain current (a) dc 10s 1s 100ms r ds(on) limit v gs = -10v single pulse r ja = 350 o c/w t a = 25 o c 10ms 1ms 100us 0 1 2 3 4 5 0.01 0.1 1 10 100 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 350c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transien t thermal resistance r ja (t) = r(t) * r ja r ja = 350 o c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p (p k ) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1a. transient thermal response will change depending on the circuit board design. nds0605 !"#$ %"& '(% & % )'"% &' ! %*$%('( (! '&$$% "'+ '% ,'*- %& ''.$ '- '( $$ %+ !% !"'* %("& % % $% %( / 0 ! 11 2 2 34 5 1 23 45 11 3 45 1 1 1 2 1 3 21 6 2 7 1 21 11 2 1 21 11 23 2 $ 2 ( ( % 1 1 1 1 2 2 1 2 3 11 2 1 2 1 1 2 1 1 1 2 1 2 " $ $ ( $ !"# ! $ % & '( ) * + ! ,!$ -! # ! ,!. - ,! .! , ./01 . , " " "! "# ! 2+# ! % ! , #34 #35 #36 ( ( + # 7% 7 8 |
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