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ds04-27219-3e fujitsu semiconductor data sheet assp for power supply applications mobile pentium ? ii dc/dc converter ic mb3871 n description the fujitsu mb3871 is a pulse width modulation (pwm) dc/dc converter ic chip that provides a selection of 1.3 v to 2.0 v output voltages for mobile pentium ? ii* cpus, using a 4-bit input signal information. the mb3871 utilizes synchronous rectification for high efficiency and features a soft-start/discharge control function for ease in designing power supplies in multi-supply systems, making it ideal for mobile pentium ? ii power supply systems. * : pentium is the registered trademark of intel corporation. n features ? highly efficient for using synchronous rectification scheme ? on-chip soft-start/discharge control circuit ? high precision output voltage: 1.2% ? 4-bit, 16-step dac: 2.0 v to 1.3 v in 50 mv steps ? frequency range: 100 khz to 500 khz using variable resistance (on-chip frequency setting capacitance) ? standby current: 0 m a typ ? on-chip pwrgood circuit for output voltage state detection ? timer-latch short-circuit protection circuit, and overvoltage protection circuit for output protection n pac k ag e 24-pin plastic ssop (fpt-24p-m03)
2 mb3871 n pin assignment rt : 1 rs : 2 sgnd : 3 cs : 4 ?n : 5 fb : 6 enb : 7 out1 : 8 vs : 9 cb : 10 out2 : 11 pgnd : 12 24 : vref 23 : v cc 22 : cscp 21 : pwrgood 20 : vsense 19 : ctl 18 : test 17 : vd3 16 : vd2 15 : vd1 14 : vd0 13 : vb (fpt-24p-m03) (top view)
3 mb3871 n pin description pin no. symbol i/o descriptions 1 rt triangular wave frequency setting resistor connection pin 2 rs discharging resistor connection pin for soft start capacitor 3 sgnd ground pin 4 cs soft start capacitor connection pin (also used for discharge control) 5 Cin i error amplifier inverted input pin 6 fb o error amplifier output pin 7 enb i discharge control function enable/disable switch control pin 8 out1 o totem-pole output pin (external main-side fet gate drive) 9 vs external main-side fet source-side connection 10 cb output bootstrap pin insert a capacitor between the cb and vs pins, to bootstrap the ic internal output transistor. 11 out2 o totem-pole output pin (external synchronous rectifier-side fet gate drive) 12 pgnd ground pin 13 vb output circuit power supply pin 14 vd0 i 4-bit digital input pin used to set dc/dc converter output voltage 15 vd1 i 4-bit digital input pin used to set dc/dc converter output voltage 16 vd2 i 4-bit digital input pin used to set dc/dc converter output voltage 17 vd3 i 4-bit digital input pin used to set dc/dc converter output voltage 18 test test pin for d/a output. set to open when in use. 19 ctl i power supply control pin the ctl pin is set to l level to place the ic in standby mode. 20 vsense i pwrgood circuit input pin 21 pwrgood o pwrgood output pin (open-drain output) outputs a h level signal when the output voltage is within the range from vtlow to vthigh. 22 cscp timer-latch short-circuit protection capacitor connection pin 23 v cc power supply pin for reference power and control circuit 24 vref o reference voltage output pin
4 mb3871 n block diagram + C + C C + + C + + + C vb cb vs out1 out2 ctl (17.5%) ( 10%) vb vref cscp v scp ct (40 pf) rt sgnd enb bias bias dtc v cs cs rs fb Cin cs comp. scp comp. vsense pwrgood powergood pwrgd overvoltage protection ovp pwm comp.2 pwm comp.1 error amp. v cc pgnd 13 10 8 9 11 12 19 7 23 3 24 22 1 18 17 16 15 14 4 2 6 5 20 21 osc d/a (4-bit) scp ctl logic uvlo ref power on/off ctl drive 1 drive 2 cs vd0 vd1 vd2 vd3 test (3.5 v)
5 mb3871 n output voltage setting code vd3 vd2 vd1 vd0 output voltage setting (v) 0000 2.000 000 11.950 00 10 1.900 00 1 11.850 0 100 1.800 0 10 11.750 0 1 10 1.700 0 1 1 11.650 1000 1.600 100 11.550 10 10 1.500 10 1 11.450 1 100 1.400 1 10 11.350 1 1 10 1.300 1 1 1 1 0 (output off)
6 mb3871 n absolute maximum ratings * : when mounted on a 10 cm-square dual-sided epoxy base board warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol condition value unit power supply voltage v cc 20v bias voltage v b 20v boot voltage v cb 32v control input voltage v ctl 20v pwrgood output voltage v pwrgd 17v output current i o 120 ma peak output current i o duty 5% (t = 1/f osc duty) 800 ma allowable dissipation p d ta +25 c 740* mw storage temperature tstg C55 to +125 c
7 mb3871 n recommended operating conditions warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within the recommended operating conditions. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representative beforehand. parameter symbol condition value unit min. typ. max. power supply voltage v cc 4.6518v bias voltage v b 518v boot voltage v cb 30v reference voltage output current i or C10ma input voltage v in Cin pin 0 v cc C 0.9 v v in ctl, enb, vd3 to vd0 pins 018v v in vsense 0 v cc v output current i o out pin C100 100 ma i pg pwrgood pin 1 ma peak output current i o duty 5% (t = 1/f osc duty) C700 700 ma oscillator frequency f osc 100 200 500 khz timing resistance r t 51 130 270 k w boot capacitance c b 0.11.0 m f reference voltage output capacitance c ref 0.11.0 m f soft start capacitance c s 4700 10000 pf discharge control resistance r s 100 470 k w short detection capacitance c scp 2200 10000 pf operating temperature ta C30 +25 +85 c
8 mb3871 n electrical characteristics (ta = +25 c, v cc = 5 v) * : standard design value (continued) parameter symbol pin no. condition value unit min. typ. max. reference voltage block (ref) output voltage v ref 24 v ref = 0 ma 3.465 3.500 3.535 v output voltage temperature regulation d v ref /v ref 24 ta = C30 c to +85 c* 0.5 % input stability line 24 v cc = 4.6 v to 18 v 1 10 mv load stability load 24 i o = 0 ma to C1 ma 3 10 mv short circuit output current i os 24 vref = 1 v C20 C10 C3 ma under voltage lockout circuit block (uvlo) threshold voltage v th 4 v cc = 3.4 3.7 4.0 v hysteresis voltage v h 4 0.18 0.21 v reset voltage v rst 41.72.1v soft start block (cs) charge current i cs 4 C2.8 C2.0 C1.2 m a short circuit protection comparator block (scp) threshold voltage v th 4 0.63 0.68 0.73 v input source current i cscp 22 C2.8 C2.0 C1.2 m a short detection interval t scp 22 cscp = 2200 pf 0.50 0.75 1.34 ms triangular wave oscillator block (osc) oscillator frequency f osc 8, 11 r t = 130 k w 180 200 220 khz frequency temperature regulation d f/fdt 8, 11 ta = C30c to +85c* 1 % error amplifier block (error amp.) threshold voltage v th1 6 fb = 1.6 v, vd3 to vd0 = 1000 1.5810 1.6000 1.6192 v v th2 6 fb = 1.6 v, vd3 to vd0 = 1110 1.2845 1.3000 1.3156 v vth temperature regulation d v t /v t 6 ta = C30c to +85c* 0.5 % input bias current i b 5 Cin = 0 v C200 C50 na voltage gain a v 6dc 60 100 db frequency bandwidth bw 6 a v = 0 db* 800 khz output voltage v oh 6 2.18 3.5 v v ol 60.81.0v output source current i source 6 fb = 1.6 v C90 C45 m a output sink current i sink 6 fb = 1.6 v 3.0 12.0 ma
9 mb3871 (ta = +25 c, v cc = 5 v) (continued) parameter symbol pin no. condition value unit min. typ. max. pwm comparator blocks (pwm comp.1, 2) threshold voltage v tl 8, 11 duty cycle = 0% 1.3 v v th 8, 11 duty cycle = dtr 1.86 2.0 v dead time control block (dtc) maximum duty cycle dtr 8 r t = 130 k w 85 90 95 % output blocks (drive1, 2) output voltage (main side) v oh1 8 out1 = C100 ma, vb = 5 v, cb = 20 v, vs = 15 v cb C 2.5 cb C 1.5 v v ol1 8 out1 = 100 ma, vb = 5 v, cb = 20 v, vs = 15 v vs + 1.1 vs + 1.4 v output voltage (synchronized rectifier side) v oh2 11 out2 = C100 ma, vb = 5 v vb C 2.5 vb C 1.5 v v ol2 11 out2 = 100 ma, vb = 5 v 1.11.4v diode voltage v diode 13 i diode = 10 ma 1.0 1.1 v control block (ctl) ctl input voltage v ih 24 ic operating mode 2.0 18 v v il 24 ic standby mode 0 1.0 v input current i ctl 19 ctl = 5 v 100 160 m a pwrgood comparator protection block (pwrgd) threshold voltage v tlow 21 vd3 to vd0 setting, vsense = 0.88 vd 0.90 vd 0.92 vd v v thigh 21 vd3 to vd0 setting, vsense = 1.08 vd 1.10 vd 1.12 vd v hysteresis voltage v h 21 3 30 50 mv output leak current i leak 21 pwrgood = 5 v 40 m a output voltage v ol 21 pwrgood = 1 ma 0.06 0.4 v discharge control comparator (cs comp.) threshold voltage v th 24 cs = 0.05 0.07 v discharge control on/off block (ctl logic) enb input voltage v ih 24 discharge control on 2.0 18 v v il 24 discharge control off 01.0v input current i enb 7 enb = 0 v C1.0 C0.05 m a 1.2
10 mb3871 (continued) (ta = +25 c, v cc = 5 v) parameter symbol pin no. condition value unit min. typ. max. over voltage protection comparator block (ovp) threshold voltage v th 8, 11 vsense = , vd = 1.3 v 1.15 vd 1.175 vd 1.20 vd v hysteresis voltage v h 8, 11 3 30 50 mv vsense pin input current i sense 20 vsense = 0 v C10 C0.1 m a d/a (vd3 to vd0 pin) (d/a) d/a input voltage v ih 14 to 17 2.018v d/a input voltage v il 14 to 17 01.0v input current i d 14 to 17 vd3 to vd0 = 5 v 0.05 1.0 m a general standby current i ccs 23 ctl = 0 v 10 m a power supply current i cc 23 4.0 6.0 ma
11 mb3871 n typical characteristics (continued) power supply current vs. power supply voltage characteristics 5.0 4.0 3.0 2.0 1.0 0 0 5.0 10.0 15.0 20.0 25.0 power supply voltage v cc (v) ta = +25 c v b = 5 v power supply current i cc (ma) reference voltage vs. power supply voltage characteristics 5.0 4.0 3.0 2.0 1.0 0 0 4.0 8.0 12.0 16.0 20.0 power supply voltage v cc (v) reference voltage v ref (v) v ref vs. temperature characteristics temperature ta ( c) v cc = 5 v, vb = 5 v, rt = 130 k w 3.60 3.55 3.50 3.45 3.40 ?0.0 ?0.0 0.0 20.0 40.0 60.0 80.0 100.0 reference voltage v ref (v) reference voltage, ctl pin current vs. control voltage 5.0 4.0 3.0 2.0 1.0 0 0 5.0 10.0 15.0 20.0 25.0 control voltage v ctl (v) ta = +25 c v b = 5 v reference voltage v ref (v) 500.0 400.0 300.0 200.0 100.0 0 control pin current i ctl ( m a) v ref i ctl err threshold (2.0 v setting) vs. temperature characteristics temperature ta ( c) v cc = 5 v, vb = 5 v, rt = 130 k w 2.04 2.02 2.00 1.98 196 1.94 ?0.0 ?0.0 0.0 20.0 40.0 60.0 80.0 100.0 err threshold (2.0 v setting) (v) err threshold (3.5 v setting) vs. temperature characteristics temperature ta ( c) v cc = 5 v, vb = 5 v, rt = 130 k w 3.60 3.55 3.50 3.45 3.40 ?0.0 ?0.0 0.0 20.0 40.0 60.0 80.0 100.0 err threshold (3.5 v setting) (v)
12 mb3871 (continued) (continued) err threshold (1.3 v setting) vs. temperature characteristics temperature ta ( c) v cc = 5 v, vb = 5 v, rt = 130 k w 1.34 1.32 1.30 1.28 1.26 1.24 ?0.0 ?0.0 0.0 20.0 40.0 60.0 80.0 100.0 err threshold (1.3 v setting) (v) error amp. gain, phase vs. frequency characteristics frequency f (h z ) gain a v (db) 40 30 20 10 0 ?0 ?0 ?0 ?0 1 k 10 k 100 k 1 m 10 m 180 135 90 45 0 ?5 ?0 ?35 ?80 ta = +25 c v cc = 5 v v b = 5 v av f phase f ( ) + + 3 v 240 k w out 10 k w v ref 1 m f in 10 k w 1.5 v 2.4 k w error amp.
13 mb3871 (continued) triangular wave oscillator frequency vs. power supply voltage characteristics triangular wave oscillator frequency vs. timing resistance characteristics triangular wave oscillator frequency vs. temperature characteristics power supply voltage v cc (v) 220 210 200 190 180 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 oscillator frequency fosc (khz) vb = 5 v, rt = 130 k w timing resistance rt (k w ) oscillator frequency fosc (khz) 1000 100 10 10 100 1000 v cc = 5 v, vb = 5 v temperature ta ( c) oscillator frequency fosc (khz) ?0.0 ?0.0 0.0 20.0 40.0 60.0 80.0 100.0 220 210 200 190 180 v cc = 5 v, vb = 5 v, rt = 130 k w
14 mb3871 n function description 1. switching regulator function (1) reference voltage circuit (ref) the reference voltage circuit uses the voltage supply from the v cc pin (pin 23) to generate a temperature compensated reference voltage ( @ 3.5 v) for use as the reference voltage for the internal circuits of the ic chip. it is also possible to supply a reference voltage output of up to 1 ma to external circuits through the vref pin (pin 24). (2) triangular wave oscillator (osc) the triangular wave form is generated using an on-chip frequency selection capacitor, plus the frequency selection resistance connected to the rt pin (pin 1). the triangular wave is input to the pwm comparator circuits on the ic. (3) error amplifier (error amp.) the error amplifier circuit is used to detect the output voltage from the dc/dc converter for output as the pwm control signal. the in-phase input range covers the full range from 0 v to v cc C 0.9 v. by connecting a feedback resistance and capacitor between the fb pin (pin 6) and Cin pin (pin 5), it is possible to create any desired level of loop gain, thereby providing stable phase compensation to the system. also, it is possible to prevent current spikes at power supply start-up by connecting a soft start capacitor to the cs pin (pin 4), the non-inverting input pin for error amp. the use of error amp. for soft start detection makes it possible for a system to operate on a fixed soft start time that is independent of the output load on the dc/ dc converter. (4) pwm comparators (pwm comp.1, pwm comp.2) pwm comp.1 and pwm comp.2 are voltage-pulse width converters that control output voltage according to input voltage. pwm comp.1 controls the pulse width on the main-side output circuit, and pwm comp.2 controls the pulse width on the synchronous rectifier side output circuit. the triangular wave generated by the triangular wave oscillator is compared with the output voltage from error amp., and during intervals when error amp. output is higher than the triangular wave, the main-side output transistor is switched on and the synchronous rectifier side output transistor is turned off. pwm comp.1 is set to a maximum duty cycle of approximately 90%. (5) output circuits (drive1, drive2) the output circuits on both the main-side and synchronous rectifier-side have a totem-pole configuration, and are capable of driving an external n-ch. mos fet. (6) power supply control circuit (ctl) this circuit is able to control power supply on/off switching from the ctl pin (pin 19). (during standby mode, supply current is 0 m a typ.) (7) dac circuit (d/a) this circuit controls the output voltage fed to the cpu; using 4-bit input information allows the voltage to be selected in 50 mv steps from 1.3 v to 2.0 v. when all d/a input pins vd3 through vd0 (pin 17 through pin 14 ) are set to h level, dc/dc converter output voltage is 0 v.
15 mb3871 2. protection functions (1) v cc under voltage lockout circuit (uvlo) power surges at power-on, or momentary under-voltage situations can cause abnormal operation in the mb3871, which may lead to damage or deterioration in systems. this circuit prevents abnormal operation during times of low voltage by using the supply voltage to detect the level of the internal reference voltage, and fixes output pins out1 (pin 8) and out2 (pin 11) to l level. once the supply voltage recovers to a level above the threshold voltage of the under voltage lockout circuit, operation is restored. (2) timer-latch short-circuit protection circuit (scp) this circuit detects the output voltage level from error amp. and activates the timer circuit, charging the external capacitor from the cscp pin (pin 22) when error amp. output voltage level reaches or exceeds about 2.1 v. if error amp. output does not return to the normal voltage range before the capacitor voltage reaches about 0.68 v, the latch circuit is activated and the output pins (out1, out2) are held at l level. once the protector circuit is activated, it can be reset by switching the power supply off and on again. (3) overvoltage protection circuit (ovp) when the dc/dc converter output voltage (v o ) exceeds the output voltage set by the vd3 to vd0 pins by more than +17.5%, the overvoltage protection circuit output signal goes to h level causing one output pin (out1) to be held at l level and the other output pin (out2) to be held at h level. (4) pwrgood comparator detection circuit (pwrgd) the pwrgood pin (pin 21) outputs an h level signal as long as the vsense pin (pin 20) is receiving the dc/dc converter output voltage (v o ) within the range of 0.9 to 1.1 times the output voltage set by the vd3 to vd0 pins. 3. soft start/discharge control (1) soft start circuit (cs) connecting a capacitor to the cs pin (pin 4) prevents the inrush current at power turnon. using an error amp. for detecting the soft error allows the soft start time to be initiated independent of output load from the dc/dc converter. (2) discharge control on/off circuit (ctl logic) entering an l level signal at the ctl pin while an h level signal is input at the enb pin causes the discharge control on/off circuit (ctl logic) to switch the soft start circuit (cs) from charging to discharging. the resistance (r s ) connected to the rs pin (pin 2) charges the soft start capacitor (c s ), so that error amp. provides control over the dc/dc converter output voltage in the same way as during a soft start. this makes it possible to control voltage drop independently of output load. when the cs pin voltage reaches the discharge control comparator circuit (cs comp.) threshold voltage ( @ 50 mv), the discharge control is canceled. when an l level signal is input at the enb pin (pin 7), the dc/dc converter output voltage discharge time control is switched off.
16 mb3871 n method of setting the soft start time at startup of the mb3871, the capacitor (c s ) connected to the cs pin begins charging. this produces a soft start, by providing output voltage from error amp. that is proportional to the cs pin voltage regardless of the dc/dc converter load current. soft start time (time to output setting voltage vd) t s (sec) c s ( m f) n time setting by short detection when load conditions change rapidly with the reduced output voltage, as when a load fault occurs, the capacitor cscp connected to the cscp pin (pin 22) is charged to threshold voltage (v th :=0.68v) and sets a latch, the external fet is turned off (inactive interval 100%). short detection time t pe (sec) 0.68 c scp ( m f) / 2 ( m a) n oscillator frequency setting the oscillator frequency can be set by connecting resistance to the rt pin (pin 1). oscillator frequency f osc (khz) 26250 / rt (k w ) n method of setting the discharge time ? an l level ctl signal while the enb pin is set to h level causes the resistance (r s ) connected to the rs pin to discharge electrical charge the capacitor (c s ) connected to the cs pin, causing the output voltage to fall gradually regardless of the dc/dc converter load current. discharge time (time to 0.05 v output voltage) toff (msec) r s (k w ) c s ( m f) ln ( ) ? as long as the enb pin is set to l level, the discharge control function is switched off. n d/a block vd3 to vd0 switching ? switching of the vd3 to vd0 pin signal during the mb3871 operation may cause transient fluctuation in output voltage from the dc/dc converter. the resulting voltage instability may cause an l level from the pwrgood block, activating the ovp protection and shutting off the output from the dc/dc converter. to switch vd3 to vd0 pin settings, first input an l level control signal to the ctl pin to place the mb3871 in standby status. ? when all vd3 to vd0 pin signals are set to h level, the dc/dc converter output is switched off. ~ vd 2 ( m a) ~ ~ ~ vd v th (cs comp)
17 mb3871 n pwrgood comparator circuit, ovp circuit operation timing chart ctl signal dc/dc output voltage pwrgood signal out1 signal out2 signal dc/dc output voltage pwrgood out2 vd 1.1 vd 1.175 vd 0.9 vd 0.9 vd 1.175 vd 1.1 vd 0.9 operation when enb signal is ?igh? hysteresis voltage 30 mv hysteresis voltage 30 mv hysteresis voltage 30 mv
18 mb3871 n ctl logic circuit operation timing chart n dc/dc converter input voltage (vin) and vb voltage setting the voltage at the cb pin is bootstrapped from the vs pin voltage by an amount equivalent to the vb pin voltage, as a result of the bootstrap capacitance (c b ) between the cb pin and vs pin. therefore, either the vin voltage or vb pin voltage should be adjusted so that the sum of the dc/dc converter block input voltage vin plus the vb pin voltage does not exceed the recommended operating conditions for the cb pin boot voltage (v cb ). ctl signal enb signal v ref output voltage cs pin voltage dc/dc output voltage 0.05 v ts toff 13 10 8 9 11 12 dc/dc converter block vb cb out1 vs c b v o vin vb out2 p gnd drive 1 drive 2 1 * 2 * 2 * *1: to connect the external low vf diode (schottky barrier diode) makes vb pin voltage drop reduced and then can perform the higher efficiency. *2: the switching noise can be reduced (0 w to 5 w ) by connecting the resistance when the external mosfet gate input capacitance (ciss) is large, caused by the external mosfet gate drive current limiting resistance.
19 mb3871 n dc/dc converter switching operation waveforms 30 25 20 15 10 5 20 15 10 5 0 - 5 0 - 5 60 50 40 30 20 10 0 - 10 0 246810 out2 (v) vs (v) t ( m s) 0 0.2 0.4 0.6 0.8 1.0 t ( m s) 10 v 5 v 5 v 5 v 10 v 5 v out1 (v) 30 25 20 15 10 5 1 0.5 0 - 0 . 5 - 1 0 - 5 60 50 40 30 20 10 0 - 10 out2 (v) vs (v) out1 (v) 0 0.2 0.4 0.6 0.8 1.0 t ( m s) 10 v 500 mv 100 ns 100 ns 500 mv 1 m s vd3 C vd0 = 0100 (1.8 v) load: 5 a fosc = 200 khz setting expansion synchronous rectifier length: 250 ns (typ) out1 tf: 35 ns (typ) out2 tr: 70 ns (typ) synchronous rectifier length: 180 ns (typ) out1 tr: 60 ns (typ) out2 tf: 50 ns (typ) vs vs vs out2 out2 out2 out1 out1 out1
20 mb3871 n application example + C + C C + + C + + + C v o v s 2.2 m f 2.5 m h 150 m f 6 si4416 2 si4416 2 0.1 m f 220 m f 0.1 m f 220 m f 0.1 m f 0.1 m f 2200 pf 4700 pf 12000 pf rb415d 2 vb cb out1 out2 (24 pins) ctl (17.5%) ( 10%) vb vref cscp v scp ct (40 pf) 130 k w 100 k w 5.1 k w 2.4 k w 4.7 k w rt sgnd enb bias bias dtc v cs cs rs fb Cin cs comp. scp comp. vsense pwrgood powergood pwrgd over voltage protection ovp pwm comp.2 pwm comp.1 error amp. v cc v in 15 v 5 v vb pgnd 13 10 8 9 11 12 19 7 3 22 1 14 15 16 17 18 4 2 6 5 20 21 osc d/a (4-bit) scp ctl logic uvlo ref power on/off ctl drive 1 drive 2 cs vd0 vd1 vd2 vd3 test (3.5 v) vs 24 23 output voltage setting signals rb415d: rohm co., ltd. rb051l C 40: rohm co., ltd. note: si4416: siliconix co. rb051l C 40 rb415d
21 mb3871 n reference data (continued) 100 95 90 85 80 75 70 65 60 55 50 0.1 1.0 10.0 vin = 7 v vin = 15 v vin = 22 v vin = 11 v conversion efficiency vs load current characteristics (output voltage = 1.8 v) conversion efficiency (%) load current (a)
22 mb3871 (continued) 0 4 8121620 t ( ms ) 10 5 0 3 2 1 0 v o ( v ) ctl ( v ) cs = 4700 pf enb = v cc 2ms 5 v 1 v 0 200 400 600 800 1000 t (m s ) 5 10 15 0 5 50 100 0 - 50 v o ( mv ) i o ( a ) 100 m s 10 mv 50 mv transient response for ctl on/off (output = 2.0 v, nonload) transient response for load abrupt change (output = 2.0 v)
23 mb3871 n usage precautions 1. device settings must not exceed absolute maximum ratings. usage under conditions exceeding absolute maximum ratings may permanently damage lsi devices. note also that in normal operation usage within recommended operating conditions is preferred, and that the reliability of lsi devices may be adversely affected when used outside these conditions. 2. devices should be used within recommended operating conditions. recommended operating conditions are recommended values within which the lsi device is warranted to operate normally. rated values of electrical characteristics are warranted within the range of recommended operating conditions and within the conditions listed in the condition column for each parameter. 3. printed circuit board ground lines should be designed in consideration of common impedance values. 4. observe precautions against static electricity. ? containers in which semiconductors are placed should either be protected against static electricity, or be of conductive material. ? after mounting of devices, use conductive bags or conductive containers when storing or transporting printed circuit boards. ? working surfaces, tools and instruments should be properly grounded. ? workers should be grounded by a ground line with 250 k w to 1 m w resistance in series between the worker and ground. n ordering information part number package remarks mb3871 pfv-g-bnd 24-pin plastic ssop (fpt-24p-m03)
24 mb3871 n package dimension 24-pin plastic ssop (fpt-24p-m03) c 1994 fujitsu limited f24018s-2c-2 0.50?.20 (.020?008) 0.10?.10(.004?004) (stand off) 0 10 details of "a" part 7.75?.10(.305?004) 0.65?.12(.0256?0047) 7.15(.281)ref 6.60(.260) 5.60?.10 nom 7.60?.20 (.220?004) (.299?008) "a" .006 ?001 +.002 ?.02 +0.05 0.15 .049 ?004 +.008 ?.10 +0.20 1.25 .009 ?002 +.004 ?.05 +0.10 0.22 0.10(.004) index * * (mounting height) dimensions in mm (inches) *: these dimensions do not include resin protrusion.
25 mb3871 fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-8588, japan tel: 81(44) 754-3763 fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, usa tel: (408) 922-9000 fax: (408) 922-9179 customer response center mon. - fri.: 7 am - 5 pm (pst) tel: (800) 866-8608 fax: (408) 922-9179 http://www.fujitsumicro.com/ europe fujitsu mikroelektronik gmbh am siebenstein 6-10 d-63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 http://www.fujitsu-ede.com/ asia pacific fujitsu microelectronics asia pte ltd #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281-0770 fax: (65) 281-0220 http://www.fmap.com.sg/ f9903 ? fujitsu limited printed in japan all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. fujitsu semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu sales representatives before such use. the company will not be responsible for damages arising from such use without prior approval. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan.

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