1 1 of 7 FX-702 low jitter vcso frequency translator previous part number fx-730 the FX-702 is a low jitter precision frequency translator used to translate input frequencies such as 19.44, 38.88, 77.76 mhz, etc. to a binary multiple frequency as high as 850 mhz. the FX-702s superior jitter performance is achieved through the plls integrat ed vcso. the FX-702 is housed in a hermetically sealed leadless surface mount package o ered on tape and reel. 5 x 7.5 x 2.5 mm package ? frequency translation up to 850 mhz ? vcso based pll for ultra-low jitter ? cmos / lvds / lvpecl inputs compatible ? di erential lvpecl or lvds output ? cmos lock detect ? external divider for input frequencies < 19 mhz ? 0/70c or -40/+85c temperature range ? fully compatible for lead free assembly ? sonet/sdh ? 10gbe./10.3gbe ? frequency translation ? clock smoothing, clock switching ? fec scaling ? features applications block diagram description FX-702 phase detector & ld vcc (10) charge pump vcso switch external divider 1, 4, 8, 16, 32 1, 2, 4 1, 4 ld (2) lfn (6) cfln (7) mode (4) brclk (1) gnd (3, 5, 13) fout (8) cfout (9) figure 1. functional block diagram fin (12) cfin (11) cbrclk (4) vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009
2 2 of 7 1. see standard frequencies and ordering information. 2. parameters are tested with production test circuit below (fig 1). 3. parameters are tested at ambient temperature with test limits guard banded for speci ed operating temperature. 4. measured from 20% to 80% of a full output swing (fig 2). 5. not tested in production, guaranteed by design, veri ed at quali cation. 6. minimum input low voltage not to exceed 2.125 v. minimum input high voltage not to go below 1.49 v. 7. ac coupling is recommended. there is an internal pull-up and pull-down resistor on all clock inputs (fin, brclk). figure 1. lvpecl test circuit figure 2. 10k lvpecl waveform performance speci cations table 1. electrical performance parameter symbol min typical maximum units frequency 1, 2, 3 input frequency output frequency f in f out 19.44 125 850 850 mhz mhz capture range (ordering option) 1, 2, 3 apr 32, 50, or 100 ppm supply voltage 2, 3 current (no load) 3 v cc i cc 2.97 3.3 3.63 100 v ma lvcmos input 2, 3 input high voltage input low voltage v ih v il 2.0 0 v cc 0.8 v v lvpecl input peal-peak amplitude swing 6, 7 0.20 3.00 v lock detect output output high voltage logic low voltage v oh v ol 0.9*v cc 0.1*v cc v v outputs mid level - lvpecl 2, 3 swing - lvpecl 2, 3 mid level - lvds 2, 3 swing - lvds 2, 3 current 5 rise time 4, 5 fall time 4, 5 symmetry 2, 3 jitter generation - 622.08mhz output (12khz-20mhz bw) 5 (50khz - 80mhz bw) 5 i out t r t f sym j j v cc -1.4 450 250 45 v cc -1.25 600 v cc -1.2 450 50 0.21 0.12 v cc -1.0 950 20 400 400 55 0.5 0.4 v mv-pp v mv-pp ma ps ps % ps-rms ps-rms operating temp (ordering option) 1, 3 t op 0/70, -40/85 0c vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009
3 3 of 7 stresses in excess of the absolute maximum ratings can permanently damage the device. functional operation is not implied at these or any other conditions in excess of conditions represented in the operational sections of this data sheet. exposure t o absolute maximum ratings for extended periods may adversely a ect device reliability. the FX-702 is capable of meeting the following quali cation tests: although esd protection circuitry has been designed into the the FX-702, proper precautions should be taken when handling and mounting. vi employs a human body model (hbm) and a charged device model (cdm) for esd susceptibility testing and design protection evaluation. esd thresholds are dependent on the circuit parameters used to de ne the model. reliability absolute maximum ratings table 2. absolute maximum ratings parameter symbol ratings unit power supply v cc 0 to 6 v input current i in 100 ma output current i out 25 ma storage temperature t str -55 to 125 0c soldering temperature/duration t peak /t p 260 / 40 0c/sec table 3. environmental compliance parameter conditions mechanical shock mil-std-883, method 2002 mechanical vibration mil-std-883, method 2007 solderability mil-std-883, method 2003 gross and fine leak mil-std-883, method 1014 resistance to solvents mil-std-883, method 2016 moisture sensitivity level rating msl 1 handling precautions table 4. predicted esd r$atings model class minimum conditions human body model 2 2000 v mil-std 883, method 3015 charged device model c5 1000 v jedec, jesd22-c101 machine model m3 200 v esd stm5.2-1999 vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009
4 4 of 7 table 5. re ow pro le (ipc/jedec j-std-020c) parameter symbol value preheat time t s 60 sec min, 180 sec max ramp up r up 3 0c/sec max time above 217 0c t l 60 sec min, 150 sec max time to peak temperature t amb-p 480 sec max time at 260 0c t p 20 sec min, 40 sec max ramp down r dn 6 0c/sec max table 6. tape and reel information tape dimensions (mm) reel dimensions (mm) w f do po p1 a b c d n w1 w2 #/reel 16 7.5 1.5 4 8 178 1.5 13 20.2 50 16.4 22.4 200 vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009 figure 3. suggested ir pro le the device has been quali ed to meet the jedec standard for pb-free assembly. the temperatures and time intervals listed are based on the pb- free small body requirements. the temperatures refer to the topside of the package, measured on the package body surface. the FX-702 device is hermetically sealed so an aqueous wash is not an issue. figure 4. tape and reel
5 5 of 7 table 7. pin functions pad # symbol i/o level function 1 brclk i nc or lvpe- cl, lvds nc or for external divider application = pd feedback frequency 2ld 1 o cmos lock detect logic 0 = fx locked logic 1 - no input output transitioning = out of lock 3 gnd gnd supply case and electrical ground 4 mode 2 i cmos fx operating mode logic 0 = standard pll (normal setting) logic 1 = fin coupled to fout 5 gnd gnd supply case and electrical ground 6 lfn analog loop filter node 7 clfn analog complementary loop filter node 8 fout o lvpecl or lvds frequency output 9 cfout o lvpecl or lvds complementary frequency output 10 vcc i supply power supply voltage (+3.3v 5%) 11 cfin i lvpecl complemetary input frequency for cmos inouts, ac-couple unused inputto ground or negative supply 12 fin i cmos or lvpecl input frequency 13 gnd gnd supply case and electrical ground 14 cbrclk i nc or lvpe- cl, lvds nc or for external divider applications = comp. pd feedback frequency 1. it is recommended that a bu er driver is used for best noise isolation. 2. do not leave the mode pin oating, it should be set to logic 0 or ground for normal operation. 3. brclk and cbrclk should be left oating if not used. 4. fin, cfin, brclk, and cbrclk have internal pull-up/pull-down resistors and it is recommended to ac couple these inputs. vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009 figure 5. outline diagram fx702 yww ccc-cccc xx-xx
6 6 of 7 table 8. standard frequencies (mhz) 18.7500000 ee 39.0625000 hh 73.7280000 k8 173.437500 np 624.693800 pd 796.875000 tb 19.2000000 dd 39.3216000 hd 74.1250000 k1 176.838175 na 624.704800 p6 800.000000 tk 19.3926580 dx 39.8437500 hj 74.1758000 ka 182.016000 n8 625.000000 p3 805.664100 ta 19.4400000 d6 40.0000000 jf 74.2500000 k7 182.857142 nm 627.329600 p7 809.063500 te 19.5312500 dz 40.2830630 kk 75.0000000 kh 184.000000 ng 629.987800 pa 819.200000 th 19.6608000 db 40.9600000 j1 76.8000000 k4 184.320000 nh 637.500000 pg 821.777300 tf 19.6989680 dk 41.0888870 km 77.7600000 k2 187.500000 n5 640.000000 pn 850.000000 tj 19.7190000 dh 41.6571440 kp 78.0000000 lh 195.000000 n7 644.531250 p4 983.400000 tu 19.9218750 ed 41.6600000 lm 78.1250000 k3 200.000000 ne 645.120000 rj 1,000.0000 tm 20.0000000 e2 41.8329130 kt 78.6432000 k5 200.192000 n6 647.239400 pe 20.1416000 e3 42.0000000 jb 79.6875000 kg 201.416020 n1 647.250800 pk 20.4800000 e4 42.0101690 kv 80.0000000 k9 212.500000 nf 649.970300 pf 20.5444340 ef 42.5000000 jc 80.5664130 kj 219.429571 nl 657.421875 pb 20.7135000 e1 42.6600000 jz 82.1777380 kl 240.000000 nr 665.625600 pc 20.8285720 eg 44.2095440 kx 82.9440000 k6 243.000000 nc 666.514286 p5 20.8286000 eb 44.4343000 lf 83.3142880 kn 245.760000 n9 669.128100 r2 20.9165460 eh 44.6218000 jw 83.6658250 kr 250.000000 nt 669.326582 r3 21.0050840 ej 44.7360000 j3 84.0203380 ku 252.571428 nj 669.642900 r1 22.0000000 e9 44.9280000 je 86.6853740 lj 256.000000 nk 670.838600 r7 22.1047720 ek 45.1584000 jg 88.4190880 kw 262.144000 nb 672.000000 rt 22.2171000 e5 45.8240000 jm 95.7000000 lk 292.571429 nn 672.156250 tx 22.5792000 e8 46.0379460 lg 97.5000000 ke 300.000000 pt 672.162712 r5 24.0000000 ec 46.7200000 jk 100.000000 l8 307.200000 rx 673.456600 ra 24.5760000 e6 46.8750000 jy 105.000000 l6 311.040000 p1 684.255400 r9 24.7040000 e7 48.0000000 jv 106.250000 l9 312.500000 pu 687.700000 tv 25.0000000 f7 49.1520000 j7 108.000000 la 318.750000 pv 690.569196 r4 25.1658000 f8 49.4080000 j2 110.000000 l1 320.000000 pp 693.468750 rv 25.6000000 f6 50.0000000 jd 112.000000 l2 322.265650 pw 693.482991 r6 25.9200000 f2 50.0480000 kd 114.000000 l3 328.710950 px 693.750000 r8 26.0000000 f3 51.2000000 ll 120.000000 lc 333.257150 py 696.390625 rw 27.0000000 f4 51.8400000 j4 122.880000 lb 334.663300 rb 696.421478 v1 27.6480000 fb 52.0000000 jp 124.416000 l7 336.081350 rc 696.421875 ty 28.7040000 f1 53.3300000 ju 125.000000 l4 353.676350 rd 704.380600 tg 29.4912000 f5 54.7460000 jl 130.000000 ld 368.640000 ry 707.352700 tc 29.5000000 f9 55.0000000 jx 139.264000 l5 375.000000 rf 707.500000 v2 30.0000000 he 60.0000000 jr 150.000000 m8 382.800000 ru 710.948600 t2 30.7200000 h1 61.3800000 ky 150.144000 m6 400.000000 rr 712.520000 tw 30.8800000 hf 61.4400000 j5 153.600000 ma 409.600000 re 716.573200 t1 31.2500000 h8 62.2080000 j8 155.520000 m2 491.520000 pm 718.750000 t5 32.0000000 h2 62.5000000 j9 156.250000 m3 500.000000 rk 719.734400 t3 32.7680000 h3 62.9145000 le 159.375000 m7 505.000000 v3 737.280000 tl 33.0000000 h7 63.3600000 jj 160.000000 m1 531.000000 ph 739.200000 tt 33.3330000 hc 63.8976000 jn 161.132813 m4 531.250000 p8 742.500000 v4 34.3680000 h6 64.0000000 jt 164.355475 m9 568.928600 pj 748.070900 t6 34.5600000 hb 64.1520000 jh 166.628572 m5 569.196400 p9 750.000000 t7 36.8640000 hg 65.5360000 j6 167.331646 n2 588.000000 rh 768.000000 tn 37.0560000 h4 66.0000000 ja 168.040678 n3 595.056000 pl 777.600000 t4 37.1250000 h9 70.0000000 kb 170.000000 n4 600.000000 pr 779.568600 t8 37.5000000 hk 70.6560000 kc 172.500000 nu 614.400000 rg 780.881000 td 38.8800000 h5 71.6100000 kf 173.370748 nd 622.080000 p2 781.250000 t9 vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009
7 7 of 7 vectron international ? 267 lowell road, hudson, nh 03051 ? tel: 1-88-vectron-1 ? http://www.vectron.com rev: 03apr2009 ordering information disclaimer vectron international reserves the right to make changes to the product(s) and or information contained herein without notice. no liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. for additional information, please contact usa: vectron international 267 lowell road hudson, nh 03051 tel: 1.888.328.7661 fax: 1.888.329.8328 europe: vectron international landstrasse, d-74924 neckarbischofsheim, germany tel: +49 (0) 3328.4784.17 fax: +49 (0) 3328.4784.30 asia: vectron international 1f-2f, no 8 workshop, no 308 fenju road waigaoqiao free trade zone pudong, shanghai, china 200131 tel: 86.21.5048.0777 fax: 86.21.5048.1881 1, not all combinations are possible. please consult with your vectron representative for application assistance. other frequen cies available upon request 2, when ordering the FX-702 with the external divider option, the prescalar must be speci ed (i.e, 1 or 4). the xx place hol der should be used for the input frequency. fx- 702 - e c e - h j k a - xx - xx product family fx: frequency translator package 702: 5.0 x 7.5 x 2.0mm input e: 3.3 vdc 10% output c: lvpecl d: lvds operating temperature e: -40 to 85 c t: 0 to 70 c absolute pull range h: 32 ppm k: 50 ppm s: 100 ppm input frequency (see above) feedback divider l: disable m: factory set output 2 divider m: factory set prescaler a: 1 c: 4 m: factory set output frequency (see above)
|
