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february 2008 rev 4 1/29 29 features low voltage power supply down to 3 v 16 constant current output channels adjustable output current through external resistor short and open output error detection serial data in/parallel data out 3.3 v micro driver-able output current: 5-100 ma 30 mhz clock frequency available in high thermal efficiency tssop exposed pad esd protection 2.5 kv hbm, 200 v mm description the stp16dp05 is a monolithic, low voltage, low current power 16-bit shift register designed for led panel displays. the device contains a 16-bit serial-in, parallel-out shift register that feeds a 16-bitd-type storage register. in the output stage, sixteen regulated current sources were designed to provide 5-100 ma constant current to drive the leds. the stp16dp05 features open and short led detections on the outputs.the stp16dp05 is backward compatible with stp16c/l596.the detection circuit checks 3 different conditions that can occur on the output line: short to gnd, short to v o or open line. the data detection results are loaded in the shift register and shifted out via the serial line output. the detection functionality is implemented without increasing the pin count number, through a secondary function of the output enable and latch pin (dm1 and dm2 respectively), a dedicated logic sequence allows the device to enter or leave from detection mode. through an external resistor, users can adjust the stp16dp05 output current, controlling in this way the light intensity of leds, in addition, user can adjust led?s brightness intensity from 0 % to 100 % via oe/dm2 pin. the stp16dp05 guarantees a 20 v output driving capability, allowing users to connect more leds in series. the high clock frequency, 30 mhz, makes the device suitable for high data rate transmission. the 3.3 v voltage supply is well useful for applications that interface any 3.3v micro. compared with a standard tssop package, the tssop exposed pad increases heat dissipation capability by a 2.5 factor. so-24 tssop24 tssop24 (exposed pad) qsop-24 table 1. device summary order codes package packaging stp16dp05mtr so-24 (tape and reel) 1000 parts per reel stp16dp05ttr tssop24 (tape and reel) 2500 parts per reel stp16dp05xttr tssop24 exposed pad (tape and reel) 2500 parts per reel STP16DP05PTR qsop-24 2500 parts per reel stp16dp05 low voltage 16-bit constant current led sink driver with outputs error detection www.st.com
contents stp16dp05 2/29 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 detection mode functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.1 phase one: ?entering in detection mode? . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.2 phase two: ?error detection? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.3 phase three: ?resuming to normal mode? . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.4 error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
stp16dp05 summary description 3/29 1 summary description 1.1 pin connection and description figure 1. pin connection note: the exposed pad is electrically not connected table 2. typical current accuracy output voltage current accuracy output current v dd temperature between bits between ics 1.3 v 1.5 % 5 % 20 to 100 ma 3.3 v to 5 v 25 c table 3. pin description pin n symbol name and function 1 gnd ground terminal 2 sdi serial data input terminal 3 clk clock input terminal 4 le-dm1 latch input terminal - detect mode 1 (see operation principle) 5-20 out 0-15 output terminal 21 oe-dm2 input terminal of output enable (active low) - detect mode 1 (see operation principle) 22 sdo serial data out terminal 23 r-ext input terminal of an external resistor for constant current programing 24 v dd supply voltage terminal
electrical ratings stp16dp05 4/29 2 electrical ratings 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. 2.2 thermal data table 4. absolute maximum ratings symbol parameter value unit v dd supply voltage 0 to 7 v v o output voltage -0.5 to 20 v i o output current 100 ma v i input voltage -0.4 to v dd v i gnd gnd terminal current 1600 ma f clk clock frequency 50 mhz table 5. thermal data symbol parameter value unit t opr operating temperature range -40 to +125 c t stg storage temperature range -55 to +150 c r thjc thermal resistance junction-case so-24 60 c/w tssop24 85 c/w tssop24 (1) exposed pad 1. the exposed pad should be soldered directly to the pcb to realize the thermal benefits. 37.5 c/w qsop-24 72 c/w
stp16dp05 electrical ratings 5/29 2.3 recommended operating conditions table 6. recommended operating conditions symbol parameter test conditions min typ max unit v dd supply voltage 3.0 5.5 v v o output voltage 20 v i o output current outn 5 100 ma i oh output current serial-out +1 ma i ol output current serial-out -1 ma v ih input voltage 0.7v dd v dd +0.3 v v il input voltage -0.3 0.3v dd v t wlat le\dm1 pulse width v dd = 3.0 v to 5.0 v 20 ns t wclk clk pulse width 20 ns t wen oe\dm2 pulse width 200 ns t setup(d) setup time for data 20 ns t hold(d) hold time for data 15 ns t setup(l) setup time for latch 15 ns f clk clock frequency cascade operation (1) 1. if the device is connected in cascade, it may not be possible ac hieve the maximum data transfer. please consider the timings carefully. 30 mhz
electrical characteristics stp16dp05 6/29 3 electrical characteristics table 7. electrical characteristics (v dd = 3.3 v to 5 v, t = 25 c, unless otherwise specified.) symbol parameter test co nditions min typ max unit v ih input voltage high level 0.7v dd v dd v v il input voltage low level gnd 0.3v dd v i oh output leakage current v oh = 20 v 10 a v ol output voltage (serial-out) i ol = 1 ma 0.4 v v oh output voltage (serial-out) i oh = -1 ma v oh -v dd = -0.4 v v i ol1 output current v o = 0.3 v, r ext = 3.9 k ? 4.25 5 5.75 ma i ol2 v o = 0.3 v, r ext = 970 ? 19 20 21 i ol3 v o = 1.3 v, r ext = 190 ? 96 100 104 ? i ol1 output current error between bit (all output on) v o = 0.3 vr ext = 3.9 k ? 5 8 % ? i ol2 v o = 0.3 vr ext = 970 ? 1.5 3 ? i ol3 v o = 1.3 vr ext =190 ? 1.2 3 r sin(up) pull-up resistor 150 300 600 k ? r sin(down) pull-down resistor 100 200 400 k ? i dd(off1) supply current (off) r ext = 970 out 0 to 15 = off 45 ma i dd(off2) r ext = 240 out 0 to 15 = off 11.2 13.5 i dd(on1) supply current (on) r ext = 970 out 0 to 15 = on 4.5 5 i dd(on2) r ext = 240 out 0 to 15 = on 11.7 13.5 thermal thermal protection (1) 170 c 1. guaranteed by desing (not tested) the thermal protection switches off only the outputs current
stp16dp05 electrical characteristics 7/29 table 8. switching characteristics (v dd = 5 v, t = 25 c, unless otherwise specified.) symbol parameter test co nditions min typ max unit t plh1 propagation delay time, clk-outn , le\dm1 = h, oe\dm2 = l v dd = 3.3 v v ih = v dd v il = gnd c l = 10 pf i o = 20 ma v l = 3.0 v r ext = 1 k ? r l = 60 ? v dd = 3.3 v 70 105 ns v dd = 5 v 45 65 t plh2 propagation delay time, le\dm1 -outn , oe\dm2 = l v dd = 3.3 v 61 90 ns v dd = 5 v 41 60 t plh3 propagation delay time, oe\dm2 -outn , le\dm1 = h v dd = 3.3 v 69 105 ns v dd = 5 v 50 70 t plh propagation delay time, clk-sdo v dd = 3.3 v 14 20 ns v dd = 5 v 8 12 t phl1 propagation delay time, clk-outn , le\dm1 = h, oe\dm2 = l v dd = 3.3 v 34 50 ns v dd = 5 v 23 35 t phl2 propagation delay time, le\dm1 -outn , oe\dm2 = l v dd = 3.3 v 27 40 ns v dd = 5 v 22 32 t phl3 propagation delay time, oe\dm2 -outn , le\dm1 = h v dd = 3.3 v 23 35 ns v dd = 5 v 20 30 t phl propagation delay time, clk-sdo v dd = 3.3 v 15 25 ns v dd = 5 v 9 15 t on output rise time 10~90% of voltage waveform v dd = 3.3 v 42 65 ns v dd = 5 v 35 55 t off output fall time 90~10% of voltage waveform v dd = 3.3 v 10 16 ns v dd = 5 v 9 14 t r clk rise time (1) 5000 ns t f clk fall time (1) 5000 ns 1. in order to achieve high cascade data transfe r, please consider tr /tf timings carefully.
equivalent circuit and outputs stp16dp05 8/29 4 equivalent circuit and outputs figure 2. oe\dm2 terminal figure 3. le\dm1 terminal figure 4. clk, sdi terminal
stp16dp05 equivalent circuit and outputs 9/29 figure 5. sdo terminal figure 6. block diagram
timing diagrams stp16dp05 10/29 5 timing diagrams note: outn = on when dn = h outn = off when dn = l figure 7. timing diagram note: the latches circuit holds data when the le\dm1 terminal is low. 1 when le\dm1 terminal is at high level, latch circuit hold the data it passes from the input to the output. 2 when oe\dm2 terminal is at low level, output terminals out0 to out15 respond to the data, either on or off. 3 when oe\dm2 terminal is at high level, it switches off all the data on the output terminal. table 9. truth table clock le\dm1 oe\dm2 serial-in out0 ............. ou t7 ................ out15 sdo h l dn dn ..... dn - 7 ..... dn -15 dn - 15 l l dn + 1 no change dn - 14 h l dn + 2 dn + 2 ..... dn - 5 ..... dn -13 dn - 13 x l dn + 3 dn + 2 ..... dn - 5 ..... dn -13 dn - 13 x h dn + 3 off dn - 13 oe\dm2 le\dm1
stp16dp05 timing diagrams 11/29 figure 8. clock, serial-in, serial-out figure 9. clock, serial-in, latch, enable, outputs le\dm1 oe\dm2
timing diagrams stp16dp05 12/29 figure 10. outputs
stp16dp05 typical characteristics 13/29 6 typical characteristics figure 11. output current-r ext resistor table 10. output current-r ext resistor rext ( ? ) output current (ma) 976 20 780 25 652 30 560 35 488 40 433 45 389 50 354 55 325 60 300 65 278 70 259 75 241 80 229 85 215 90
typical characteristics stp16dp05 14/29 conditions: temperature = 25 c, v dd = 3.3 v; 5.0 v, i set = 3 ma; 5 ma; 10 ma; 20 ma; 50 ma; 80 ma. figure 12. i set vs drop out voltage (v drop ) table 11. i set vs drop out voltage (v drop ) iout (ma) avg @ 3.0 v avg @ 5.0 v 3 19.33 22.66 5 36.67 40.33 10 77.33 80 20 158.67 157.33 50 406 406 80 692 668 0 100 200 300 400 500 600 700 800 0 20406080 iset ma ) vdrop (mv) avg @ 3.0v avg @ 5.0v
stp16dp05 typical characteristics 15/29 figure 14. power dissipation vs temperature package note: the exposed pad should be soldered to the pbc to realize the thermal benefits. figure 13. i dd on\off 0 2 4 6 8 10 12 14 0 102030405060708090 iset (ma ) idd (ma) iddon avg @ 5.5v iddon avg @ 3.6v iddoff avg @ 5.5v iddoff avg @ 3.6v
detection mode functionality stp16dp05 16/29 7 detection mode functionality 7.1 phase one: ?enterin g in detection mode? from the ?normal mode? condition the device can switch to the ?error mode? by a logic sequence on the oe\dm2 and le/dm1 pins as showed in the following table and diagram: after these five clk cycles the device goes into the ?error detection mode? and at the 6 th rise front of clk the sdi data are ready for the sampling. table 12. entering in detection truth table clk12345 oe/dm2 hlhhh le/dm1 lllhl figure 15. entering in detection timing diagram
stp16dp05 detection mode functionality 17/29 7.2 phase two: ?error detection? the 16 data bits must be set ?1? in order to set on all the outputs during the detection. the data are latched by le/dm1 and after that the outputs are ready for the detection process. when the micro controller switches the oe\dm2 to low, the device drives the leds in order to analyze if an open or short condition has occurred. the leds status will be detected at least in 1 microsecond and after this time the microcontroller sets oe\dm2 in high state and the output data dete ction result will go to the microprocessor via sdo. detection mode and normal mode use both the same format data. as soon as all the detection data bits are available on the serial line, the device may go back to normal mode of operation. to re-detect the status the device must go back in normal mode and re- entering in error detection mode . figure 16. detection diagram
detection mode functionality stp16dp05 18/29 figure 17. timing example for open and/or short detection
stp16dp05 detection mode functionality 19/29 7.3 phase three: ?resuming to normal mode? the sequence for re-entering in normal mode is showed in the following table and diagram: note: for proper device operation the "entering in detection" sequence must be follow by a "resume mode" sequence, it is not possible to insert consecutive equal sequence. 7.4 error detection conditions note: where: i o = the output current programmed by the r ext , i odec = the detected output current in detection mode figure 19. detection circuit figure 18. resuming to normal mode timing diagram clk12345 oe/dm2 hlhhh le/dm1 lllll table 13. detection conditions (v dd = 3.3 to 5 v temperature range -40 to 125 c) sw-1 or sw-3b open line or output short to gnd detected ==> i odec 0.5 x i o no error detected ==> i odec 0.5 x i o sw-2 or sw-3a short on led or short to v-led detected ==> v o 2.4 v no error detected ==> v o 2.2 v 16 stp16dp05
detection mode functionality stp16dp05 20/29 figure 20. error detection sequence le and oe key sequence necessary to enter in edm 16 clk pulse are required to load the data setting 1 into shift register the le pulse latch the data loaded during the previous state during the error detection are necessary at least 2 clk signal plus oneat the end every clk pulse shows the results of single output results:out15;14; 13 etc. etc after oe signal turn high the sdo pin show the results of error detection (open or short in this case) the oe pulse put the device from edm to normal mode le and oe key sequence necessary to enter in edm 16 clk pulse are required to load the data setting 1 into shift register the le pulse latch the data loaded during the previous state during the error detection are necessary at least 2 clk signal plus oneat the end every clk pulse shows the results of single output results:out15;14; 13 etc. etc after oe signal turn high the sdo pin show the results of error detection (open or short in this case) the oe pulse put the device from edm to normal mode
stp16dp05 package mechanical data 21/29 8 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com table 14. qsop-24 mechanical data dim. mm. inch min typ max min typ max a 1.54 1.62 1.73 0.061 0.064 0.068 a1 0.1 0.15 0.25 0.004 0.006 0.010 a2 1.47 0.058 b 0.31 0.2 0.012 0.008 c 0.254 0.17 0.010 0.007 d 8.56 8.66 8.76 0.337 0.341 0.345 e 5.8 6 6.2 0.228 0.236 0.244 e1 3.8 3.91 4.01 0.150 0.154 0.158 e 0.635 0.025 l 0.4 0.635 0.89 0.016 0.025 0.035 h 0.25 0.33 0.41 0.010 0.013 0.016 < 8 0
package mechanical data stp16dp05 22/29 figure 21. qsop-24 package dimensions
stp16dp05 package mechanical data 23/29 table 15. tssop24 mechanical data dim. mm. inch min typ max min typ max a 1.1 0.043 a1 0.05 0.15 0.002 0.006 a2 0.9 0.035 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 d 7.7 7.9 0.303 0.311 e 4.3 4.5 0.169 0.177 e 0.65 bsc 0.0256 bsc h 6.25 6.5 0.246 0.256 k 0 8 0 8 l 0.50 0.70 0.020 0.028 figure 22. tssop24 package dimensions
package mechanical data stp16dp05 24/29 table 16. tape and reel tssop24 dim. mm. inch min typ max min typ max a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.8 7 0.268 0.276 bo 8.2 8.4 0.323 0.331 ko 1.7 1.9 0.067 0.075 po 3.9 4.1 0.153 0.161 p 11.9 12.1 0.468 0.476 figure 23. reel dimensions
stp16dp05 package mechanical data 25/29 table 17. so-24 mechanical data dim. mm. inch min typ max min typ max a 2.65 0.104 a1 0.1 0.2 0.004 0.008 a2 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012 c 0.5 0.020 c1 45(typ.) d 15.20 15.60 0.598 0.614 e 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 13.97 0.550 f 7.40 7.60 0.291 0.300 l 0.50 1.27 0.020 0.050 s (max.) 8 figure 24. so-24 package dimensions
package mechanical data stp16dp05 26/29 table 18. tape and reel so-24 dim. mm. inch min typ max min typ max a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 30.4 1.197 ao 10.8 11.0 0.425 0.433 bo 15.7 15.9 0.618 0.626 ko 2.9 3.1 0.114 0.122 po 3.9 4.1 0.153 0.161 p 11.9 12.1 0.468 0.476 figure 25. reel dimensions
stp16dp05 package mechanical data 27/29 table 19. tssop24 exposed pad dim. mm inch min typ max min typ max a 1.2 0.047 a1 0.15 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 7.7 7.8 7.9 0.303 0.307 0.311 d1 4.7 5.0 5.3 0.185 0.197 0.209 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.5 0.169 0.173 0.177 e2 2.9 3.2 3.5 0.114 0.126 0.138 e 0.65 0.0256 k 0 8 0 8 l 0.45 0.60 0.75 0.018 0.024 0.030 figure 26. tssop24 dimensions
revision history stp16dp05 28/29 9 revision history table 20. document revision history date revision changes 9-jan-2007 1 first release 21-may-2007 2 updated table 7 on page 6 10-jul-2007 3 updated table 9: truth table on page 10 28-feb-2008 4 updated table 15: tssop24 exposed-pad on page 23 added qsop-24 package information ta bl e 1 4 and figure 21 on page 22
stp16dp05 29/29 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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