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? 1 ? e01656-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ICX412AQ 20 pin dip (plastic) 2 8 v h pin 1 pin 11 48 4 diagonal 8.933mm (type 1/1.8) frame readout ccd image sensor with a square pixel for color cameras description the ICX412AQ is a diagonal 8.933mm (type 1/1.8) interline ccd solid-state image sensor with a square pixel array and 3.24m effective pixels. sensitivity, saturation signal, smear and frame rate have been improved compared to the icx252aq. this chip features an electronic shutter with variable charge-storage time. r, g, b primary color mosaic filters are used as the color filters, and at the same time high sensitivity and low dark current are achieved through the adoption of super had ccd technology. this chip is suitable for applications such as electronic still cameras, etc. features ? supports frame readout high horizontal and vertical resolution supports high frame rate readout mode: 30 frames/s, af1 mode: 60 frames/s, 50 frames/s, af2 mode: 120 frames/s, 100 frames/s square pixel horizontal drive frequency: 22.5mhz no voltage adjustments (reset gate and substrate bias are not adjusted.) r, g, b primary color mosaic filters on chip high sensitivity, low dark current continuous variable-speed shutter excellent anti-blooming characteristics exit pupil distance recommended range ?20 to ?100mm 20-pin high-precision plastic package device structure interline ccd image sensor total number of pixels: 2140 (h) 1560 (v) approx. 3.34m pixels number of effective pixels: 2088 (h) 1550 (v) approx. 3.24m pixels number of active pixels: 2080 (h) 1542 (v) approx. 3.21m pixels diagonal 8.933mm number of recommended recording pixels: 2048 (h) 1536 (v) approx. 3.15m pixels diagonal 8.832mm aspect ratio 4:3 chip size: 8.10mm (h) 6.64mm (v) unit cell size: 3.45m (h) 3.45m (v) optical black: horizontal (h) direction: front 4 pixels, rear 48 pixels vertical (v) direction: front 8 pixels, rear 2 pixels number of dummy bits: horizontal 28 vertical 1 (even fields only) substrate material: silicon optical black position (top view) ? super had ccd is a trademark of sony corporation. the super had ccd is a v ersion of son y's high performance ccd had (hole- accumulation diode) sensor with sharply improved sensitivity by the incorporation of a new semiconductor technology developed by sony corporation.
? 2 ? ICX412AQ 11 12 13 14 15 16 17 18 19 20 note) note) : photo sensor horizontal register vertical register v dd rg h 2 h 1 gnd sub c sub v l h 1 h 2 10 9 8 7 6 5 4 3 2 1 v out gnd test test v 1b v 1a v 2 v 3b v 3a v 4 b gr b gr b gb r gb r gb b gr b gr b gb r gb r gb gr r gr r block diagram and pin configuration (top view) pin description pin no. description pin no. symbol description 1 2 3 4 5 6 7 8 9 10 v 4 v 3a v 3b v 2 v 1a v 1b test test gnd v out vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock test pin ? 1 test pin ? 1 gnd signal output 11 12 13 14 15 16 17 18 19 20 v dd rg h 2 h 1 gnd sub c sub v l h 1 h 2 ? 1 leave this pin open ? 2 dc bias is generated within the ccd, so that this pin should be grounded externally through a capacitance of 0.1f. supply voltage reset gate clock horizontal register transfer clock horizontal register transfer clock gnd substrate clock substrate bias ? 2 protective transistor bias horizontal register transfer clock horizontal register transfer clock symbol
? 3 ? ICX412AQ absolute maximum ratings item v dd , v out , rg ? sub v 1a , v 1b , v 3a , v 3b ? sub v 2 , v 4 , v l ? sub h 1 , h 2 , gnd ? sub c sub ? sub v dd , v out , rg, c sub ? gnd v 1a , v 1b , v 2 , v 3a , v 3b , v 4 ? gnd h 1 , h 2 ? gnd v 1a , v 1b , v 3a , v 3b ? v l v 2 , v 4 , h 1 , h 2 , gnd ? v l voltage difference between vertical clock input pins h 1 ? h 2 h 1 , h 2 ? v 4 against sub against gnd against v l between input clock pins storage temperature guaranteed temperature of performance operating temperature ?40 to +12 ?50 to +15 ?50 to +0.3 ?40 to +0.3 ?25 to ?0.3 to +22 ?10 to +18 ?10 to +6.5 ?0.3 to +28 ?0.3 to +15 to +15 ?6.5 to +6.5 ?10 to +16 ?30 to +80 ?10 to +60 ?10 to +75 v v v v v v v v v v v v v c c c ? 1 ratings unit remarks ? 1 +24v (max.) when clock width < 10s, clock duty factor < 0.1%. +16v (max.) is guaranteed for turning on or off power supply.
? 4 ? ICX412AQ bias conditions supply voltage protective transistor bias substrate clock reset gate clock item v dd v l sub rg symbol 15.0 ? 1 ? 2 ? 2 min. v unit remarks typ. max. ? 1 v l setting is the v vl voltage of the vertical clock waveform, or the same voltage as the v l power supply for the v driver should be used. ? 2 do not apply a dc bias to the substrate clock and reset gate clock pins, because a dc bias is generated within the ccd. dc characteristics 14.55 15.45 supply current item i dd symbol 7.5 min. unit remarks typ. max. ma 9.5 5.5 clock voltage conditions readout clock voltage vertical transfer clock voltage horizontal transfer clock voltage reset gate clock voltage substrate clock voltage item v vt v vh1 , v vh2 v vh3 , v vh4 v vl1 , v vl2 , v vl3 , v vl4 v v v vh3 ? v vh v vh4 ? v vh v vhh v vhl v vlh v vll v h v hl v cr v rg v rglh ? v rgll v rgl ? v rglm v sub symbol 14.55 ?0.05 ?0.2 ?8.0 6.8 ?0.25 ?0.25 4.0 ?0.05 0.8 3.0 21.5 min. 15.0 0 0 ?7.5 7.5 5.0 0 2.5 3.3 22.5 ty p . 15.45 0.05 0.05 ?7.0 8.05 0.1 0.1 0.8 0.9 0.9 0.8 5.25 0.05 5.25 0.4 0.5 23.5 max. unit 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 waveform diagram v vh = (v vh1 + v vh2 )/2 v vl = (v vl3 + v vl4 )/2 v v = v vh n ? v vl n (n = 1 to 4) high-level coupling high-level coupling low-level coupling low-level coupling cross-point voltage low-level coupling low-level coupling remarks v v v v v v v v v v v v v v v v v v
? 5 ? ICX412AQ clock equivalent circuit constants vertical transfer clock equivalent circuit horizontal transfer clock equivalent circuit h 1 h 2 c h1 c h2 c hh r h r h h 1 h 2 r h r h r gnd c v1b3b r 1b c v41b v 1b c v4 c v41a c v1b c v1b3a c v1a1b c v1a c v1b2 r 1a v 1a c v1a2 v 2 r 2 c v24 c v1a3a c v23a c v23b r 3a v 3a c v2 c v3a c v3a3b c v1a3b c v3b r 3b v 3b c v3a4 c v3b4 v 4 r 4 c v1a , c v3a c v1b , c v3b c v2 , c v4 c v1a2 , c v3a4 c v1b2 , c v3b4 c v23a , c v41a c v23b , c v41b c v1a3a c v1b3b c v1a3b , c v1b3a c v24 c v1a1b , c v3a3b c h1 , c h2 c hh c rg c sub r 1a , r 1b , r 2 , r 3a , r 3b , r 4 r gnd r h symbol capacitance between vertical transfer clock and gnd capacitance between vertical transfer clocks capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor item min. typ. max. pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf ? ? ? unit remarks 1500 5600 2700 390 470 120 180 39 220 62 75 68 36.5 88.5 8 1000 62 18 15
? 6 ? ICX412AQ drive clock waveform conditions (1) readout clock waveform v vh = (v vh1 + v vh2 )/2 v vl = (v vl3 + v vl4 )/2 v v = v vh n ? v vl n (n = 1 to 4) (2) vertical transfer clock waveform 100% 90% 10% 0% tr tf 0v twh m 2 m v vt v vh1 v vhh v vhl v vh v vlh v vl1 v vll v vhl v vhh v vl v vh2 v vhh v vhh v vhl v vhl v vh v vlh v vl2 v vll v vl v vhh v vh v vlh v vll v vl v vhl v vl3 v vhl v vh3 v vhh v vh v vl v vhl v vlh v vll v vhl v vh4 v vhh v vhh v vl4 v 1a , v 1b v 3a , v 3b v 2 v 4
? 7 ? ICX412AQ v hl v cr twl two twh v h v h 2 tr h 2 90% 10% h 1 tf rg waveform v rglh v rgh v rgl v rgll v rglm tr twh twl tf v rg point a v sub (a bias generated within the ccd) 100% 90% 10% 0% tr tf twh m 2 m v sub (3) horizontal transfer clock waveform cross-point voltage for the h 1 rising side of the horizontal transfer clocks h 1 and h 2 waveforms is v cr . the overlap period for twh and twl of horizontal transfer clocks h 1 and h 2 is two. (4) reset gate clock waveform v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval with twh, then: v rg = v rgh ? v rgl negative overshoot level during the falling edge of rg is v rglm . (5) substrate clock waveform
? 8 ? ICX412AQ spectral sensitivity characteristics (excludes lens characteristics and light source characteristics) clock switching characteristics (horizontal drive frequency: 22.5mhz) 0 400 450 500 550 600 650 700 0.1 0.2 0.3 0.4 0.5 0.6 0.7 b g r 0.8 0.9 1.0 relative response wave length [nm] min. twh typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf 2.63 12 12 6 2.5 2.83 16 16 8 3.02 12 12 16 16 31 0.5 6.5 6.5 3 10.5 10.5 0.5 15 0.5 6.5 6.5 3 350 10.5 10.5 0.5 unit s ns ns ns s remarks during readout when using cxd3400n tf tr ? 2ns during drain charge item readout clock vertical transfer clock horizontal transfer clock reset gate clock substrate clock symbol v t v 1a , v 1b , v 2 , v 3a , v 3b , v 4 h 1 h 2 rg sub min. two typ. max. 10 16 unit ns remarks item horizontal transfer clock symbol h 1 , h 2
? 9 ? ICX412AQ image sensor characteristics (horizontal drive frequency: 22.5mhz) (ta = 25 c) ? 1 after closing the mechanical shutter, the smear can be reduced to below the detection limit by performing vertical register sweep operation. ? 2 excludes vertical dark signal shading caused by vertical register high-speed transfer. 4 v 10 4 4 4 ignored region effective pixel region zone 0, i zone ii , ii ' v 10 h 8 h 8 2088 (h) 1550 (v) zone definition of video signal shading measurement system ccd c.d.s s/h s/h amp ccd signal output [ ? a] gr/gb channel signal output [ ? b] r/b channel signal output [ ? c] note) adjust the amplifier gain so that the gain between [ ? a] and [ ? b], and between [ ? a] and [ ? c] equals 1. item g sensitivity sensitivity comparison saturation signal smear video signal shading dark signal dark signal shading line crawl g line crawl r line crawl b lag symbol sg rr rb vsat sm shg vdt ? vdt lcg lcr lcb lag min. 364 0.4 0.35 500 ty p. 455 ? 92 ? 82.5 max. 546 0.7 0.65 ? 84 ? 74.5 20 25 10 5 3.8 3.8 3.8 0.5 unit mv mv db % mv mv % % % % measurement method 1 1 1 2 3 4 5 6 7 7 7 8 remarks 1/30s accumulation ta = 60 c frame readout mode ? 1 high frame rate readout mode zone 0 and i zone 0 to ii ' ta = 60 c, 5.0 frame/s ta = 60 c, 5.0 frame/s, ? 2 r b
? 10 ? ICX412AQ image sensor characteristics measurement method measurement conditions (1) in the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the frame readout mode is used. in addition, v sub cont. is turned off. (2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (ob) is used as the reference for the signal output, which is taken as the value of the gr/gb channel signal output or the r/b channel signal output of the measurement system. color coding of this image sensor & readout the primary color filters of this image sensor are arranged in the layout shown in the figure on the left (bayer arrangement). gr and gb denote the g signals on the same line as the r signal and the b signal, respectively. for frame readout, the a1 and a2 lines are output as signals in the a field, and the b1 and b2 lines in the b field. gb b gb b rgrrgr gb b gb b rgrrgr b2 b1 a2 a1 horizontal register color coding diagram
? 11 ? ICX412AQ 2. frame readout mode, high frame rate readout mode readout modes 1. readout modes list the following readout modes are possible by driving the image sensor at the timing specifications noted in this data sheet. 1. frame readout mode in this mode, all pixel signals are divided into two fields and output. all pixel signals are read out independently, making this mode suitable for high resolution image capturing. 2. high frame rate readout mode output is performed at 30 frames per second by reading out 4 pixels for every 12 vertical pixels and adding 2 pixels in the horizontal ccd. the number of output lines is 258 lines. this readout mode emphasizes processing speed over vertical resolution. mode name frame rate number of effective output lines frame readout mode high frame rate readout mode af1 mode af2 mode ntsc mode pal mode ntsc mode pal mode ntsc mode pal mode ntsc mode pal mode 5.0 frame/s 5.0 frame/s 30 frame/s 25 frame/s 60 frame/s 50 frame/s 120 frame/s 100 frame/s 1550 (odd 775, even 775) 1550 (odd 775, even 775) 258 258 117 145 33 47 frame readout mode high frame rate readout mode 1st field 2nd field 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r r gb gb r r gb gr b gr b gb b gr gr b b gr gr b rgr 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r gb r gb r gb r r gb gr b gr b gr b gr b gr b gr gr b 13 12 11 10 9 8 7 6 5 4 3 1 2 v out r gb r gb r gb r gb r gb r r gb gr b gr b gr b gr b gr b gr gr b note) blacked out portions in the diagram indicate pixels which are not read out.
? 12 ? ICX412AQ 3. af1 mode, af2 mode the af modes increase the frame rate by cutting out a portion of the picture through high-speed elimination of the top and bottom of the picture in high frame rate readout mode. af1 allows 1/60s and 1/50s output, and af2 allows 1/120s and 1/100s output, so these modes are effective for raising the auto focus (af) speed. in addition, it differs from the icx252aq, the output line position and number of output lines are fixed. see the timing specifications for the cut-out region. number of effective lines in high frame rate readout mode 258 top frame shift region cut-out region bottom high-speed sweep region
? 13 ? ICX412AQ definition of standard imaging conditions (1) standard imaging condition i : use a pattern box (luminance: 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f5.6. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) standard imaging condition ii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. (3) standard imaging condition iii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens (exit pupil distance ? 33mm) with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diagram. 1. g sensitivity, sensitivity comparison set to the standard imaging condition i . after setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (v gr , v gb , v r and v b ) at the center of each gr, gb, r and b channel screen, and substitute the values into the following formulas. v g = (v gr + v gb )/2 sg = v g [mv] rr = v r /v g rb = v b /v g 2. saturation signal set to the standard imaging condition ii . after adjusting the luminous intensity to 20 times the intensity with the average value of the gr signal output, 150mv, measure the minimum values of the gr, gb, r and b signal outputs. 3. smear set to the standard imaging condition iii . with the lens diaphragm at f5.6 to f8, first adjust the average value of the gr signal output to 150mv. measure the average values of the gr signal output, gb signal output, r signal output and b signal output (gra, gba, ra, ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the gr signal output, 150mv. after the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value (vsm [mv]) independent of the gr, gb, r and b signal outputs, and substitute the values into the following formula. sm = 20 log ( vsm ? ) [db] (1/10v method conversion value) 1 10 1 500 gra + gba + ra + ba 4 100 30
? 14 ? ICX412AQ 4. video signal shading set to the standard imaging condition iii . with the lens diaphragm at f5.6 to f8, adjusting the luminous intensity so that the average value of the gr signal output is 150mv. then measure the maximum value (grmax [mv]) and minimum value (grmin [mv]) of the gr signal output and substitute the values into the following formula. shg = (grmax ? grmin)/150 100 [%] 5. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature of 60 c and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. dark signal shading after measuring 5, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. ? vdt = vdmax ? vdmin [mv] 7. line crawl set to the standard imaging condition ii . adjusting the luminous intensity so that the average value of the gr signal output is 150mv, and then insert r, g and b filters and measure the difference between g signal lines ( ? glr, ? glg, ? glb [mv]) as well as the average value of the g signal output (gar, gag, gab). substitute the values into the following formula. lci = 100 [%] (i = r, g, b) 8. lag adjust the gr signal output value generated by the strobe light to 150mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal amount (vlag). substitute the value into the following formula. lag = (vlag/150) 100 [%] light vd v1a/v1b strobe light timing output vlag (lag) gr signal output 150mv ? gli gai
? 15 ? ICX412AQ drive circuit notes) substrate bias control 1. the saturation signal level decreases when exposure is performed using the mechanical shutter, so control the substrate bias. 2. a saturation signal level equivalent to that for continuous exposure can be assured by connecting a 10k ? grounding registor to the ccd c sub pin. drive timing precautions 1. blooming occurs in modes (high frame rate readout, etc.) that do not use the mechanical shutter, so do not ground the connected 10k ? resistor. 2. tf is slow, so the internally generated voltage v sub may not drop to a sufficiently low level if the substrate bias control signal is not set to high level 20ms before entering the exposure period and the 10k ? resistor connected to the c sub pin is not grounded. 3. the blooming signal generated during exposure in mechanical shutter mode is swept by providing two fields or more of idle transfer through vertical register high-speed sweep transfer from the time the mechanical shutter closes until sensor readout is performed. however, note that the v l potential and the sub pin dc voltage sag at this time. substrate bias control signal v sub cont. mechanical shutter mode substrate bias sub pin voltage gnd tr 2ms tf 10ms internally generated value v sub xsub xv3 xsg3b xsg3a xv1 xsg1b xsg1a xv4 xv2 v sub cont. h 2 h 1 rg 0.1 0.1 0.1 0.1 1m 0.1 0.01 3.3/20v 0.1 4.7k 100k ccd out vr1 (10k) 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 cxd3400n 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 icx412 (bottom view) 3.3/16v 1/35v 3.3v ?7.5v 15v h 2 rg gnd v dd h 2 h 1 v l c sub sub h 1 test gnd v out v 4 v 3a v 3b v 2 v 1a test v 1b 2sc4250
? 16 ? ICX412AQ drive timing chart (vertical sequence) high frame rate readout mode frame readout mode/electronic shutter normal operation note) the b and c output signals contain a blooming component and should therefore not be used. apply 20 or more electronic shutter pulses at the start of exposure for the recording image. if less than 20 pulses are applied, the electronic shutter may occur a discharge error. vd act. ccd out v1a sub trg mechanical shutter v sub cont. open open close v1b v3a v4 v2 v3b a b c e f d a signal output b signal output c signal output d signal output (odd) d signal output (even) output after frame readout e signal output f signal output high frame rate readout mode high frame rate readout mode exposure operation frame readout mode
? 17 ? ICX412AQ drive timing chart (vertical sync) ntsc/pal frame readout mode ntsc: 5.0 frame/s, pal: 5.0 frame/s note) 2544h, however, 886h and 1772h in ntsc mode are 810clk, 885h and 1770h in pal mode are 1104clk. exposure period all pixels output period ccd out mechanical shutter v sub cont. open open close hd vd v4 v3a/b v1a/b v2 sub trg pa l 1 1 9 9 10 10 94 94 97 97 98 98 102 102 876 876 886 885 887 886 895 894 896 895 980 979 982 981 984 983 988 987 1762 1761 1772 1770 1 1 "a" "b" "c" "c" ntsc 1 3 5 7 1 3 5 7 9 11 1547 1549 2 4 6 8 2 4 6 8 10 12 1548 1550
? 18 ? ICX412AQ drive timing chart (readout) ntsc/pal frame readout mode "a" enlarged ntsc: #97 pal : #97 ntsc: #98 pal : #98 ntsc: #982 pal : #981 ntsc: #983 pal : #982 2544 1 52 1272 1310 1196 1310 1348 1272 1158 1234 1348 1366 428 2544 1 52 428 2544 1 52 428 2544 1 52 428 h1 v1a/b v2 v3a/b v4 h1 v1a/b v2 v3a/b v4 "b" enlarged
? 19 ? ICX412AQ drive timing chart (high-speed sweep operation) ntsc/pal frame readout mode "c" enlarged 1 38 239136clk = 94 line 52 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 52 38 38 38 38 #1 #2 #3 #4 #1560 hd v1a/b v2 v3a/b v4 note) in the period of high-speed sweep operation, the rising of input clock xv1a/b, xv2, xv3a/b and xv4 to vertical transfer clock d river cxd3400n should be delayed by 1 clock against the above timing chart.
? 20 ? ICX412AQ drive timing chart (horizontal sync) ntsc/pal frame readout mode clk rg shp shd v1a/b v2 v3a/b v4 h1 h2 sub 1 308 1 148 1 1 1 1 1 48 5 2544 52 376 428 28 456 1 465 110 186 114 1 1 1 152 76 114 38 1 1 1 1 1 114 190 190 68 72 ignored pixel 4 bits ignored pixel 4 bits 4 bits before horizontal sync 48 bits after horizontal sync 11 1
? 21 ? ICX412AQ drive timing chart (vertical sync) ntsc/pal high frame rate readout mode ntsc: 30 frame/s, pal: 25 frame/s note) 2624fh, however, 286h and 287h in ntsc mode are 1455clk, 343h in pal mode is 2592clk. ntsc pal 255 260 287 1 9 10 15 255 260 287 1 9 10 15 255 260 343 1 9 10 15 255 260 343 1 9 10 15 vd hd v1a v1b v2 v3a v3b v4 ccd out 1549 1544 1537 1532 1525 13 8 1 4 32 25 20 15 10 3 6 34 27 22 1546 1539 1534 1527 1549 1544 1537 1532 1525 13 8 1 4 32 25 20 15 10 3 6 34 27 22 1546 1539 1534 1527 "d" "d"
? 22 ? ICX412AQ drive timing chart (readout) ntsc/pal high frame rate readout mode "d" enlarged ntsc pal h1 v1a v1b v2 v3a v3b v4 1455 1 52 428 1196 1348 1462 1538 1592 1640 1158 1386 1272 1576 1656 1310 1424 1624 1672 1234 1608 1688 2592 ntsc pal 2624 1 52 428 2624 #2 #1 1348 1500
? 23 ? ICX412AQ drive timing chart (horizontal sync) ntsc/pal high frame rate readout mode, af1 mode, af2 mode clk rg shp shd v1a/b v2 v3a/b v4 h1 h2 sub 1 388 1 1 48 5 2624 52 456 124 140 156 172 188 204 220 236 252 268 284 300 316 332 348 364 380 396 412 428 444 460 476 492 508 28 536 1 545 68 ignored pixel 4 bits ignored pixel 4 bits 4 bits before horizontal sync 48 bits after horizontal sync 11 1
? 24 ? ICX412AQ drive timing chart (vertical sync) ntsc/pal af1 mode ntsc: 60 frame/s, pal: 50 frame/s note) 2624fh, however, 143h and 144h in ntsc mode are 1383clk, 172h in pal mode is 1296clk. high-speed sweep period 11h frame shift period 10h "d" "d" "e" "f" "e" "f" hd vd ccd out v1a v2 v3a v4 v1b v3b ntsc pal pa l 131 159 142 170 144 172 1 1 9 9 12 12 15 15 131 159 1 1 144 172 142 170 9 9 12 12 15 15 ntsc 1112 1117 1114 1119 1280 1285 1282 1287 46 421 423 428 430 433 435 440 442 421 423 428 430 433 435 440 442 46 1112 1117 1114 1119 1280 1285 1282 1287 46 421 423 421 423 46 af1 mode output signal
? 25 ? ICX412AQ drive timing chart (vertical sync) ntsc/pal af2 mode ntsc: 120 frame/s, pal: 100 frame/s note) 2624fh, however, 72h in ntsc mode is 1384clk, and 86h in pal mode is 1960clk. the frame rate in ntsc mode is longer than 1/120s by 0.15clk. " d " " d " " h " "g" "h" "g" hd vd ccd out v1a v2 v3a v4 v1b v3b ntsc pal pa l 84 68 71 85 72 86 11 99 19 19 22 22 54 68 11 72 86 71 85 99 19 19 22 22 ntsc 860 865 862 867 944 949 946 951 46 673 675 680 682 685 687 692 694 673 675 680 682 685 687 692 694 46 860 865 862 867 944 949 946 951 46 673 675 673 675 46 af2 mode output signal high-speed sweep period 17h frame shift period 17h
? 26 ? ICX412AQ drive timing chart (high-speed frame shift operation) ntsc/pal af1 mode, af2 mode af1 mode 10 lines af2 mode 17 lines #1 #2 af1 mode #68 af2 mode #110 68 52 100 52 hd v1a/b v2 v3a/b v4 48 80 48 80 80 48 80 48 80 48 80 48 80 48 80 48 80 48 48 48 80 48 80 80 84 1 "e" enlarged
? 27 ? ICX412AQ drive timing chart (high-speed sweep operation) ntsc/pal af1 mode, af2 mode "f" enlarged af1 mode 11 lines af2 mode 17 lines #1 #2 af1 mode #75 af2 mode #116 68 1 52 100 52 hd v1a/b v2 v3a/b v4 48 80 48 80 80 48 80 48 80 48 80 48 80 48 80 48 80 48 48 48 80 48 80 80 84
? 28 ? ICX412AQ plactic package cover glass compressive strength 50n 50n 1.2nm torsional strength notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensors. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a 30w soldering iron with a ground wire and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero-cross on/off type and connect it to ground. 3) dust and dirt protection image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. clean glass plates with the following operations as required, and use them. a) perform all assembly operations in a clean room (class 1000 or less). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) installing (attaching) a) remain within the following limits when applying a static load to the package. do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (this may cause cracks in the package.) b) if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive.
? 29 ? ICX412AQ structure a structure b chip metal plate (lead frame) package cross section of lead frame c) the adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) the notch of the package is used for directional index, and that can not be used for reference of fixing. in addition, the cover glass and seal resin may overlap with the notch of the package. e) if the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) acrylate anaerobic adhesives are generally used to attach ccd image sensors. in addition, cyano- acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) others a) do not expose to strong light (sun rays) for long periods, as color filters will be discolored. when high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. in such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. for continuous using under cruel condition exceeding the normal using condition, consult our company. b) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. c) brown stains may be seen on the bottom or side of the package. but this does not affect the ccd characteristics. d) this package has 2 kinds of internal structure. however, their package outline, optical size, and strength are the same. the cross section of lead frame can be seen on the side of the package for structure a.
? 30 ? ICX412AQ sony corporation package outline unit: mm 20 pin dip b ~ b ' m a 1 1 c h v d 12.2 package structure package material lead treatment lead material package mass drawing number plastic gold plating 42 alloy as-b6-02(e) 0.95g 1. ?a? is the center of the effective image area. 2. the two points ?b? of the package are the horizontal reference. the point ?b'? of the package is the vertical reference. 3. the bottom ?c? of the package, and the top of the cover glass ?d? are the height reference. 4. the center of the effective image area relative to ?b? and ?b'? is (h, v) = (6.9, 6.0) ?0.075mm. 5. the rotation angle of the effective image area relative to h and v is ?1?. 6. the height from the bottom ?c? to the effective image area is 1.41 ?0.10mm. the height from the top of the cover glass ?d? to the effective image area is 1.49 ?0.15mm. 7. the tilt of the effective image area relative to the bottom ?c? is less than 50?. the tilt of the effective image area relative to the top ?d? of the cover glass is less than 50?. 8. the thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 9. the notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. ~ ~ 0.25 1.7 1.7 1.7 11 20 1.7 10 12.0 ?0.1 2.9 ?0.15 3.5 ?0.3 13.8 ?0.1 12.7 10 20 11 6.9 10.9 0? to 9? 6.0 2.4 0.5 0.8 2.5 9.0 2.5 0.5 0.8 1.27 0.3 0.3 10.0 2.5

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