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4 slus459a october 2000 1 post office box 655303 ? dallas, texas 75265 scsi spi-2, spi-3, ultra160 compliance smallest footprint lowest channel capacitance, 2 pf less than 0.5-pf capacitance differential between pairs 2.7 v to 5.25 v operation differential failsafe bias builtin spi-3 mode change/filter delay 64-pin low profile qfp description the ucc5686 is a twenty-seven line active terminator for low-voltage-differential (lvd) scsi networks. this lvd scsi-only design allows the user to reach peak bus performance, while reducing system cost. the device is designed as an active y-terminator to improve the frequency response of the lvd scsi bus. designed with a 2-pf (typical) channel capacitance, the ucc5686 allows for minimal bus loading for a maximum number of peripherals. with the ucc5686, the designer is able to comply with the ultra2, ultra3, and ultra160 specifications. the ucc5686 also provides a much-needed system migration path for the ever improving scsi system standards. this device is available in the 64-pin low-profile qfp package for ease of layout use. single-ended (se) and high-voltage differential (hvd) scsi drivers are not supported. available options disconnect packaged devices 2 t a disconnect status low profile qfp (pm) 0 cto70 c regular ucc5686pm 0 c to 70 c reverse UCC5687pm 2 the pm package is available taped and reeled. add tr suffix to device type (e.g. ucc5686pmtr) to order quantities of 1000 devices per reel. copyright ? 2000, texas instruments incorporated
'*$+-) /'+* '. !0--#*/ . +$ ,0 ('! /'+* " /# -+"0!/. !+*$+-) /+ .,#!'$'! /'+*. ,#- /&# /#-). +$ #2 . *./-0)#*/. ./ *" -" 1 -- */3 -+"0!/'+* ,-+!#..'*% "+#. *+/ *#!#.. -'(3 '*!(0"# /#./'*% +$ (( , - )#/#-. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1718 19 discnct1 discnct2 l21 l21+ l20 l20+ l19 l19+ difsens diffb l18 l18+ l17 l17+ l16 l16+ 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 l25 l25+ l26 l26+ l27 l27+ strmpwr ptrmpwr reg sgnd pgnd lvd l10 l10+ l11 l11+ 21 22 23 24 l22+ l6+ 63 62 61 60 59 64 58 l23+ l23 l9+ l9 l8+ l8 l7+ l3 l4+ l4 l14+ l13+ l13 l1+ l1 l2+ l2 l3+ 56 55 54 57 25 26 27 28 29 53 52 l12+ l6 l5+ 51 50 49 30 31 32 l14 l15+ l15 l5 l7 l22 l24+ l24 l12 for the UCC5687, pin 47 is discnct1 and pin 48 is discnct2 . pm package (top view)
slus459a october 2000 2 post office box 655303 ? dallas, texas 75265 block diagram udg-00123 48 *discnct1 12 lvd 9 reg 22 l1 21 l1+ 5 l27 6 l27+ +56mv source/sink regulator 0.6v 2.15 v 52 52 52 52 125 se hpd 39 125 ref 1.25v ref 1.3v 40 difsens 1.3v +/ 0.1v diffb 47 *discnct2 l10 l27 l1 l9 7 8 strmpwr ptrmpwr 10 11 sgnd pgnd *for the UCC5687 pin 47 is discnct1 and pin 48 is discnct2. + + + + +56mv +56mv +56mv + + se lvd hvd discnct open down open open mode all switches 15ma i source 5ma 50 m a i sink 200 m a 100 ms to 300 ms delay/ filter absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 23 input voltage v in (strmpwr, ptrmpwr) 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . signal line input voltage 0 v to 5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . regulator output current 0.75 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 55 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating virtual junction temperature range, t j 55 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature (soldering, 10 seconds) 300 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3 unless otherwise indicated, voltages are reference to ground and currents are positive into and negative out of the specified termi nals. consult packaging section of the interface products data book (ti literature number slud002) for thermal limitations and considerations of packages. all voltages are referenced to gnd.
slus459a october 2000 3 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range, xtrmpwr = 2.7 v to 5.25 v, t a = 0 c to 70 c, discnct1 = discnct2 = 0 v for ucc5686, discnct1 = discnct2 = open for UCC5687, t a = t j . (unless otherwise noted) parameter test conditions min typ max unit xtrmpwr supply current section xtrmpwr su pp ly current lvd mode 65 ma xtrmpwr supply current disabled terminator 500 m a 1.25 v regulator section 1.25 v regulator 0.5 v v cm 2.0 v, see note 1 1.15 1.25 1.35 v regulator source current v reg = 0 v 300 240 ma regulator sink current v reg = 3.0 v 240 300 ma 1.3 v (difsens) regulator section 1.3 v regulator 5ma i difsens 50 m a 1.2 1.3 1.4 v short-circuit source current v difsens = 0 v 5 8 15 ma short-circuit sinkcurrent v difsens = 2.75 v 50 200 m a differential termination section (applies to each line pair 127) differential bias voltage 100 125 mv differential impedance 100 105 110 w common-mode bias voltage l+ and l shorted together 1.15 1.25 1.35 v common-mode impedance l+ and l shorted together, see note 2 110 140 165 w disconnected termination section output leakage current 10 400 na output capacitance se measurement to gnd, see note 3 3 pf disconnect control (discnct1) or (disncnt2) and diffb input section discnct threshold voltage 0.8 1.3 2.0 v discnct input current v discnct = 0 v and 2.0 v 30 10 m a diffb se to lvd threshold voltage 0.5 0.6 0.7 v diffb lvd to hpd threshold voltage 1.9 2.05 2.2 v diffb input current 0 v v diffb 2.75 v 10 10 m a low-voltage differential (lvd) status bit section source current v load = 2.4 v 6 4 ma sink current v load = 0.4 v 2 5 ma time delay/filter section mode change delay (see note 4) 100 190 300 ms thermal shutdown section thermal shutdown threshold for increasing temperature 140 155 170 c thermal shutdown hysteresis 10 c notes: 1. vcm is applied to all l+ and l lines simultaneously. 2. z cm 2.0 v 0.5 v i vcm (max) i vcm (max) , v cm(max) = 2.0 v, v cm(min) = 0.5 v 3. ensured by design, not production tested. 4. a new mode change can begin any time after a previous mode change has been detected.
slus459a october 2000 4 post office box 655303 ? dallas, texas 75265 pin descriptions strmpwr: 2.7 v to 5.25 v power supply for all circuitry except the 1.25-v regulator. sgnd: ground reference for all circuitry except the 1.25-v regulator. ptrmpwr: 2.7 v to 5.25 v power supply for the 1.25-v regulator. pgnd: ground reference for the 1.25-v regulator. reg: output of the internal 1.25-v regulator; must be connected to a 4.7- m f bypass capacitor and a high-frequency, low-esr 0.01- m f capacitor to gnd. difsens: drives the scsi bus diff sense line to 1.3 v to detect what types of devices are tied to the bus. diffb: diff sense input pin. connect through a 20-k w resistor to difsens and through a 0.1- m f capacitor to gnd. input to comparators that detect what type of drives are connected to the scsi bus. discnct1: disconnect one controls termination lines 1027 (control and low byte). discnct2: disconnect two controls termination lines 19 (high byte). lvd: ttl compatible status bit indicating when low-voltage-differential voltage is present on diffb. l1 thru l27: negative lines for the scsi bus. l1+ thru l27+: positive lines for the scsi bus.
slus459a october 2000 5 post office box 655303 ? dallas, texas 75265 application information reg strmpwr discnct1 control and low byte diffb termpower 0.1 m f 7 48 40 9 39 difsens control lines (9) 21 22 60 59 l1+ l1 l9+ l9 data (8) + parity lines 14 13 37 38 l10+ l10 l18+ l18 41 42 6 5 l19+ l19 l27+ l27 47 discnct2 high byte ptrmpwr 8 4.7 m f ucc5686 11 10 pgnd sgnd 4.7 m f 0.01 m f data (8) + parity lines strmpwr reg diffb 40 39 9 7 48 difsens 21 22 60 59 l1+ l1 l9+ l9 14 13 37 38 l10+ l10 l18+ l18 discnct1 control and low byte termpower 41 42 6 5 l19+ l19 l27+ l27 47 discnct2 high byte ucc5686 ptrmpwr 8 4.7 m f 11 10 pgnd sgnd 4.7 m f 0.1 m f 0.01 m f 20 k w 20 k w lvd 12 0.01 m f 0.01 m f s1 s2 s4 s3 note a: close s1, s2, s3, and s4 to connect terminators in ucc5686. open s1, s2, s3, and s4 to connect terminators in UCC5687. figure 1. typical application diagram
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated
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