exar corporation, 48720 kato road, fremont, ca 94538 (510) 668-7000 fax (510) 668-7017 ST49C101A-XX high frequency clock multiplier january 1999 -3 rev. 2.20 features mask programmable analog phase locked loop up to 200mhz operation preprogrammed multiplication factors of 2, 3, 4, 5, 6, 8, 10 and 12x low output jitter replace expensive high frequency oscillator crystal oscillator circuit on chip low power single supply 5v or 3.3v cmos technology small 8 lead soic package general description the ST49C101A-XX is a mask programmable mono- lithic analog phase locked loop device, designed to replace existing high frequency crystal oscillator with a low frequency crystal. the high performance applications voltage controlled crystal oscillator (vcxo) system clock multiplication in: computer systems telecommunications systems set-top boxes ST49C101A-XX provides low jitter clock output and operates up to 180 mhz. at 3.3 volts power supply. the ST49C101A-XX supports preprogrammed multiplica- tion factors of 2,3,4,5,6,8,10 and 12x. ordering information . r e b m u n t r a pe g a k c a p g n i t a r e p o e g n a r e r u t a r e p m e t 1 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 3 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 5 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 6 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 7 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 8 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 9 0 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 0 1 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 3 1 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c 5 1 - 8 f c a 1 0 1 c 9 4 t sc i o s c e d e j l i m 0 5 1 d a e l 80 o 0 7 o t c o c y r o t c a f t l u s n o ce i d0 o 0 7 o t c o c
ST49C101A-XX 2 rev. 2.20 oscillator circuit programmable counter b phase detector charge pump loop filter voltage controlled oscillator programmable counter c voltage reference circuit output buffer programmable counter a cloc k xtal1 xtal2 oe vcc figure 1. block diagram
ST49C101A-XX 3 rev. 2.20 pin description pin # symbol type description 1 xtal1 i crystal or external clock input. a crystal can be connected to this pin and xtal2 pin to generate internal phase locked loop reference clock. for external clock, xtal2 is left open or used as buffered clock output. 2 1 oe i clock output enable (active high). clock output is three stated when this pin is low. connect to dvcc for normal operation. 3 agnd o analog ground. 4 dgnd o digital ground. 5 clock o programmed output clock. 6dv cc i positive supply voltage. single +5 or 3.3 volts. 7av cc i analog supply voltage. single +5 or 3.3 volts. 8 xtal2 o crystal output. note: 1 has internal weak pull-up resistor 8 1 5 4 2 3 7 6 xtal2 avcc dvcc clock xtal1 oe agnd dgnd 8 pin soic (jedec, 0.150")
ST49C101A-XX 4 rev. 2.20 multiplication factor and output fre- quency selection the ST49C101A-XX contains an analog phase locked loop (pll) circuit with digital closed loop dividers and a final output divider to achieve the desired dividing ratios for the clock output. the preprogrammed multi- plication factor and output frequency are shown on table 1. the accuracy of the output frequency pro- duced by the ST49C101A-XX depends on its input frequency and multiplication factor. applications two application examples are shown in figure 2 and 3. figure 2 shows a lower cost high frequency crystal oscillator circuit using the st49c101-xx to increase the fundamental crystal frequency. the crystal y1 is connected to xtal1 and xtal2 pins to use the internal oscillator circuit. the oscillator provides the reference clock to the pll circuit for clock rate multi- plication. figure 3 shows a similar circuit using external clock input on xtal1 pin instead. if a sinewave is used for external clock, it may be necessary to ac couple the signal with a 0.047uf capacitor to xtal1 pin so that the internal circuitry can establish the proper bias. also, keep the peak-to- peak signal, at xtal pin, above ground level (agnd) and below avcc. as a general board layout rule, it is recommended to use two 0.01 m f bypass capacitors on dvcc and avcc power supply pins, and put them as closely as possible to the chip. notes 1 see ac electrical characteristics for maximum operating frequency. x x - a 1 0 1 c 9 4 t sr o t c a f t u p t u o . x a m y c n e u q e r f 1 c c v 1 1 0 - a 1 0 1 c 9 4 t s2 1 z h m 0 0 2 z h m 0 4 1 v 0 . 5 v 3 . 3 3 0 - a 1 0 1 c 9 4 t s8 z h m 0 0 2 z h m 0 4 1 v 0 . 5 v 3 . 3 5 0 - a 1 0 1 c 9 4 t s6 z h m 0 0 2 z h m 0 4 1 v 0 . 5 v 3 . 3 6 0 - a 1 0 1 c 9 4 t s4z h m 0 2 1 r o 0 . 5 v 3 . 3 7 0 - a 1 0 1 c 9 4 t s3 z h m 0 8 z h m 0 7 v 0 . 5 v 3 . 3 8 0 - a 1 0 1 c 9 4 t s2 z h m 0 8 z h m 0 7 v 0 . 5 v 3 . 3 9 0 - a 1 0 1 c 9 4 t s5 z h m 0 0 2 z h m 0 4 1 v 0 . 5 v 3 . 3 0 1 - a 1 0 1 c 9 4 t s0 1z h m 0 8 1v 3 . 3 3 1 - a 1 0 1 c 9 4 t s8z h m 0 8 1v 3 . 3 5 1 - a 1 0 1 c 9 4 t s6z h m 0 8 1v 3 . 3 table 1. preprogrammed options
ST49C101A-XX 5 rev. 2.20 xtal1 xtal2 agnd dgnd clock oe u1 ST49C101A-XX c1 c2 y1 dgnd agnd agnd dgnd clock= xtal freq. x option 1 8 34 76 5 2 parallel cut fundamental resonance 20-30pf load crystal 0.01uf 0.01uf dvcc dvcc avcc dvcc avcc figure 2. high frequency crystal oscillator using a crystal for reference. clkin xtal1 xtal2 clock oe c2 u1 ST49C101A-XX clock = clkin x option agnd dgnd 1 8 34 76 5 2 0.01uf dvcc avcc dvcc agnd dgnd agnd dgnd dvcc avcc c1 0.01uf figure 3. high frequency clock rate multiplication using external clock.
ST49C101A-XX 6 rev. 2.20 dc electrical characteristics test conditions: t a = 25 c, v cc = 5.0v + 10%, operating temperature range 0 c to 70 c unless otherwise specified symbol parameter min. typ. max. unit conditions v il input low level 0.8 v v ih input high level 2.0 v v ol output low level 0.5 v i ol = 8.0 ma v oh output high level 2.8 v i oh = 8.0 ma i il input low current -100 a oe pin only i ih input high current 1 av in =v cc, oe pin only i cc operating current 35 50 ma no load. clock=100mhz r in input pull-up resistance 75 110 155 k w ac electrical characteristics test conditions: t a = 25 c, v cc = 5.0v + 10%, operating temperature range 0 c to 70 c unless otherwise specified symbol parameter min. typ. max. unit conditions t1,t2 clock rise/fall time 1.5 3 ns load=30 pf, 0.2 v cc - 0.8 v cc t4 t4 + t5 duty cycle 45 50 55 % v cc /2 switch point up to 100mhz, load = 20pf t4 t4 + t5 duty cycle 40 50 60 % v cc /2 switch point 100-150mhz, 95 w (ac terminated) t3 jitter 1 sigma +0.4 +1 % of period t3 jitter absolute +1 +3 % of period t in input reference frequency 12 20 30 mhz t out output frequency 50 200 mhz st49c101a-01 50 200 mhz st49c101a-03 50 200 mhz st49c101a-05 50 120 mhz st49c101a-06 25 80 mhz st49c101a-07 25 80 mhz st49c101a-08 50 200 mhz st49c101a-09
ST49C101A-XX 7 rev. 2.20 dc electrical characteristics test conditions: t a = 25 c, v cc =3.3v +/- 10%, operating temperature range 0 c to 70 c unless otherwise specified symbol parameter min. typ. max. unit conditions v il input low level 0.8 v v ih input high level 2.0 v v ol output low level 0.5 v i ol = 4.0ma v oh output high level 2.0 v i oh = 4.0ma i il input low current -100 a oe pin only ii h input high current 1 av in =vcc , oe pin only i cc operating current 22 40 ma no load. clock=100mhz r in input pullCup resistance 75 110 155 k w ac electrical characteristics test conditions: t a = 25 c, v cc =3.3v +/- 10%, operating temperature range 0 c to 70 c unless otherwise specified symbol parameter min. typ. max. unit conditions t1, t2 clock rise/fall time 2 4 ns load = 30 pf, 0.2 v cc - 0.8 v cc t4 t4+t5 duty cycle 45 50 55 % v cc /2 switch point up to 100mhz, load = 30 pf t4 t4+t5 duty cycle 40 50 60 % v cc /2 switch point 100-150mhz, 95 w (ac terminated) t3 jitter 1 sigma + 0.4 + 1 % of period t3 jitter absolute + 1 + 3 % of period t in input reference frequency 12 20 30 mhz t out output frequency 50 140 mhz st49c101a-01 50 140 mhz st49c101a-03 50 140 mhz st49c101a-05 50 150 mhz st49c101a-05 at v cc =3.13v min. 50 120 mhz st49c101a-06 25 70 mhz st49c101a-07 25 70 mhz st49c101a-08 50 140 mhz st49c101a-09 25 180 mhz st49c101a-10 at v cc =3.13v min. 25 180 mhz st49c101a-13 at v cc =3.13v min. 25 180 mhz st49c101a-15 at v cc =3.13v min.
ST49C101A-XX 8 rev. 2.20 absolute maximum ratings supply range 7 v voltage at any pin gnd-0.3v to v cc +0.3v operating temperature 0 c to +70 c storage temperature -40 c to +150 c package dissipation 500mw t4 t5 t3 t2 t1 output clock figure 4. timing diagram
ST49C101A-XX 9 rev. 2.20
ST49C101A-XX 10 rev. 2.20 notice exar corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. exar corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. charts and schedules contained here in are only for illustration purposes and may vary depending upon a users specific application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for in accuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 1999 exar corporation datasheet january 1999 reproduction, in part or whole, without the prior written consent of exar corporation is prohibited.
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