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  original creation date: 09/12/00 last update date: 09/22/00 last major revision date: mnlm117-x rev 0a0 microcircuit data sheet positive three-terminal adjustable voltage regulator general description the lm117 adjustable 3-terminal positive voltage regulator is capable of supplying in excess of 0.5a over a 1.2v to 37v output range. it is exceptionally easy to use and requires only two external resistors to set the output voltage. further, both line and load regulation are better than standard fixed regulators. in addition to higher performance than fixed regulators, the lm117 offers full overload protection available only in ic's. included on the chip are current limit, thermal overload protection and safe area protection. all overload protection circuitry remains fully functional even if the adjustment terminal is disconnected. normally, no capacitors are needed unless the device is situated more than 6 inches from the input filter capacitors in which case an input bypass is needed. an optional output capacitor can be added to improve transient response. the adjustment terminal can be bypassed to achieve very high ripple rejection ratios which are difficult to achieve with standard 3-terminal regulators. besides replacing fixed regulators, the lm117 is useful in a wide variety of other applications. since the regulator is "floating" and sees only the input-to-output differential voltage, supplies of several hundred volts can be regulated as long as the maximum input to output differential is not exceeded, (i.e., avoid short-circuiting the output). also, it makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a fixed resistor between the adjustment pin and output, the lm117 can be used as a precision current regulator. supplies with electronic shutdown can be achieved by clamping the adjustment terminal to ground which programs the output to 1.2v where most loads draw little current. ns part numbers lm117h/883 lm117wg/883 industry part number lm117h prime die lm117h processing mil-std-883, method 5004 quality conformance inspection mil-std-883, method 5005 subgrp description temp ( c) o 1 static tests at +25 2 static tests at +125 3 static tests at -55 4 dynamic tests at +25 5 dynamic tests at +125 6 dynamic tests at -55 7 functional tests at +25 8a functional tests at +125 8b functional tests at -55 9 switching tests at +25 10 switching tests at +125 11 switching tests at -55 1
microcircuit data sheet mnlm117-x rev 0a0 features - guaranteed 0.5a output current - adjustable output down to 1.2v - current limit constant with temperature - 80 db ripple rejection - output is short-circuit protected 2
microcircuit data sheet mnlm117-x rev 0a0 (absolute maximum ratings) (note 1) power dissipation (note 2) internally limited input-output voltage differential +40v, -0.3v maximum junction temperature 150 c storage temperature range -65 c < ta < +150 c lead temperature (soldering, 10 seconds) 300 c thermal resistance thetaja metal can 186 c/w (still air) 64 c/w (500lf/min air flow) ceramic soic 115 c/w (still air) 66 c/w (500lf/min air flow) thetajc 21 c/w metal can 3.4 c/w ceramic soic (note 3, 4) package weight (typical) tbd metal can 365mg ceramic soic esd tolerance (note 5) 3000v note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. for guaranteed specifications and test conditions, see the electrical characteristics. the guaranteed specifications apply only for the test conditions listed. some performance characteristics may degrade when the device is not operated under the listed test conditions. note 2: the maximum power dissipation must be derated at elevated temperatures and is dictated by tjmax (maximum jnnction temperature), thetaja (package junction to ambient thermal resistance), and ta (ambient temperature). the maximum allowable power dissipation at any temperature is pdmax = (tjmax - ta)/ thetaja or the number given in the absolute maximum ratings, whichever is lower. note 3: for the ceramic soic device to function properly, the "output" and "output/sense" pins must be connected on the users printed circuit board. note 4: the package material for these devices allows much improved heat transfer over our standard ceramic packages. in order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. without this additional heat sinking, device power dissipation must be calculated using junction-to-ambient, rather than junction-to-case, thermal resistance. it must not be assumed that the device leads will provide substantial heat transfer out of the package, since the thermal resistance of the leadframe materical is very poor, relatvie to the materical of the package base. the stated junction-to-case thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. the user must determine the value of the additional thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. note 5: human body model, 1.5k ohms in series with 100pf. 3
microcircuit data sheet mnlm117-x rev 0a0 recommended operating conditions operating temperature range -55 c < ta < +125 c 4
mnlm117-x rev 0a0 microcircuit data sheet electrical characteristics dc parameters (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vdiff = vin - vout, il = 8ma symbol parameter conditions notes pin- name min max unit sub- groups iadj adjustment pin current vdiff = 3v 100 ua 1 vdiff = 3.3v 100 ua 2, 3 vdiff = 40v 100 ua 1, 2, 3 iq minimum load current vdiff = 3v, vout = 1.7v 5 ma 1 vdiff = 3.3v, vout = 1.7v 5 ma 2, 3 vdiff = 40v, vout = 1.7v 5 ma 1, 2, 3 vref reference voltage vdiff = 3v 1.2 1.3 v 1 vdiff = 3.3v 1.2 1.3 v 2, 3 vdiff = 40v 1.2 1.3 v 1, 2, 3 rline line regulation 3v < vdiff < 40v, vout = 1.2v -8.9 8.9 mv 1 3.3v < vdiff < 40v, vout = 1.2v -22.2 22.2 mv 2, 3 rload load regulation vdiff= 3v, il = 10ma to 500ma -15 15 mv 1 vdiff= 3.3v, il = 10ma to 500ma -15 15 mv 2, 3 vdiff= 40v, il = 10ma to 150ma -15 15 mv 1 vdiff= 40v, il = 10ma to 100ma -15 15 mv 2, 3 delta iadj adjustment current change vdiff = 3v, il = 10ma to 500ma -5 5 ua 1 vdiff = 3.3v, il = 10ma to 500ma -5 5 ua 2, 3 vdiff = 40v, il = 10ma to 150ma -5 5 ua 1 vdiff = 40v, il = 10ma to 100ma -5 5 ua 2, 3 3v < vdiff < 40v -5 5 ua 1 3.3v < vdiff < 40v -5 5 ua 2, 3 ios short circuit current vdiff = 10v .45 1.6 a 1 theta r thermal regulation ta = 25 c, t = 20ms, vdiff = 40v, il = 150ma -6 6 mv 1 icl current limit vdiff < 15v 1 0.5 a 1, 2, 3 vdiff = 40v 1 0.15 a 1 5
mnlm117-x rev 0a0 microcircuit data sheet electrical characteristics ac parameters symbol parameter conditions notes pin- name min max unit sub- groups rr ripple rejection vin =+6.25v, vout = vref, f = 120hz, ei = 1vrms, il = 125ma 2 66 db 4, 5, 6 dc parameters: drift values (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vdiff = vin - vout, il = 8ma. "deltas not required on b-level product. deltas required for s-level product only as specified on internal processing instructions (ipi)." iadj adjustment pin current vdiff = 40v -10 10 ua 1 vref reference voltage vdiff = 3v -0.01 0.01 v 1 note 1: guaranteed parameter not tested note 2: tested at +25 c; guaranteed, but not tested at +125 c and -55 c. 6
microcircuit data sheet mnlm117-x rev 0a0 graphics and diagrams graphics# description 06368hra1 ceramic soic (wg), 16 lead (b/i ckt) 09784hrb3 metal can (h), to-39, 3ld, .200 dia p.c. (b/i ckt) h03ard metal can (h), to-39, 3ld, .200 dia p.c. (p/p dwg) p000174a metal can (h), to-39, 3ld, .200 dia p.c. (pinout) p000385b ceramic soic (wg), 16 lead (pinout) wg16arc ceramic soic (wg), 16 lead (p/p dwg) see attached graphics following this page. 7

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n mil/aerospace operations 2900 semiconductor drive santa clara, ca 95050 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 nc nc nc nc nc nc adj nc nc nc nc n/c input output lm117wg 16 - lead ceramic soic connection diagram top view p000385b nc output/sense

microcircuit data sheet mnlm117-x rev 0a0 revision history rev ecn # rel date originator changes 0a0 m0003046 09/22/00 rose malone initial mds release: mnlm117-x, rev. 0a0. replaced mnlm117-h, rev. 1a0. 8


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