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CMM3566-LC
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CMM3566-LC
Preliminary Product Information November 2000 (1 of 4) Features 7.0V Bias Voltage +24 dBm Linear Output Power (W-CDMA) 30 dB Gain at Operating Output Tested Under Digital Modulation (W-CDMA) Leadless Chip Carrier (LCC) Package Applications Wireless Local Loop Subscriber Units Wireless Local Loop Base Stations
3.45 to 3.5 GHz 7.0V, +24 dBm W-CDMA Power Amplifier
Functional Block Diagram
Ground Tab Vg3 1 Vg2 2 Vg1 3 RF IN 4 8 RF OUT/+Vd3 7 RF OUT/+Vd3 6 Vd2 5 Vd1 Ground Tab
Description
The CMM3566-LC is a 7.0 V, +24 dBm, linear power amplifier intended for use in PCS handsets and wireless local loop subscriber units and base stations. The amplifier is biased to meet the requirements of linear modulation systems of W-CDMA.
The CMM3566-LC is packaged in a low-cost, space efficient, power package that provides excellent electrical stability and low thermal resistance. The part requires minimal external circuitry for bias and matching to reduce space and cost.
Absolute Maximum Ratings
Parameter Rating Parameter Rating Parameter Rating
Drain Voltage (+Vd) Drain Current (Id) RF Input Power DC Gate Voltage (-Vg)
+8 V* 1.0 A 0 dBm* -4.0 V*
Power Dissipation Thermal Resistance Storage Temperature BVGD
5W 20C/W -65C to +150C 18 V
Operating Temperature Channel Temperature Soldering Temperature
-30C to +90C 150C 240C for 5 Sec.
* Max (+Vd) and (-Vg) under linear operation. Max potential difference across the device at 1dB gain compression point (2Vd + |-Vg|) not to exceed the minimum breakdown voltage (BVGD) of +18V.
Recommended Operating Conditions
Parameter Typ Units Parameter Typ Units
Drain Voltage (+Vd)
7.0
Volts
Operating Temperature (PC Board)
-40 to +70
C
Application Information
The CMM3566-LC is a three stage amplifier that requires a positive and a negative supply voltages for proper operation. It is essential when turning on the device that the negative supply be applied before the positive supply. When turning the device off, the positive supply should be removed before the negative supply is removed. The CMM3566-LC can be operated over a range of supply voltages and bias currents. It is important that the maximum power dissipation specification for the package be observed at all times and that the maximum voltage across the device not be exceeded.
supply voltage is applied to pins 5, 6, 7 and 8. The negative voltage supplies control the quiescent current of the device. The quiescent current needs to be set at the level specified in order to get the guaranteed RF performances. Negative bias voltages can also be used to control the gain, the output power and the operating current during operation of the device. Matching Circuits Output matching circuit is required to achieve the output power and gain guaranteed. Celeritek's recommendation for the topology of the matching circuit is shown in the schematic diagram of the test circuit in this data sheet. In providing both the negative and positive bias voltages, it is important to provide adequate de-coupling between the RF signal and the DC voltages. Inadequate de-coupling could result in low output power, low gain or oscillation. Celeritek recommends the bias circuits shown in the evaluation circuit .
- Continued on Page 2 -
Circuit Design Considerations
Biasing Three negative voltages are needed to set the bias current of the 3-stage GaAs FET power amplifier. The first stage bias is controlled via Vg1. The second stage bias is controlled via Vg2. The output stage is controlled via Vg3. The recommended divider networks for each gate bias shown in the schematic. The positive
3236 Scott Boulevard Santa Clara, California 95054
Phone: (408) 986-5060
Fax: (408) 986-5095
CMM3566-LC
Electrical Characteristics
Preliminary Product Information - November
Unless otherwise specified, the following specifications are guaranteed at 3.45 GHz, room temperature with drain voltage (+Vd) = 7.0 V in Celeritek test fixture.
Parameter Condition Min Typ Max Units
Frequency Range Gain Gain Variation Harmonics* Linear Output Power
Linear Output Power
Wideband Noise Noise Figure Return Loss Input Return Loss Output Positive Supply Current (Id) Quiescent Current (Iq) Negative Supply Current (-Ig) Negative Supply Voltage (-Vg)
@ Digital power output Over supply voltage Over temperature 2nd (Pout = +22 to +26 dBm) 3rd (Pout = +22 to +26 dBm) and above 2.7 MHz from carrier (Pout = +22 dBm, Data Rate = 4.096Mc/Sec 5.25 MHz from carrier (Pout = +22 dBm, Data Rate = 4.096Mc/Sec 2.7 MHz from carrier (Pout = +24 dBm, Data Rate = 4.096Mc/Sec 5.25 MHz from carrier (Pout = +24 dBm, Data Rate = 4.096Mc/Sec 10 MHz Bandwidth Vdd = 7.0 V
3.45 26
28.5 2 0.03 -35 -40 -43 -50 -38 -47
3.5 31
-30 -35 -40 -48 -35 -45
GHz dB dB/V dB/C dBc dBc dBc/30 KHz dBc/30 KHz dBc/30 KHz dBc/30 KHz dBc dB dB dB mA mA mA V
-68 -10 -10 5 -14 -14 540 520 2.0 -1.5
Pout = +24 dBm No RF Includes external resistor divider Into external resistor divider -0.3
4.0 -3.0
* The integrity of the input signal at an offset of 5.25 MHz has an adjacent channel performance of not greater than -52 dBc.
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Modulation When biased as specified, the CMM3566-LC will achieve the required adjacent channel response for the W-CDMA linearity. Celeritek tests each product under digital modulation to ensure compliance to system specifications.
Thermal 1. The copper pad on the backside of the CMM3566-LC must be soldered to the ground plane.
S-Parameters
Vdd = 7V, ID 1 & 2 = 200, ID 3 = 300 Frequency (GHz) 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 S11 Mag 0.646 0.659 0.732 0.778 0.781 0.751 0.770 0.770 0.781 0.772 0.757 0.640 0.447 0.516 0.518 0.131 0.423 0.578 ANG 136.623 54.979 -19.826 -82.663 -140.684 155.653 14.916 11.996 -40.876 -81.765 -121.242 176.329 86.466 0.714 -69.213 -149.583 -13.907 -59.337 Mag 2.393 1.283 5.119 8.080 10.458 12.110 11.272 11.158 11.715 15.438 21.302 27.182 29.193 28.413 25.542 24.348 19.130 14.619 S21 ANG 20.992 17.015 -67.405 -171.314 93.318 -2.432 -176.757 -179.876 106.441 32.091 -51.262 -150.627 105.943 4.707 -94.768 164.543 58.878 -37.638 Mag 0.002 0.003 0.004 0.005 0.005 0.007 0.006 0.006 0.007 0.008 0.010 0.011 0.010 0.011 0.010 0.012 0.011 0.008 S12 ANG -19.228 -80.195 -158.535 132.866 67.738 0.028 -124.480 -126.766 173.071 128.121 68.938 -13.377 -79.627 -137.593 152.682 93.523 18.708 -52.138 Mag 0.804 0.682 0.420 0.382 0.533 0.650 0.874 0.880 0.911 0.877 0.771 0.756 0.690 0.471 0.383 0.268 0.257 0.278 S22 ANG -23.817 -89.402 -138.407 -152.437 150.599 69.917 -61.986 -63.734 -116.517 -177.609 103.364 13.731 -53.854 -91.983 -99.415 -121.022 -98.953 -134.978
3236 Scott Boulevard, Santa Clara, California 95054 Phone: (408) 986-5060 Fax: (408) 986-5095
CMM3566-LC
Preliminary Product Information - November 2000 Typical Performance
(3 of 4)
Gain and Return Loss vs Frequency
Linear Output Power vs Frequency
Id & Adjacent Channel Power vs Output Power (2.7 MHz from Carrier)
Id & Adjacent Channel Power vs Output Power (5.25 MHz from Carrier)
3236 Scott Boulevard
Santa Clara, California 95054
Phone: (408) 986-5060
Fax: (408) 986-5095
CMM3566-LC
Recommended Matching Topology
Preliminary Product Information - November 2000
(4 of 4) Evaluation Board Schematic Board substrate: ER = 3.38 Thickness = 0.031 in.
Note: This schematic represents the topology of the matching circuit recommended by Celeritek.
Vg
Vgg 3 C1 0.01 F Vgg 2 C3 0.01 F Vgg 1 C11 0.01 F C2* 100 pF 1 C10* 100 pF C12* 100 pF 2 3 4 8 7 L2 27 nH 6 5 C4 56 pF C9 .01 F L1 27 nH C5 0.1 F C14 100 F C8 0.01 F R5 49.9 K C17 T3 C7 0.9 pF 61 155 100 pF T4 105 90 RF OUT (50 )
R3 427 R4 R1 1.5K 80 R2 1.5K RF IN (50 )
C6 100 pF
Vdd
CMM3566-LC
* = Should be as close to leads as possible.
Physical Dimensions
Ordering Information
The CMM3566-LC is available in a surface mount plastic LCC-8 package and devices are available in tube or tape and reel. Part Number for Ordering Package CMM3566-LC LCC-8 surface mount power package CMM3566-LC-000T LCC-8 surface mount power package in tape and reel PB-CMM3566-LC Evaluation Board with SMA connectors for CMM3566-LC
Celeritek reserves the right to make changes without further notice to any products herein. Celeritek makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Celeritek assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Celeritek does not convey any license under its patent rights nor the rights of others. Celeritek products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Celeritek product could create a situation where personal injury or death may occur. Should Buyer purchase or use Celeritek products for any such unintended or unauthorized application, Buyer shall indemnify and hold Celeritek and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Celeritek was negligent regarding the design or manufacture of the part. Celeritek is a registered trademark of Celeritek, Inc. Celeritek, Inc. is an Equal Opportunity/Affirmative Action Employer.
3236 Scott Boulevard, Santa Clara, California 95054 Phone: (408) 986-5060 Fax: (408) 986-5095

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