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500 mA, Low Dropout, CMOS Linear Regulator ADP1715/ADP1716
FEATURES
Maximum output current: 500 mA Input voltage range: 2.5 V to 5.5 V Low shutdown current: <1 A Low dropout voltage: 250 mV @ 500 mA load 50 mV @ 100 mA load Initial accuracy: 1% Accuracy over line, load, and temperature: 3% 16 fixed output voltage options with soft start: 0.75 V to 3.3 V (ADP1715) Adjustable output voltage option: 0.8 V to 5.0 V (ADP1715 Adjustable) 16 fixed output voltage options with tracking: 0.75 V to 3.3 V (ADP1716) Stable with small 2.2 F ceramic output capacitor Excellent load/line transient response Current limit and thermal overload protection Logic controlled enable 8-lead thermally enhanced MSOP package
TYPICAL APPLICATION CIRCUITS
ADP1715
1
EN IN OUT SS
GND GND GND GND
8 7 6 5
06110-001
VIN = 5V 2.2F VOUT = 3.3V 2.2F
2 3 4
10nF
Figure 1. ADP1715 with Fixed Output Voltage, 3.3 V
ADP1715
ADJUSTABLE
1
EN IN OUT ADJ
GND GND GND GND
8 7 6 5
06110-002
VIN = 5V 2.2F VOUT = 0.8(1 + R1/R2) 2.2F R1 R2
2 3 4
Figure 2. ADP1715 with Adjustable Output Voltage, 0.8 V to 5.0 V
ADP1716
1
APPLICATIONS
Notebook computers Memory components Telecommunications equipment Network equipment DSP/FPGA/P supplies Instrumentation equipment/data acquisition systems
VIN = 5V 2.2F VOUT 2.2F
VOUT (V)
8 7 6 5
EN IN OUT TRK
GND GND GND GND
2 3 4
3 2 1 0 12345 VTRK (V)
06110-003
VTRK = 0V TO 5V
Figure 3. ADP1716 with Output Voltage Tracking
GENERAL DESCRIPTION
The ADP1715/ADP1716 are low dropout, CMOS linear regulators that operate from 2.5 V to 5.5 V and provide up to 500 mA of output current. Using an advanced proprietary architecture, they provide high power supply rejection and achieve excellent line and load transient response with just a small 2.2 F ceramic output capacitor. Three versions of this part are available, one with fixed output voltage options and variable soft start (ADP1715), one with adjustable output voltage and fixed soft start (ADP1715 Adjustable), and one with voltage tracking in fixed output voltage options (ADP1716). The fixed output voltage options are internally set to one of sixteen values between 0.75 V and 3.3 V; the adjustable output voltage can be set to any value between 0.8 V and 5.0 V by an external voltage divider connected from OUT to ADJ. The variable soft start uses an external capacitor at SS to control the output voltage ramp. Tracking limits the output voltage to the at-or-below voltage at the TRK pin. The ADP1715/ADP1716 are available in 8-lead thermally enhanced MSOP packages, making them not only a very compact solution but also providing excellent thermal performance for applications requiring up to 500 mA of output current in a small, low profile footprint.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
ADP1715/ADP1716 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Typical Application Circuits............................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution.................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ...................................................................... 10 Soft-Start Function (ADP1715)................................................ 10 Adjustable Output Voltage (ADP1715 Adjustable) ............... 11 Track Mode (ADP1716) ............................................................ 11 Enable Feature ............................................................................ 11 Application Information................................................................ 12 Capacitor Selection .................................................................... 12 Current Limit and Thermal Overload Protection ................. 12 Thermal Considerations............................................................ 12 Printed Circuit Board Layout Considerations ....................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 17
REVISION HISTORY
9/06--Rev. 0: Initial Version
Rev. 0 | Page 2 of 20
ADP1715/ADP1716 SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.5 V (whichever is greater), IOUT = 10 mA, CIN = COUT = 2.2 F, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT VOLTAGE RANGE OPERATING SUPPLY CURRENT Symbol VIN IGND Conditions TJ = -40C to +125C IOUT = 100 A IOUT = 100 A, TJ = -40C to +125C IOUT = 100 mA IOUT = 100 mA, TJ = -40C to +125C 100 A < IOUT < 500 mA, TJ = -40C to +125C EN = GND EN = GND, TJ = -40C to +125C IOUT = 10 mA IOUT = 10 mA to 500 mA 100 A < IOUT < 500 mA, TJ = -40C to +125C IOUT = 10 mA IOUT = 10 mA to 500 mA 100 A < IOUT < 500 mA, TJ = -40C to +125C VIN = (VOUT + 0.5 V) to 5.5 V, TJ = -40C to +125C IOUT = 10 mA to 500 mA IOUT = 10 mA to 500 mA, TJ = -40C to +125C IOUT = 100 mA, VOUT 3.3 V IOUT = 100 mA, VOUT 3.3 V, TJ = -40C to +125C IOUT = 500 mA, VOUT 3.3 V IOUT = 500 mA, VOUT 3.3 V, TJ = -40C to +125C IOUT = 100 mA, 2.5 V VOUT < 3.3 V IOUT = 100 mA, 2.5 V VOUT < 3.3 V, TJ = -40C to +125C IOUT = 500 mA, 2.5 V VOUT < 3.3 V IOUT = 500 mA, 2.5 V VOUT < 3.3 V, TJ = -40C to +125C Min 2.5 Typ 65 100 160 220 650 0.1 -1 -2 -3 0.792 0.784 0.776 -0.15 1.0 +1 +2 +3 0.808 0.816 0.824 +0.15 0.004 50 250 60 320 100 400 500 100 300 400 Max 5.5 Unit V A A A A A A A % % % V V V %/ V %/mA %/mA mV mV mV mV mV mV mV mV s ms mA C 1.7 C A
SHUTDOWN CURRENT FIXED OUTPUT VOLTAGE ACCURACY (ADP1715 and ADP1716 ONLY) ADJUSTABLE OUTPUT VOLTAGE ACCURACY (ADP1715 ADJUSTABLE) 1 LINE REGULATION LOAD REGULATION 2 DROPOUT VOLTAGE 3
IGND-SD VOUT
VOUT
0.8
VOUT/VIN VOUT/IOUT VDROPOUT
0.002
START-UP TIME 4 ADP1715 Adjustable and ADP1716 ADP1715 with External Soft Start CURRENT LIMIT THRESHOLD 5 THERMAL SHUTDOWN THRESHOLD THERMAL SHUTDOWN HYSTERESIS SOFT-START SOURCE CURRENT (ADP1715 WITH EXTERNAL SOFT START) VOUT to VTRK ACCURACY (ADP1716) EN INPUT LOGIC HIGH EN INPUT LOGIC LOW EN INPUT LEAKAGE CURRENT ADJ INPUT BIAS CURRENT (ADP1715 ADJUSTABLE) OUTPUT NOISE POWER SUPPLY REJECTION RATIO
TSTART-UP CSS = 10 nF ILIMIT TSSD TSSD-HYS SSI-SOURCE SS = GND 0.7 550 TJ rising 100 7.3 750 150 15 1.2
1200
VTRK-ERROR VIH VIL VI-LEAKAGE ADJI-BIAS OUTNOISE PSRR
0 V VTRK (0.5 x VOUT(NOM)), VOUT(NOM) 1.8 V, TJ = -40C to +125C 0 V VTRK (0.5 x VOUT(NOM)), VOUT(NOM) > 1.8 V, TJ = -40C to +125C 2.5 V VIN 5.5 V 2.5 V VIN 5.5 V EN = IN or GND
-50 -100 1.8 0.1 30 125 450 67 53
+50 +100 0.4 1 100
mV mV V V A nA Vrms Vrms dB dB
10 Hz to 100 kHz, VOUT = 0.75 V 10 Hz to 100 kHz, VOUT = 3.3 V 1 kHz, VOUT = 0.75 V 1 kHz, VOUT = 3.3 V
1
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 Based on an end-point calculation using 10 mA and 500 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA. 3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.5 V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value. 5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
Rev. 0 | Page 3 of 20
ADP1715/ADP1716 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter IN to GND OUT to GND EN to GND SS/ADJ/TRK to GND Storage Temperature Range Operating Junction Temperature Range Soldering Conditions Rating -0.3 V to +6 V -0.3 V to IN -0.3 V to +6 V -0.3 V to +6 V -65C to +150C -40C to +125C JEDEC J-STD-020
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance
Package Type 8-Lead MSOP JA 118 Unit C/W
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. 0 | Page 4 of 20
ADP1715/ADP1716 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
EN 1 IN 2 OUT 3 SS 4
8
ADP1715
FIXED TOP VIEW (Not to Scale)
GND GND
06110-004
EN 1 IN 2 OUT 3 ADJ 4
8
7 6 5
ADP1715
ADJUSTABLE TOP VIEW (Not to Scale)
GND GND
06110-005
EN 1 IN 2 OUT 3 TRK 4
8
GND GND
06110-006
7 6 5
ADP1716
TOP VIEW (Not to Scale)
7 6 5
GND GND
GND GND
GND GND
Figure 4. 8-Lead MSOP (RM-Suffix)
Figure 5. 8-Lead MSOP (RM-Suffix)
Figure 6. 8-Lead MSOP (RM-Suffix)
Table 4. Pin Function Descriptions
ADP1715 Fixed Pin No. 1 2 3 4 4 4 5, 6, 7, 8 5, 6, 7, 8 5, 6, 7, 8 ADP1715 Adjustable Pin No. 1 2 3 ADP1716 Pin No. 1 2 3
Mnemonic EN IN OUT SS ADJ TRK GND
Description Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. Regulator Input Supply. Bypass IN to GND with a 2.2 F or greater capacitor. Regulated Output Voltage. Bypass OUT to GND with a 2.2 F or greater capacitor. Soft Start. A capacitor connected to this pin determines the soft-start time. Adjust. A resistor divider from OUT to ADJ sets the output voltage. Track. The output will follow the voltage placed on the TRK pin. (See the Theory of Operation section for a more detailed description.) Ground.
Rev. 0 | Page 5 of 20
ADP1715/ADP1716 TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, IOUT = 10 mA, CIN = 2.2 F, COUT = 2.2 F, TA = 25C, unless otherwise noted.
3.364 3.354 3.344 3.334 3.324 3.314 ILOAD = 10mA ILOAD = 100A ILOAD = 100mA 400 350 ILOAD = 500mA 500 450
IGND (A)
VOUT (V)
300 250 200 150
ILOAD = 360mA ILOAD = 250mA
3.304 3.294 3.284 3.274 3.264 3.254 3.244 3.234 -40 -5 25 TJ (C) 85 125 ILOAD = 500mA ILOAD = 360mA
06110-007
ILOAD = 100mA ILOAD = 10mA ILOAD = 100A
06110-010
100 ILOAD = 250mA 50 0 -40 -5 25 TJ (C)
85
125
Figure 7. Output Voltage vs. Junction Temperature
3.325 500 450 3.315 400 350
Figure 10. Ground Current vs. Junction Temperature
3.305
3.295
IGND (A)
06110-008
VOUT (V)
300 250 200 150 100 50 0 0.1 1 10 ILOAD (mA) 100
06110-011
3.285
3.275
3.265 0.1
1
10 ILOAD (mA)
100
1000
1000
Figure 8. Output Voltage vs. Load Current
3.325 600
Figure 11. Ground Current vs. Load Current
3.315 ILOAD = 100A 3.305
500
400
ILOAD = 500mA ILOAD = 360mA ILOAD = 250mA
3.295
IGND (A)
VOUT (V)
ILOAD = 10mA ILOAD = 100mA ILOAD = 250mA 3.285 ILOAD = 360mA
06110-009
300
200
ILOAD = 100mA ILOAD = 10mA ILOAD = 100A
06110-012
3.275
ILOAD = 500mA
100
3.265 3.3
3.8
4.3 VIN (V)
4.8
5.3
0 3.3
3.8
4.3 VIN (V)
4.8
5.3
Figure 9. Output Voltage vs. Input Voltage
Figure 12. Ground Current vs. Input Voltage
Rev. 0 | Page 6 of 20
ADP1715/ADP1716
350 300
250
5V/DIV
1
VDROPOUT (mV)
SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM 25mA TO 475mA
200
150
50mV/DIV
VOUT
2
100
06110-013
50 0 0.1
1
10 ILOAD (mA)
100
1000
TIME (10s/DIV)
Figure 13. Dropout Voltage vs. Load Current
3.35 3.30 3.25 3.20
Figure 16. Load Transient Response
5V/DIV
1
SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM 25mA TO 475mA
VOUT (V)
3.15 3.10 3.05 3.00 2.95 3.2 ILOAD = 100A ILOAD = 10mA ILOAD = 100mA ILOAD = 250mA ILOAD = 360mA ILOAD = 500mA 3.3 3.4 VIN (V) 3.5 3.6
50mV/DIV
VOUT
2
TIME (10s/DIV)
Figure 14. Output Voltage vs. Input Voltage (in Dropout)
700 ILOAD = 500mA ILOAD = 360mA ILOAD = 250mA ILOAD = 100mA 200 ILOAD = 100A ILOAD = 10mA
06110-015
Figure 17. Load Transient Response
600
500
VIN STEP FROM 4V TO 5V
IGND (A)
400
300
2V/DIV
1
VOUT
20mV/DIV
2
100 0 3.20
3.25
3.30
3.35
3.40 VIN (V)
3.45
3.50
3.55
3.60
TIME (100s/DIV)
Figure 15. Ground Current vs. Input Voltage (in Dropout)
Figure 18. Line Transient Response
Rev. 0 | Page 7 of 20
06110-036
VIN = 5V VOUT = 3.3V CIN = 2.2F COUT = 2.2F ILOAD = 500mA
06110-035
VIN = 5V VOUT = 3.3V CIN = 22F COUT = 22F
06110-014
06110-034
VIN = 5V VOUT = 3.3V CIN = 2.2F COUT = 2.2F
ADP1715/ADP1716
18 16 14
0 -10 -20 -30
PSRR (dB)
VRIPPLE = 50mV p-p VIN = 5V VOUT = 0.75V COUT = 2.2F ILOAD = 10mA
RAMP-UP TIME (ms)
12 10 8 6
-40 -50 -60 -70
4 2 0 0 5 10 CSS (nF) 15 20 25
06110-018
-80 -90 -100 10 100 1k 10k 100k 1M
06110-020
10M
FREQUENCY (Hz)
Figure 19. Output Voltage Ramp-Up Time vs. Soft-Start Capacitor Value
0 -10 -20 -30
PSRR (dB) PSRR (dB)
Figure 21. Power Supply Rejection Ratio vs. Frequency
0 VRIPPLE = 50mV p-p VIN = 5V VOUT = 0.75V COUT = 2.2F ILOAD = 100mA
VRIPPLE = 50mV p-p VIN = 5V VOUT = 0.75V COUT = 2.2F ILOAD = 100A
-10 -20 -30 -40 -50 -60 -70 -80
06110-037
-40 -50 -60 -70 -80 -90 -100 10 100 1k 10k 100k 1M
-90 -100 10 100 1k 10k 100k 1M
10M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency
Figure 22. Power Supply Rejection Ratio vs. Frequency
Rev. 0 | Page 8 of 20
06110-038
ADP1715/ADP1716
0 -10 -20 -30
PSRR (dB)
0 VRIPPLE = 50mV p-p VIN = 5V VOUT = 3.3V COUT = 2.2F ILOAD = 100A -10 -20 -30
PSRR (dB)
VRIPPLE = 50mV p-p VIN = 5V VOUT = 3.3V COUT = 2.2F ILOAD = 100mA
-40 -50 -60 -70
06110-039
-40 -50 -60 -70 -80 -90 10
06110-040
-80 -90 10
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Power Supply Rejection Ratio vs. Frequency
0 -10 -20 -30
PSRR (dB)
Figure 25. Power Supply Rejection Ratio vs. Frequency
VRIPPLE = 50mV p-p VIN = 5V VOUT = 3.3V COUT = 2.2F ILOAD = 10mA
-40 -50 -60 -70 -80 -90 10
06110-019
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 24. Power Supply Rejection Ratio vs. Frequency
Rev. 0 | Page 9 of 20
ADP1715/ADP1716 THEORY OF OPERATION
The ADP1715/ADP1716 are low dropout, CMOS linear regulators that use an advanced, proprietary architecture to provide high power supply rejection ratio (PSRR) and excellent line and load transient response with just a small 2.2 F ceramic output capacitor. Both devices operate from a 2.5 V to 5.5 V input rail and provide up to 500 mA of output current. Supply current in shutdown mode is typically 100 nA. connect a small ceramic capacitor from SS to GND. Upon startup, a 1.2 A current source charges this capacitor. The ADP1715 start-up output voltage is limited by the voltage at SS, providing a smooth ramp up to the nominal output voltage. The soft-start time is calculated by TSS = VREF x (CSS/ISS) where: TSS is the soft-start period. VREF is the 0.8 V reference voltage. CSS is the soft-start capacitance from SS to GND. ISS is the current sourced from SS (1.2 A). When the ADP1715 is disabled (using EN), the soft-start capacitor is discharged to GND through an internal 100 resistor.
SS/ ADJ/ TRK
(1)
IN
OUT
CURRENT LIMIT THERMAL PROTECT
SHUTDOWN
EN
REFERENCE
SOFT START
EN
06110-021
GND
2V/DIV
Figure 26. Internal Block Diagram
1
Internally, the ADP1715/ADP1716 consist of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP1715 is available in two versions, one with fixed output voltage options and one with an adjustable output voltage. The fixed output voltage options are set internally to one of sixteen values between 0.75 V and 3.3 V, using an internal feedback network. The adjustable output voltage can be set to between 0.8 V and 5.0 V by an external voltage divider connected from OUT to ADJ. The fixed output version of ADP1715 allows for connection of an external soft-start capacitor, which controls the output voltage ramp during startup. The ADP1716 features a track pin and is available with fixed output voltage options. All devices are controlled by an enable pin (EN).
OUT VIN = 5V VOUT = 3.3V COUT = 2.2F CSS = 22nF ILOAD = 500mA TIME (4ms/DIV)
1V/DIV
Figure 27. OUT Ramp-Up with External Soft-Start Capacitor
The ADP1715 adjustable version and the ADP1716 have no pins for soft start, so the function is switched to an internal softstart capacitor. This sets the soft-start ramp-up period to approximately 24 s. For the worst-case output voltage of 5 V, using the suggested 2.2 F output capacitor, the resulting input inrush current is approximately 460 mA, which is less than the maximum 500 mA load current.
EN
2V/DIV
1
SOFT-START FUNCTION (ADP1715)
For applications that require a controlled startup, the ADP1715 provides a programmable soft-start function. Programmable soft start is useful for reducing inrush current upon startup and for providing voltage sequencing. To implement soft start,
Rev. 0 | Page 10 of 20
OUT
2
06110-042
VIN = 5V VOUT = 1.6V COUT = 2.2F ILOAD = 10mA TIME (20s/DIV)
1V/DIV
Figure 28. OUT Ramp-Up with Internal Soft-Start
06110-041
2
ADP1715/ADP1716
ADJUSTABLE OUTPUT VOLTAGE (ADP1715 ADJUSTABLE)
The ADP1715 adjustable version can have its output voltage set over a 0.8 V to 5.0 V range. The output voltage is set by connecting a resistive voltage divider from OUT to ADJ. The output voltage is calculated using the equation VOUT = 0.8 V (1 + R1/R2) where: R1 is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND.
CH1, CH2 (500mV/DIV)
ENABLE FEATURE
The ADP1715/ADP1716 use the EN pin to enable and disable the OUT pin under normal operating conditions. As shown in Figure 30, when a rising voltage on EN crosses the active threshold, OUT turns on. When a falling voltage on EN crosses the inactive threshold, OUT turns off.
(2)
EN
The maximum bias current into ADJ is 100 nA, so for less than 0.5% error due to the bias current, use values less than 60 k for R2.
1
OUT VIN = 5V VOUT = 1.6V COUT = 2.2F ILOAD = 10mA TIME (1ms/DIV)
TRACK MODE (ADP1716)
The ADP1716 includes a tracking mode feature. As shown in Figure 29, if the voltage applied at the TRK pin is less than the nominal output voltage, OUT is equal to the voltage at TRK. Otherwise, OUT regulates to its nominal output value.
4
Figure 30. ADP1715 Adjustable Typical EN Pin Operation
3
As can be seen, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points. The EN pin active/inactive thresholds are derived from the IN voltage. Therefore, these thresholds vary with changing input voltage. Figure 31 shows typical EN active/inactive thresholds when the input voltage varies from 2.5 V to 5.5 V.
1.4 1.3
06110-047
VOUT (V)
2
1
TYPICAL EN THRESHOLDS (V)
1.2 1.1
EN ACTIVE
0 0 1 2 VTRK (V) 3 4 5
HYSTERESIS 1.0 0.9 0.8 0.7 0.6 EN INACTIVE
06110-044
Figure 29. ADP1716 Output Voltage vs. Tracking Voltage with Nominal Output Voltage Set to 3 V
For example, consider an ADP1716 with a nominal output voltage of 3 V. If the voltage applied to its TRK pin is greater than 3 V, OUT maintains a nominal output voltage of 3 V. If the voltage applied to TRK is reduced below 3 V, OUT tracks this voltage. OUT can track the TRK pin voltage from the nominal value all the way down to 0 V. A voltage divider is present from TRK to the error amplifier input with a divider ratio equal to the divider from OUT to the error amplifier. This sets the output voltage equal to the tracking voltage. Both divider ratios are set by post-package trim, depending on the desired output voltage.
0.5 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 VIN (V)
Figure 31. Typical EN Pin Thresholds vs. Input Voltage
Rev. 0 | Page 11 of 20
06110-043
ADP1715/ADP1716 APPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP1715/ADP1716 are designed for operation with small, space-saving ceramic capacitors, but they will function with most commonly used capacitors as long as care is taken about the effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of 2.2 F capacitance with an ESR of 500 m or less is recommended to ensure stability of the ADP1715/ADP1716. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP1715/ADP1716 to large changes in load current. Figure 32 and Figure 33 show the transient responses for output capacitance values of 2.2 F and 22 F.
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the ADP1715/ADP1716, as long as they meet the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics are not recommended, due to their poor temperature and dc bias characteristics.
CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION
The ADP1715/ADP1716 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP1715/ADP1716 are designed to current limit when the output load reaches 750 mA (typical). When the output load exceeds 750 mA, the output voltage is reduced to maintain a constant current limit. Thermal overload protection is included, which limits the junction temperature to a maximum of 150C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 150C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 135C, the output is turned on again and output current is restored to its nominal value. Consider the case where a hard short from OUT to ground occurs. At first the ADP1715/ADP1716 will current limit, so that only 750 mA is conducted into the short. If self heating of the junction is great enough to cause its temperature to rise above 150C, thermal shutdown will activate, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 135C, the output turns on and conducts 750 mA into the short, again causing the junction temperature to rise above 150C. This thermal oscillation between 135C and 150C causes a current oscillation between 750 mA and 0 mA that continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation should be externally limited so junction temperatures do not exceed 125C.
SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM 25mA TO 475mA
2V/DIV 20mV/DIV
1
2
VOUT
06110-045 06110-046
VIN = 5V VOUT = 3.3V CIN = 2.2F COUT = 2.2F TIME (2s/DIV)
Figure 32. Output Transient Response
SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM 25mA TO 475mA
2V/DIV 20mV/DIV
1
2
VOUT VIN = 5V VOUT = 3.3V CIN = 22F COUT = 22F TIME (2s/DIV)
Figure 33. Output Transient Response
Input Bypass Capacitor
Connecting a 2.2 F capacitor from the IN pin to GND reduces the circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces, or high source impedance, is encountered. If greater than 2.2 F of output capacitance is required, the input capacitor should be increased to match it.
THERMAL CONSIDERATIONS
To guarantee reliable operation, the junction temperature of the ADP1715/ADP1716 should not exceed 125C. To ensure the junction temperature stays below this maximum value, the user
Rev. 0 | Page 12 of 20
ADP1715/ADP1716
should be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (JA). The JA number is dependent on the package assembly compounds used and the amount of copper to which the GND pins of the package are soldered to on the PCB. Table 5 shows typical JA values of the 8-lead thermally enhanced MSOP package for various PCB copper sizes. Table 5.
Copper Size (mm ) 01 100 300 500 700
1
140
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
TJ (C)
80
60
40
2
JA (C/W) 118 99 77 75 74
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
Figure 34. 700 mm2 of PCB Copper, TA = 25C
140
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
Device soldered to minimum size pin traces.
TJ = TA + (PD x JA) where:
(3)
TJ (C)
The junction temperature of the ADP1715/ADP1716 can be calculated from the following equation:
80
60
40
PD = [(VIN - VOUT) x ILOAD] + (VIN x IGND) where: ILOAD is the load current. IGND is ground current. VIN and VOUT are input and output voltages, respectively.
(4)
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
Figure 35. 300 mm2 of PCB Copper, TA = 25C
140
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ
TJ = TA + {[(VIN - VOUT) x ILOAD] x JA}
(5)
TJ (C)
Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following:
100
80
60
As shown in Equation 5, for a given ambient temperature, input to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure the junction temperature does not rise above 125C. The following figures show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper.
40
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
Figure 36. 100 mm2 of PCB Copper, TA = 25C
Rev. 0 | Page 13 of 20
06110-024
20
06110-023
TA is the ambient temperature. PD is the power dissipation in the die, given by
20
06110-022
20
ADP1715/ADP1716
140 140
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100 100 120
DO NOT OPERATE ABOVE THIS POINT
MAX TJ
TJ (C)
60
TJ (C)
06110-025
80
80
60
40
40
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
VIN - VOUT (V)
Figure 37. 0 mm2 of PCB Copper, TA = 25C
140 140
Figure 40. 100 mm2 of PCB Copper, TA = 50C
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
TJ (C)
60
TJ (C)
80
80
60
40
40
06110-026
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
VIN - VOUT (V)
Figure 38. 700 mm2 of PCB Copper, TA = 50C
140 140
Figure 41. 0 mm2 of PCB Copper, TA = 50C
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
TJ (C)
60
TJ (C)
80
80
60
40
40
06110-027
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
VIN - VOUT (V)
VIN - VOUT (V)
Figure 39. 300 mm2 of PCB Copper, TA = 50C
Figure 42. 700 mm2 of PCB Copper, TA = 85C
Rev. 0 | Page 14 of 20
06110-030
20
20
06110-029
20
20
06110-028
20
20
ADP1715/ADP1716
140
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
The 8-lead MSOP package has the four GND pins fused together internally, which enhances its thermal characteristics. Heat dissipation from the package is increased by connecting as much copper as possible to the four GND pins of the ADP1715/ ADP1716. From Table 5 it can be seen that a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield additional heat dissipation benefits.
100
TJ (C)
80
60
40
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
06110-031
20
VIN - VOUT (V)
Figure 43. 300 mm of PCB Copper, TA = 85C
140
2
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ 100
Figure 46 shows a typical layout for the ADP1715/ADP1716. The four GND pins are connected to a large copper pad. If a second layer is available, multiple vias can be used to connect them, increasing the overall copper area. The input capacitor should be placed as close as possible to the IN and GND pins. The output capacitor should be placed as close as possible to the OUT and GND pins. 0603 or 0402 size capacitors and resistors should be used to achieve the smallest possible footprint solution on boards where area is limited.
GND (TOP)
TJ (C)
80
60
40
1mA 10mA 0 0 1
50mA 100mA 2
250mA 360mA 3
500mA (LOAD CURRENT) 4 5
06110-032
20
C1
ADP1715/ ADP1716
C2
VIN - VOUT (V)
Figure 44. 100 mm2 of PCB Copper, TA = 85C
140
IN
OUT
DO NOT OPERATE ABOVE THIS POINT
120 MAX TJ
100
R1
TJ (C)
80
C3 EN GND (BOTTOM)
R2
60
40
Figure 46. Example PCB Layout
1mA 10mA 0 0 1 2 3 4 5 VIN - VOUT (V) 50mA 100mA 250mA 360mA 500mA (LOAD CURRENT)
06110-033
20
Figure 45. 0 mm2 of PCB Copper, TA = 85C
Rev. 0 | Page 15 of 20
06110-048
ADP1715/ADP1716 OUTLINE DIMENSIONS
3.20 3.00 2.80
3.20 3.00 2.80
8
5
1
5.15 4.90 4.65
4
PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
0.23 0.08
COPLANARITY 0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 47. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions show in millimeters
Rev. 0 | Page 16 of 20
ADP1715/ADP1716
ORDERING GUIDE
Model ADP1715ARMZ-0.75R71 ADP1715ARMZ-0.8-R71 ADP1715ARMZ-0.85R71 ADP1715ARMZ-0.9-R71 ADP1715ARMZ-0.95R71 ADP1715ARMZ-1.0-R71 ADP1715ARMZ-1.05R71 ADP1715ARMZ-1.1-R71 ADP1715ARMZ-1.15R71 ADP1715ARMZ-1.2-R71 ADP1715ARMZ-1.3-R71 ADP1715ARMZ-1.5-R71 ADP1715ARMZ-1.8-R71 ADP1715ARMZ-2.5-R71 ADP1715ARMZ-3.0-R71 ADP1715ARMZ-3.3-R71 ADP1715ARMZ-R71 ADP1716ARMZ-0.75R7 1 ADP1716ARMZ-0.8-R71 ADP1716ARMZ-0.85R71 ADP1716ARMZ-0.9-R71 ADP1716ARMZ-0.95R71 ADP1716ARMZ-1.0-R71 ADP1716ARMZ-1.05R71 ADP1716ARMZ-1.1-R71 ADP1716ARMZ-1.15R71 ADP1716ARMZ-1.2-R71 ADP1716ARMZ-1.3-R71 ADP1716ARMZ-1.5-R71 ADP1716ARMZ-1.8-R71 ADP1716ARMZ-2.5-R71 ADP1716ARMZ-3.0-R71 ADP1716ARMZ-3.3-R71
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Output Voltage (V) 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.30 1.50 1.80 2.50 3.00 3.30 0.8 to 5.0 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.30 1.50 1.80 2.50 3.00 3.30
Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP
Package Option RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8
Branding L29 L2A L2C L2D L2E L2F L2G L2H L2J L2K L32 L2L L3R L33 L34 L35 L3K L2N L2P L2Q L2R L2S L2T L3D L2U L2 V L2W L2X L2Y L31 L37 L38 L39
Z = Pb-free part.
Rev. 0 | Page 17 of 20
ADP1715/ADP1716 NOTES
Rev. 0 | Page 18 of 20
ADP1715/ADP1716 NOTES
Rev. 0 | Page 19 of 20
ADP1715/ADP1716 NOTES
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06110-0-9/06(0)
Rev. 0 | Page 20 of 20

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