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 NTMFS4936N Power MOSFET
Features
30 V, 79 A, Single N-Channel, SO-8 FL
* Low RDS(on), Low Capacitance and Optimized Gate Charge to *
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V(BR)DSS 30 V RDS(ON) MAX 4.0 mW @ 10 V 5.5 mW @ 4.5 V D (5,6) ID MAX 79 A
Minimize Conduction, Driver and Switching Losses These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant
Applications
* CPU Power Delivery * DC-DC Converters
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA 10 s (Note 1) Power Dissipation RqJA 10 s (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed DrainCurrent Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL = 44 Apk, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s) Steady State TA = 25C TA = 100C TA = 25C TA = 25C TA = 100C TA = 25C TA = 25C TA = 100C TA = 25C TC = 25C TC =100C TC = 25C TA = 25C, tp = 10 ms TA = 25C PD IDM IDmax TJ, TSTG IS dV/dt EAS PD ID PD ID PD ID Symbol VDSS VGS ID Value 30 20 19.5 12.3 2.62 35 22 8.4 11.6 7.3 0.92 79 50 43 235 100 -55 to +150 39.2 6.0 96.8 W A A C A V/ns mJ W A W A W A Unit V V A
G (4) S (1,2,3) N-CHANNEL MOSFET
MARKING DIAGRAM
D
1
SO-8 FLAT LEAD CASE 488AA STYLE 1
S S S G
4936N AYWWG G D
D
D
A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device NTMFS4936NT1G NTMFS4936NT3G Package SO-8 FL (Pb-Free) SO-8 FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
TL
260
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2009
August, 2009 - Rev. 1
1
Publication Order Number: NTMFS4936N/D
NTMFS4936N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note 4) Junction-to-Ambient - (t 10 s) (Note 3) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA RqJA Value 2.9 47.7 135.2 14.8 C/W Unit
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ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 10 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 15 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 15 A CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 15.5 20.6 24.6 7.0 ns 3044 1014 39 19 4.6 9.2 2.4 43 nC nC pF VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 TBD 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.2 1.6 4.0 2.9 2.9 3.9 3.9 50
2.0
V mV/C
4.0 mW
5.5
S
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4936N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.8 0.65 39 21.5 17.5 36 nC ns 1.1 V td(ON) tr td(OFF) tf VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 10.4 19 29 8.0 ns Symbol Test Condition Min Typ Max Unit
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Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance
0.65 0.005 1.84 1.1 2.0
nH nH nH W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTMFS4936N
TYPICAL CHARACTERISTICS
4.5 V to 10 V 4.0 V 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 2.4 V 0 2.6 V 4 VGS = 3.8 V ID, DRAIN CURRENT (A)
140 120 ID, DRAIN CURRENT (A) 100 80 60 40 20 0
140 120 100 80 60 40 20 0 1 1.5 2 2.5 3 3.5 VGS, GATE-TO-SOURCE VOLTAGE (V) 4 TJ = 125C TJ = 25C TJ = -55C VDS = 10 V
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Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.012 0.011 0.010 0.009 0.008 0.007 0.006 0.005 0.004 0.003 0.002 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 ID = 30 A TJ = 25C RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.006
1 2 3 VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2. Transfer Characteristics
0.0055 0.005
TJ = 25C
0.0045 0.004
VGS = 4.5 V
0.0035 0.003
VGS = 10 V
0.0025 0.002 20 30 40 50 60 70 80 90 100 110 120 130 14
10.5
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.7 ID = 30 A 1.6 VGS = 10 V 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 10000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V TJ = 150C IDSS, LEAKAGE (nA) 1000 TJ = 125C
100 TJ = 85C
25
50
75
100
125
150
10
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NTMFS4936N
TYPICAL CHARACTERISTICS
10 9 8 7 6 5 4 3 2 1 0 0 3 6 QGS QGD TJ = 25C VDD = 15 V VGS = 10 V ID = 30 A 9 12 15 18 21 24 27 30 33 36 39 42 45 QG, TOTAL GATE CHARGE (nC) QT
3600 3200 C, CAPACITANCE (pF) 2800 2400 2000 1600 1200 800 400 0 0 5 Crss 10 15 20 Coss Ciss
TJ = 25C VGS = 0 V
VGS, GATE-TO-SOURCE VOLTAGE (V)
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25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge
30 IS, SOURCE CURRENT (A) VGS = 0 V td(off) tf tr 25 20 15 10 5 0 TJ = 125C TJ = 25C
1000 VDD = 15 V ID = 15 A VGS = 10 V t, TIME (ns) 100
10
td(on)
1 1 10 RG, GATE RESISTANCE (W) 100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
1000 ID, DRAIN CURRENT (A) 100 10 1 0.1 VGS = 20 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 90 80 70 60 50 40 30 20 10 0
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ)
ID = 44 A
10 ms 100 ms 1 ms 10 ms
dc
0.01 0.1
100
25
50
75
100
125
150
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTMFS4936N
TYPICAL CHARACTERISTICS
100 D = 0.5 10 r(t) (C/W) 1 0.1 0.01 SINGLE PULSE 0.2 0.1 0.05 0.02 0.01
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0.001 0.000001
0.00001
0.0001
0.001
0.01 t, TIME (ms)
0.1
1
10
100
1000
Figure 13. Thermal Response
100 90 80 70 GFS (S) 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 ID, (A)
Figure 14. GFS vs. ID
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NTMFS4936N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE D
2X NOTES: 1. DIMENSIONING AND TOLERANCING PER www..com ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
0.20 C D 2 D1 A B
2X
0.20 C E1 2 E c
4X
q
A1
1
2
3
4
TOP VIEW
3X
C
SEATING PLANE
0.10 C A 0.10 C SIDE VIEW
8X
e
DETAIL A
DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q
MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _
SOLDERING FOOTPRINT*
DETAIL A 1.270
STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 3X
b e/2
1 4
0.750
4X
1.000
4X
0.10 0.05
CAB c L
0.965 1.330 0.495
2X
K E2 L1
0.905 4.530 0.475
2X
2X
PIN 5 (EXPOSED PAD)
M
3.200
G
D2 BOTTOM VIEW
1.530 4.560 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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NTMFS4936N/D


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